pcidio96registeraddressmap.h

windows系统下实时代码,可以进行底层硬件的实时操作

/*++
 *
 * Copyright (c) 1998-2005 Ardence, Inc. All rights reserved.
 *
 * Module Name:
 *
 *      pcidio96registeraddressmap.h
 *
 * Abstract:
 *
 *      Define National Instruments PC-DIO-96 board register addresses.
 *
 * Author:
 *
 *      Elisabeth Boutin
 *
 * Environment:
 *
 *      RTX device drivers or applications (Win32 or RTSS).
 *
 --*/

#ifndef _PCIDIO96REGISTERADDRESSMAP_H_
#define _PCIDIO96REGISTERADDRESSMAP_H_

#ifdef __cplusplus
extern "C" {
#endif


/* PPI A */
#define PORTA_ADDR  ((PUCHAR) BASE_ADDR + 0x00) // Port A, aka. Port 0
#define PORTB_ADDR  ((PUCHAR) BASE_ADDR + 0x01) // Port B, aka. Port 1
#define PORTC_ADDR  ((PUCHAR) BASE_ADDR + 0x02) // Port C, aka. Port 2
#define CNFG_ADDR   ((PUCHAR) BASE_ADDR + 0x03) // PPI A Config Port

/* PPI B */
#define B_PORTA_ADDR ((PUCHAR) BASE_ADDR + 0x04) // PPI B Port A, aka. Port 3
#define B_PORTB_ADDR ((PUCHAR) BASE_ADDR + 0x05) // PPI B Port B, aka. Port 4
#define B_PORTC_ADDR ((PUCHAR) BASE_ADDR + 0x06) // PPI B Port C, aka. Port 5
#define B_CNFG_ADDR  ((PUCHAR) BASE_ADDR + 0x07) // PPI B Config Port

/* PPI C */
#define C_PORTA_ADDR ((PUCHAR) BASE_ADDR + 0x08) // PPI C Port A, aka. Port 6
#define C_PORTB_ADDR ((PUCHAR) BASE_ADDR + 0x09) // PPI C Port B, aka. Port 7
#define C_PORTC_ADDR ((PUCHAR) BASE_ADDR + 0x0A) // PPI C Port C, aka. Port 8
#define C_CNFG_ADDR  ((PUCHAR) BASE_ADDR + 0x0B) // PPI C Config Port

/* PPI D */
#define D_PORTA_ADDR ((PUCHAR) BASE_ADDR + 0x0C) // PPI D Port A, aka. Port 9
#define D_PORTB_ADDR ((PUCHAR) BASE_ADDR + 0x0D) // PPI D Port B, aka. Port 10
#define D_PORTC_ADDR ((PUCHAR) BASE_ADDR + 0x0E) // PPI D Port C, aka. Port 11
#define D_CNFG_ADDR  ((PUCHAR) BASE_ADDR + 0x0F) // PPI D Config Port

/* Counter/Timer */
#define CLOCKA	     ((PUCHAR) BASE_ADDR + 0x10) // Clock or Counter 0
#define CLOCKB       ((PUCHAR) BASE_ADDR + 0x11) // Clock or Counter 1
#define CLOCKC       ((PUCHAR) BASE_ADDR + 0x12) // Clock or Counter 2
#define	CLOCK_CTRL   ((PUCHAR) BASE_ADDR + 0x13) // Clock or Counter Control

/* Interrupt control */
#define INTR_CTRL1   ((PUCHAR) BASE_ADDR + 0x14) // First interrupt control register
#define INTR_CTRL2   ((PUCHAR) BASE_ADDR + 0x15) // Second interrupt control register
#define INTR_CLEAR   ((PUCHAR) BASE_ADDR + 0x16) // Interrupt Clear Register


#define BASE_ADDR _base_addr

// Get and set long value macros.
#define PTL(x)  (*(PLONG)(x))

// Search devices
int PciDio96_Search(int CardNumber,	PCI_SLOT_NUMBER *pSlotNumber, PPCI_COMMON_CONFIG  PciData);

// Initialize device
PCHAR
PciDio96_Init(int intBusNumber,	PCI_SLOT_NUMBER *pSlotNumber, PPCI_COMMON_CONFIG  PciData);

// Cleanup
void PciDio96_Cleanup(HANDLE aHandle, int cleanMode);


/* fail: utility routine for fatal errors. */
void PciDio96_Fail(char *mesg);	


#ifdef __cplusplus
}
#endif
#endif // _PCIDIO96REGISTERADDRESSMAP_H_