📄 output.lst
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0191 01A8 MOVW R20,R16
0192 20AA TST R10
0193 F411 BNE 0x0196
0194 2366 TST R22
0195 F089 BEQ 0x01A7
0196 9020027B LDS R2,TxOperateSp0
0198 2433 CLR R3
0199 2D82 MOV R24,R2
019A 5F8F SUBI R24,0xFF
019B 9380027B STS TxOperateSp0,R24
019D E78D LDI R24,0x7D
019E E092 LDI R25,2
019F 2DE2 MOV R30,R2
01A0 27FF CLR R31
01A1 0FE8 ADD R30,R24
01A2 1FF9 ADC R31,R25
01A3 2D8A MOV R24,R10
01A4 5D80 SUBI R24,0xD0
01A5 8380 STD Z+0,R24
01A6 E061 LDI R22,1
(0170) j=i/100;i%=100;if(j||head){TxBuffer0[TxOperateSp0++]=j+0x30;head=1;}
01A7 E624 LDI R18,0x64
01A8 E030 LDI R19,0
01A9 018A MOVW R16,R20
01AA 940E0457 CALL div16s
01AC 2EA0 MOV R10,R16
01AD E624 LDI R18,0x64
01AE E030 LDI R19,0
01AF 018A MOVW R16,R20
01B0 940E0453 CALL mod16s
01B2 01A8 MOVW R20,R16
01B3 20AA TST R10
01B4 F411 BNE 0x01B7
01B5 2366 TST R22
01B6 F089 BEQ 0x01C8
01B7 9020027B LDS R2,TxOperateSp0
01B9 2433 CLR R3
01BA 2D82 MOV R24,R2
01BB 5F8F SUBI R24,0xFF
01BC 9380027B STS TxOperateSp0,R24
01BE E78D LDI R24,0x7D
01BF E092 LDI R25,2
01C0 2DE2 MOV R30,R2
01C1 27FF CLR R31
01C2 0FE8 ADD R30,R24
01C3 1FF9 ADC R31,R25
01C4 2D8A MOV R24,R10
01C5 5D80 SUBI R24,0xD0
01C6 8380 STD Z+0,R24
01C7 E061 LDI R22,1
(0171) j=i/10;i%=10;if(j||head){TxBuffer0[TxOperateSp0++]=j+0x30;head=1;}
01C8 E02A LDI R18,0xA
01C9 E030 LDI R19,0
01CA 018A MOVW R16,R20
01CB 940E0457 CALL div16s
01CD 2EA0 MOV R10,R16
01CE E02A LDI R18,0xA
01CF E030 LDI R19,0
01D0 018A MOVW R16,R20
01D1 940E0453 CALL mod16s
01D3 01A8 MOVW R20,R16
01D4 20AA TST R10
01D5 F411 BNE 0x01D8
01D6 2366 TST R22
01D7 F089 BEQ 0x01E9
01D8 9020027B LDS R2,TxOperateSp0
01DA 2433 CLR R3
01DB 2D82 MOV R24,R2
01DC 5F8F SUBI R24,0xFF
01DD 9380027B STS TxOperateSp0,R24
01DF E78D LDI R24,0x7D
01E0 E092 LDI R25,2
01E1 2DE2 MOV R30,R2
01E2 27FF CLR R31
01E3 0FE8 ADD R30,R24
01E4 1FF9 ADC R31,R25
01E5 2D8A MOV R24,R10
01E6 5D80 SUBI R24,0xD0
01E7 8380 STD Z+0,R24
01E8 E061 LDI R22,1
(0172) TxBuffer0[TxOperateSp0++]=i+0x30;
01E9 9020027B LDS R2,TxOperateSp0
01EB 2433 CLR R3
01EC 2D82 MOV R24,R2
01ED 5F8F SUBI R24,0xFF
01EE 9380027B STS TxOperateSp0,R24
01F0 E78D LDI R24,0x7D
01F1 E092 LDI R25,2
01F2 2DE2 MOV R30,R2
01F3 27FF CLR R31
01F4 0FE8 ADD R30,R24
01F5 1FF9 ADC R31,R25
01F6 01CA MOVW R24,R20
01F7 96C0 ADIW R24,0x30
01F8 8380 STD Z+0,R24
01F9 940E04A8 CALL pop_gset3
01FB 9508 RET
_tx0_uc_to_bcd:
head --> R22
j --> R10
i --> R20
01FC 940E04AF CALL push_gset3
01FE 2F40 MOV R20,R16
(0173) }
(0174) /*******************************************************************************
(0175) 将uc型变量转换为bcd码，并填充到TxBuffer0[]中
(0176) ********************************************************************************/
(0177) void tx0_uc_to_bcd(UC i)
(0178) {
(0179) UC j,head=0;
01FF 2766 CLR R22
(0180) j=i/100;i%=100;if(j){TxBuffer0[TxOperateSp0++]=j+0x30;head=1;}
0200 E614 LDI R17,0x64
0201 2F04 MOV R16,R20
0202 940E048F CALL div8u
0204 2EA0 MOV R10,R16
0205 E614 LDI R17,0x64
0206 2F04 MOV R16,R20
0207 940E048D CALL mod8u
0209 2F40 MOV R20,R16
020A 20AA TST R10
020B F089 BEQ 0x021D
020C 9020027B LDS R2,TxOperateSp0
020E 2433 CLR R3
020F 2D82 MOV R24,R2
0210 5F8F SUBI R24,0xFF
0211 9380027B STS TxOperateSp0,R24
0213 E78D LDI R24,0x7D
0214 E092 LDI R25,2
0215 2DE2 MOV R30,R2
0216 27FF CLR R31
0217 0FE8 ADD R30,R24
0218 1FF9 ADC R31,R25
0219 2D8A MOV R24,R10
021A 5D80 SUBI R24,0xD0
021B 8380 STD Z+0,R24
021C E061 LDI R22,1
(0181) j=i/10;i%=10;if(j||head){TxBuffer0[TxOperateSp0++]=j+0x30;head=1;}
021D E01A LDI R17,0xA
021E 2F04 MOV R16,R20
021F 940E048F CALL div8u
0221 2EA0 MOV R10,R16
0222 E01A LDI R17,0xA
0223 2F04 MOV R16,R20
0224 940E048D CALL mod8u
0226 2F40 MOV R20,R16
0227 20AA TST R10
0228 F411 BNE 0x022B
0229 2366 TST R22
022A F089 BEQ 0x023C
022B 9020027B LDS R2,TxOperateSp0
022D 2433 CLR R3
022E 2D82 MOV R24,R2
022F 5F8F SUBI R24,0xFF
0230 9380027B STS TxOperateSp0,R24
0232 E78D LDI R24,0x7D
0233 E092 LDI R25,2
0234 2DE2 MOV R30,R2
0235 27FF CLR R31
0236 0FE8 ADD R30,R24
0237 1FF9 ADC R31,R25
0238 2D8A MOV R24,R10
0239 5D80 SUBI R24,0xD0
023A 8380 STD Z+0,R24
023B E061 LDI R22,1
(0182) TxBuffer0[TxOperateSp0++]=i+0x30;
023C 9020027B LDS R2,TxOperateSp0
023E 2433 CLR R3
023F 2D82 MOV R24,R2
0240 5F8F SUBI R24,0xFF
0241 9380027B STS TxOperateSp0,R24
0243 E78D LDI R24,0x7D
0244 E092 LDI R25,2
0245 2DE2 MOV R30,R2
0246 27FF CLR R31
0247 0FE8 ADD R30,R24
0248 1FF9 ADC R31,R25
0249 2F84 MOV R24,R20
024A 5D80 SUBI R24,0xD0
024B 8380 STD Z+0,R24
024C 940E04A8 CALL pop_gset3
024E 9508 RET
_io_test:
Delay --> R20
i --> R22
024F 940E04B1 CALL push_gset2
(0183) }
(0184)
(0185)
(0186)
(0187) void io_test(void){
(0188) UC i=0;
0251 2766 CLR R22
(0189) UI Delay;
(0190) if(T0Count0>500){//||(RxFlag==ON)){
0252 EF84 LDI R24,0xF4
0253 E091 LDI R25,1
0254 90200175 LDS R2,T0Count0
0256 90300176 LDS R3,T0Count0+1
0258 1582 CP R24,R2
0259 0593 CPC R25,R3
025A F008 BCS 0x025C
025B C1EB RJMP 0x0447
(0191) T0Count0=0;
025C 2422 CLR R2
025D 2433 CLR R3
025E 92300176 STS T0Count0+1,R3
0260 92200175 STS T0Count0,R2
(0192) // RxFlag=OFF;
(0193) OutputByte0Reg=OutputTable[TestIOSp][0];
0262 90200174 LDS R2,TestIOSp
0264 E083 LDI R24,3
0265 9D82 MUL R24,R2
0266 01F0 MOVW R30,R0
0267 E084 LDI R24,4
0268 E091 LDI R25,1
0269 0FE8 ADD R30,R24
026A 1FF9 ADC R31,R25
026B 8020 LDD R2,Z+0
026C 9220037F STS OutputByte0Reg,R2
(0194) OutputByte1Reg=OutputTable[TestIOSp][1];
026E 90200174 LDS R2,TestIOSp
0270 E083 LDI R24,3
0271 9D82 MUL R24,R2
0272 01F0 MOVW R30,R0
0273 E085 LDI R24,5
0274 E091 LDI R25,1
0275 0FE8 ADD R30,R24
0276 1FF9 ADC R31,R25
0277 8020 LDD R2,Z+0
0278 9220037E STS OutputByte1Reg,R2
(0195) OutputByte2Reg=OutputTable[TestIOSp][2];
027A 90200174 LDS R2,TestIOSp
027C E083 LDI R24,3
027D 9D82 MUL R24,R2
027E 01F0 MOVW R30,R0
027F E086 LDI R24,6
0280 E091 LDI R25,1
0281 0FE8 ADD R30,R24
0282 1FF9 ADC R31,R25
0283 8020 LDD R2,Z+0
0284 9220037D STS OutputByte2Reg,R2
(0196)
(0197) IOAddr[OutputByte0]=OutputByte0Reg;
0286 9020037F LDS R2,OutputByte0Reg
0288 9220F004 STS 0xF004,R2
(0198) IOAddr[OutputByte1]=OutputByte1Reg;
028A 9020037E LDS R2,OutputByte1Reg
028C 9220F005 STS 0xF005,R2
(0199) IOAddr[OutputByte2]=OutputByte2Reg;
028E 9020037D LDS R2,OutputByte2Reg
0290 9220F006 STS 0xF006,R2
(0200)
(0201) for(Delay=0;Delay<5000;Delay++);
0292 2744 CLR R20
0293 2755 CLR R21
0294 C002 RJMP 0x0297
0295 5F4F SUBI R20,0xFF
0296 4F5F SBCI R21,0xFF
0297 3848 CPI R20,0x88
0298 E1E3 LDI R30,0x13
0299 075E CPC R21,R30
029A F3D0 BCS 0x0295
029B C00D RJMP 0x02A9
(0202)
(0203) while(i<5){
(0204) if(InputByte0Reg==IOAddr[InputByte0])i++;
029C 9020F000 LDS R2,0xF000
029E 90300100 LDS R3,InputByte0Reg
02A0 1432 CP R3,R2
02A1 F411 BNE 0x02A4
02A2 9563 INC R22
02A3 C005 RJMP 0x02A9
(0205) else {InputByte0Reg=IOAddr[InputByte0];i=0;}
02A4 9020F000 LDS R2,0xF000
02A6 92200100 STS InputByte0Reg,R2
02A8 2766 CLR R22
02A9 3065 CPI R22,5
02AA F388 BCS 0x029C
(0206) }
(0207) i=0;
02AB 2766 CLR R22
02AC C00D RJMP 0x02BA
(0208) while(i<5){
(0209) if(InputByte1Reg==IOAddr[InputByte1])i++;
02AD 9020F001 LDS R2,0xF001
02AF 90300101 LDS R3,InputByte1Reg
02B1 1432 CP R3,R2
02B2 F411 BNE 0x02B5
02B3 9563 INC R22
02B4 C005 RJMP 0x02BA
(0210) else {InputByte1Reg=IOAddr[InputByte1];i=0;}
02B5 9020F001 LDS R2,0xF001
02B7 92200101 STS InputByte1Reg,R2
02B9 2766 CLR R22
02BA 3065 CPI R22,5
02BB F388 BCS 0x02AD
(0211) }
(0212) i=0;
02BC 2766 CLR R22
02BD C00D RJMP 0x02CB
(0213) while(i<5){
(0214) if(InputByte2Reg==IOAddr[InputByte2])i++;
02BE 9020F002 LDS R2,0xF002
02C0 90300102 LDS R3,InputByte2Reg
02C2 1432 CP R3,R2
02C3 F411 BNE 0x02C6
02C4 9563 INC R22
02C5 C005 RJMP 0x02CB
(0215) else {InputByte2Reg=IOAddr[InputByte2];i=0;}
02C6 9020F002 LDS R2,0xF002
02C8 92200102 STS InputByte2Reg,R2
02CA 2766 CLR R22
02CB 3065 CPI R22,5
02CC F388 BCS 0x02BE
(0216) }
(0217) i=0;
02CD 2766 CLR R22
02CE C00D RJMP 0x02DC
(0218) while(i<5){
(0219) if(InputByte3Reg==IOAddr[InputByte3])i++;
02CF 9020F003 LDS R2,0xF003
02D1 90300103 LDS R3,InputByte3Reg
02D3 1432 CP R3,R2
02D4 F411 BNE 0x02D7
02D5 9563 INC R22
02D6 C005 RJMP 0x02DC
(0220) else {InputByte3Reg=IOAddr[InputByte3];i=0;}
02D7 9020F003 LDS R2,0xF003
02D9 92200103 STS InputByte3Reg,R2
02DB 2766 CLR R22
02DC 3065 CPI R22,5
02DD F388 BCS 0x02CF
(0221) }
(0222) i=0;
02DE 2766 CLR R22
(0223) TxBuffer0[TxOperateSp0++]=0x20;
02DF 9020027B LDS R2,TxOperateSp0
02E1 2433 CLR R3
02E2 2D82 MOV R24,R2
02E3 5F8F SUBI R24,0xFF
02E4 9380027B STS TxOperateSp0,R24
02E6 E78D LDI R24,0x7D
02E7 E092 LDI R25,2
02E8 2DE2 MOV R30,R2
02E9 27FF CLR R31
02EA 0FE8 ADD R30,R24
02EB 1FF9 ADC R31,R25
02EC E280 LDI R24,0x20
02ED 8380 STD Z+0,R24
(0224) tx0_uc_to_bcd(OutputByte0Reg);
02EE 9100037F LDS R16,OutputByte0Reg
02F0 DF0B RCALL _tx0_uc_to_bcd
(0225) TxBuffer0[TxOperateSp0++]=0x20;
02F1 9020027B LDS R2,TxOperateSp0
02F3 2433 CLR R3
02F4 2D82 MOV R24,R2
02F5 5F8F SUBI R24,0xFF
02F6 9380027B STS TxOperateSp0,R24
02F8 E78D LDI R24,0x7D
02F9 E092 LDI R25,2
02FA 2DE2 MOV R30,R2
02FB 27FF CLR R31
02FC 0FE8 ADD R30,R24
02FD 1FF9 ADC R31,R25
02FE E280 LDI R24,0x20
02FF 8380 STD Z+0,R24
(0226) tx0_uc_to_bcd(OutputByte1Reg);
0300 9100037E LDS R16,OutputByte1Reg
0302 DEF9 RCALL _tx0_uc_to_bcd
(0227) TxBuffer0[TxOperateSp0++]=0x20;
0303 9020027B LDS R2,TxOperateSp0
0305 2433 CLR R3
0306 2D82 MOV R24,R2
0307 5F8F SUBI R24,0xFF
0308 9380027B STS TxOperateSp0,R24
030A E78D LDI R24,0x7D
030B E092 LDI R25,2
030C 2DE2 MOV R30,R2
030D 27FF CLR R31
030E 0FE8 ADD R30,R24
030F 1FF9 ADC R31,R25
0310 E280 LDI R24,0x20
0311 8380 STD Z+0,R24
(0228) tx0_uc_to_bcd(OutputByte2Reg);
0312 9100037D LDS R16,OutputByte2Reg
0314 DEE7 RCALL _tx0_uc_to_bcd
(0229) TxBuffer0[TxOperateSp0++]=0x20;
0315 9020027B LDS R2,TxOperateSp0
0317 2433 CLR R3
0318 2D82 MOV R24,R2
0319 5F8F SUBI R24,0xFF
031A 9380027B STS TxOperateSp0,R24
031C E78D LDI R24,0x7D
031D E092 LDI R25,2
031E 2DE2 MOV R30,R2
031F 27FF CLR R31
0320 0FE8 ADD R30,R24
0321 1FF9 ADC R31,R25
0322 E280 LDI R24,0x20
0323 8380 STD Z+0,R24
(0230) tx0_uc_to_bcd(InputByte0Reg);
0324 91000100 LDS R16,InputByte0Reg
0326 DED5 RCALL _tx0_uc_to_bcd
(0231) TxBuffer0[TxOperateSp0++]=0x20;
0327 9020027B LDS R2,TxOperateSp0
0329 2433 CLR R3
032A 2D82 MOV R24,R2
032B 5F8F SUBI R24,0xFF
032C 9380027B STS TxOperateSp0,R24
032E E78D LDI R24,0x7D
032F E092 LDI R25,2
0330 2DE2 MOV R30,R2
0331 27FF CLR R31
0332 0FE8 ADD R30,R24
0333 1FF9 ADC R31,R25
0334 E280 LDI R24,0x20
0335 8380 STD Z+0,R24
(0232) tx0_uc_to_bcd(InputByte1Reg);
0336 91000101 LDS R16,InputByte1Reg
0338 DEC3 RCALL _tx0_uc_to_bcd
(0233) TxBuffer0[TxOperateSp0++]=0x20;
0339 9020027B LDS R2,TxOperateSp0
033B 2433 CLR R3
033C 2D82 MOV R24,R2
033D 5F8F SUBI R24,0xFF
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