led.lst

avr单片机

__start:
__text_start:
    0047 EFCF      LDI	R28,0xFF
    0048 E1D0      LDI	R29,0x10
    0049 BFCD      OUT	0x3D,R28
    004A BFDE      OUT	0x3E,R29
    004B 51C0      SUBI	R28,0x10
    004C 40D0      SBCI	R29,0
    004D EA0A      LDI	R16,0xAA
    004E 8308      STD	Y+0,R16
    004F 2400      CLR	R0
    0050 E0E2      LDI	R30,2
    0051 E0F1      LDI	R31,1
    0052 E011      LDI	R17,1
    0053 30E2      CPI	R30,2
    0054 07F1      CPC	R31,R17
    0055 F011      BEQ	0x0058
    0056 9201      ST	R0,Z+
    0057 CFFB      RJMP	0x0053
    0058 8300      STD	Z+0,R16
    0059 E8EC      LDI	R30,0x8C
    005A E0F0      LDI	R31,0
    005B E0A0      LDI	R26,0
    005C E0B1      LDI	R27,1
    005D E010      LDI	R17,0
    005E 38EE      CPI	R30,0x8E
    005F 07F1      CPC	R31,R17
    0060 F021      BEQ	0x0065
    0061 95C8      LPM
    0062 9631      ADIW	R30,1
    0063 920D      ST	R0,X+
    0064 CFF9      RJMP	0x005E
    0065 940E00D1  CALL	_main
_exit:
    0067 CFFF      RJMP	_exit
FILE: d:\excersize\led.c
(0001) //ICC-AVR application builder : 2006-5-22 9:26:54
(0002) // Target : M128
(0003) // Crystal: 16.000Mhz
(0004) 
(0005) #include <iom128v.h>
(0006) #include <macros.h>
(0007) #include <d:\excersize\led.h>
(0008) void port_init(void)
(0009) {
(0010)  PORTA = 0x00;
_port_init:
    0068 2422      CLR	R2
    0069 BA2B      OUT	0x1B,R2
(0011)  DDRA  = 0x00;
    006A BA2A      OUT	0x1A,R2
(0012)  PORTB = 0xFF;
    006B EF8F      LDI	R24,0xFF
    006C BB88      OUT	0x18,R24
(0013)  DDRB  = 0xFF;
    006D BB87      OUT	0x17,R24
(0014)  PORTC = 0x00; //m103 output only
    006E BA25      OUT	0x15,R2
(0015)  DDRC  = 0xFF;
    006F BB84      OUT	0x14,R24
(0016)  PORTD = 0xFF;
    0070 BB82      OUT	0x12,R24
(0017)  DDRD  = 0xF0;
    0071 EF80      LDI	R24,0xF0
    0072 BB81      OUT	0x11,R24
(0018)  PORTE = 0x00;
    0073 B823      OUT	0x03,R2
(0019)  DDRE  = 0x00;
    0074 B822      OUT	0x02,R2
(0020)  PORTF = 0x00;
    0075 92200062  STS	0x62,R2
(0021)  DDRF  = 0x00;
    0077 92200061  STS	0x61,R2
(0022)  PORTG = 0x00;
    0079 92200065  STS	0x65,R2
(0023)  DDRG  = 0x00;
    007B 92200064  STS	0x64,R2
    007D 9508      RET
(0024) }
(0025) void watchdog_init(void)
(0026) {
(0027)  WDR(); //this prevents a timout on enabling//
_watchdog_init:
    007E 95A8      WDR
(0028)  WDTCR = 0x0F; //WATCHDOG ENABLED - dont forget to issue WDRs
    007F E08F      LDI	R24,0xF
    0080 BD81      OUT	0x21,R24
    0081 9508      RET
(0029) }
(0030) void timer0_init(void){
(0031)  TCCR0 = 0x00; //stop
_timer0_init:
    0082 2422      CLR	R2
    0083 BE23      OUT	0x33,R2
(0032)  ASSR  = 0x00; //set async mode//同步方式，允许更新计数，比较输出，控制寄存器
    0084 BE20      OUT	0x30,R2
(0033)  TCNT0 = 0x83; //set count
    0085 E883      LDI	R24,0x83
    0086 BF82      OUT	0x32,R24
(0034)  OCR0  = 0x7D;
    0087 E78D      LDI	R24,0x7D
    0088 BF81      OUT	0x31,R24
(0035)  TCCR0 = 0x05; //start timer//128分频
    0089 E085      LDI	R24,5
    008A BF83      OUT	0x33,R24
    008B 9508      RET
_timer0_comp_isr:
    008C 938A      ST	R24,-Y
    008D 939A      ST	R25,-Y
    008E B78F      IN	R24,0x3F
    008F 938A      ST	R24,-Y
(0036) }
(0037) //======================================================time0 中断
(0038) #pragma interrupt_handler timer0_comp_isr:16
(0039) void timer0_comp_isr(void){
(0040)    TCNT0 = 0x83;
    0090 E883      LDI	R24,0x83
    0091 BF82      OUT	0x32,R24
(0041)    T0Count0++;
    0092 91800100  LDS	R24,T0Count0
    0094 91900101  LDS	R25,T0Count0+1
    0096 9601      ADIW	R24,1
    0097 93900101  STS	T0Count0+1,R25
    0099 93800100  STS	T0Count0,R24
    009B 9189      LD	R24,Y+
    009C BF8F      OUT	0x3F,R24
    009D 9199      LD	R25,Y+
    009E 9189      LD	R24,Y+
    009F 9518      RETI
(0042)    
(0043)  //compare occured TCNT0=OCR0
(0044) }
(0045) //call this routine to initialize all peripherals
(0046) void delay(void)
(0047) {
(0048) 
(0049) UI i=0;
_delay:
  j                    --> R16
  i                    --> R18
    00A0 2722      CLR	R18
    00A1 2733      CLR	R19
(0050) UI j=0;
    00A2 2700      CLR	R16
    00A3 2711      CLR	R17
(0051) for(j=0;j<500;j++)
    00A4 C00C      RJMP	0x00B1
(0052) {
(0053)  WDR();
    00A5 95A8      WDR
(0054)  for(i=0;i<5000;i++);
    00A6 2722      CLR	R18
    00A7 2733      CLR	R19
    00A8 C002      RJMP	0x00AB
    00A9 5F2F      SUBI	R18,0xFF
    00AA 4F3F      SBCI	R19,0xFF
    00AB 3828      CPI	R18,0x88
    00AC E1E3      LDI	R30,0x13
    00AD 073E      CPC	R19,R30
    00AE F3D0      BCS	0x00A9
    00AF 5F0F      SUBI	R16,0xFF
    00B0 4F1F      SBCI	R17,0xFF
    00B1 3F04      CPI	R16,0xF4
    00B2 E0E1      LDI	R30,1
    00B3 071E      CPC	R17,R30
    00B4 F380      BCS	0x00A5
    00B5 9508      RET
(0055)  }
(0056)  
(0057) }
(0058) void init_devices(void)
(0059) {
(0060)  //stop errant interrupts until set up
(0061)  CLI(); //disable all interrupts
_init_devices:
    00B6 94F8      BCLR	7
(0062)  XDIV  = 0x00; //xtal divider//系统时钟分频控制寄存器
    00B7 2422      CLR	R2
    00B8 BE2C      OUT	0x3C,R2
(0063)  XMCRA = 0x0E; //external memory//外部存储器控制寄存器
    00B9 E08E      LDI	R24,0xE
    00BA 9380006D  STS	0x6D,R24
(0064)  XMCRB = 0x80;
    00BC E880      LDI	R24,0x80
    00BD 9380006C  STS	0x6C,R24
(0065)  port_init();
    00BF DFA8      RCALL	_port_init
(0066) timer0_init();
    00C0 DFC1      RCALL	_timer0_init
(0067)  MCUCR = 0xC0;//MCU控制寄存器
    00C1 EC80      LDI	R24,0xC0
    00C2 BF85      OUT	0x35,R24
(0068)  EICRA = 0x0A; //extended ext ints//外部中断控制寄存器
    00C3 E08A      LDI	R24,0xA
    00C4 9380006A  STS	0x6A,R24
(0069)  EICRB = 0x0F; //extended ext ints
    00C6 E08F      LDI	R24,0xF
    00C7 BF8A      OUT	0x3A,R24
(0070)  EIMSK = 0x33; //0x03 extended ext enable
    00C8 E383      LDI	R24,0x33
    00C9 BF89      OUT	0x39,R24
(0071)  TIMSK = 0x12; //timer interrupt sources  01:time0
    00CA E182      LDI	R24,0x12
    00CB BF87      OUT	0x37,R24
(0072)  ETIMSK =0x00; //extended timer interrupt sources
    00CC 2422      CLR	R2
    00CD 9220007D  STS	0x7D,R2
(0073)  SEI(); //re-enable interrupts
    00CF 9478      BSET	7
    00D0 9508      RET
(0074)  //all peripherals are now initialized
(0075) }
(0076) void main(void)
(0077) {
(0078) watchdog_init();
_main:
  mid                  --> R20
  i                    --> R22
    00D1 DFAC      RCALL	_watchdog_init
(0079)  WDR();
    00D2 95A8      WDR
(0080)  init_devices();
    00D3 DFE2      RCALL	_init_devices
    00D4 C033      RJMP	0x0108
(0081)  while(1)
(0082)  {
(0083)    UI i=0;
    00D5 2766      CLR	R22
    00D6 2777      CLR	R23
(0084)    WDR();
    00D7 95A8      WDR
(0085)    if(T0Count0>10)
    00D8 E08A      LDI	R24,0xA
    00D9 E090      LDI	R25,0
    00DA 90200100  LDS	R2,T0Count0
    00DC 90300101  LDS	R3,T0Count0+1
    00DE 1582      CP	R24,R2
    00DF 0593      CPC	R25,R3
    00E0 F538      BCC	0x0108
(0086)    {
(0087)     UC mid=0x01;
    00E1 E041      LDI	R20,1
(0088)     WDR();
    00E2 95A8      WDR
(0089)     T0Count0=0;
    00E3 2422      CLR	R2
    00E4 2433      CLR	R3
    00E5 92300101  STS	T0Count0+1,R3
    00E7 92200100  STS	T0Count0,R2
(0090) 	
(0091) 	for(i=0;i<8;i++)
    00E9 C009      RJMP	0x00F3
(0092) 	{
(0093) 	 delay();
    00EA DFB5      RCALL	_delay
(0094) 	 PORTB=~mid;
    00EB 2E24      MOV	R2,R20
    00EC 9420      COM	R2
    00ED BA28      OUT	0x18,R2
(0095) 	 mid=mid*2;
    00EE E082      LDI	R24,2
    00EF 9F84      MUL	R24,R20
    00F0 2D40      MOV	R20,R0
    00F1 5F6F      SUBI	R22,0xFF
    00F2 4F7F      SBCI	R23,0xFF
    00F3 3068      CPI	R22,0x8
    00F4 E0E0      LDI	R30,0
    00F5 077E      CPC	R23,R30
    00F6 F398      BCS	0x00EA
(0096) 	 
(0097) 	}
(0098) 		
(0099) 	PORTB=0xFF;
    00F7 EF8F      LDI	R24,0xFF
    00F8 BB88      OUT	0x18,R24
(0100) 	delay();
    00F9 DFA6      RCALL	_delay
(0101) 	PORTD=0xEF;
    00FA EE8F      LDI	R24,0xEF
    00FB BB82      OUT	0x12,R24
(0102) 	delay();
    00FC DFA3      RCALL	_delay
(0103) 	PORTD=0xDF;
    00FD ED8F      LDI	R24,0xDF
    00FE BB82      OUT	0x12,R24
(0104) 	delay();
    00FF DFA0      RCALL	_delay
(0105) 	PORTD=0xBF;
    0100 EB8F      LDI	R24,0xBF
    0101 BB82      OUT	0x12,R24
(0106) 	delay();
    0102 DF9D      RCALL	_delay
(0107) 	PORTD=0x7F;
    0103 E78F      LDI	R24,0x7F
    0104 BB82      OUT	0x12,R24
(0108) 	delay();
    0105 DF9A      RCALL	_delay
(0109) 	PORTD=0xFF;
FILE: <library>
    0106 EF8F      LDI	R24,0xFF
    0107 BB82      OUT	0x12,R24
    0108 CFCC      RJMP	0x00D5
    0109 9508      RET