char_mode_bkup.v

Viertex 2 开发板的接口程序

//     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
//     SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR
//     XILINX DEVICES.  BY PROVIDING THIS DESIGN, CODE, OR INFORMATION
//     AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION
//     OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS
//     IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
//     AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
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//     WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
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//     INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
//     FOR A PARTICULAR PURPOSE.
//
//     (c) Copyright 2004 Xilinx, Inc.
//     All rights reserved.
//
/*
-------------------------------------------------------------------------------
   Title      : Character Mode Video Data Creation
   Project    : XUP Virtex-II Pro Development System 
-------------------------------------------------------------------------------
   File       : HW_BIST.v
   Company    : Xilinx, Inc.
   Created    : 2004/08/12
   Last Update: 2004/08/13
   Copyright  : (c) Xilinx Inc, 2004
-------------------------------------------------------------------------------
   Uses       : CHARACTER_MODE.v
-------------------------------------------------------------------------------
   Used by    : HW_BIST.v
-------------------------------------------------------------------------------
 Description: This module is used to create the character mode video data.
 			  The board serial number and the keyboard and mouse port data is
			  written into the character mode BRAM.

		   	  The user can augment the character mode area of the display
			  with 12 rows of text corresponding to character address 640-1599
		   	  using the external character mode control signals. 

			  The data write side of the BRAMs is clocked by the system clock
			  and the read side is clocked by the pixel clock. This is done
			  to allow for synchronization between the processor bus and the
			  external character mode control signals. 

			  To use the external data mode the address and data should be presented
			  on the ext_char_addr and ext_char_data buses, ext_write_enable and
			  ext_request should then be asserted. If the character address is 
			  within the valid range, the data will be written into character mode
			  video RAM on the next rising edge of the system clock.

 
	Conventions:
		All external port signals are UPPER CASE.
		All internal signals are LOWER CASE and are active HIGH.

-------------------------------------------------------------------------------
*/

module CHAR_MODE
(
char_mode_address,
char_line_count,
char_pixel,
pixel_clock,
write_clock,
reset,
sn_1,
sn_2,
sn_3,
sn_4,
sn_5,
sn_6,
sn_7,
sn_8,
sn_9,
sn_10,
sn_11,
sn_12,
ps2_mouse_ascii,
ps2_kbd_ascii,
char_mode_data,
ext_char_addr,
ext_char_data,
ext_write_enable,
ext_request
);

input	[12:0]	char_mode_address;	// the block address of the character in character mode
input	[2:0]	char_line_count;	// the line number within a character block 0-8
input	[2:0]	char_pixel;			// the pixel number within a character block 0-8
input			pixel_clock;
input			write_clock;		// clock for the write address counter
input			reset;
input	[7:0]	sn_1;				// Silicon Serial Number
input	[7:0]	sn_2;
input	[7:0]	sn_3;
input	[7:0]	sn_4;
input	[7:0]	sn_5;
input	[7:0]	sn_6;
input	[7:0]	sn_7;
input	[7:0]	sn_8;
input	[7:0]	sn_9;
input	[7:0]	sn_10;
input	[7:0]	sn_11;
input	[7:0]	sn_12;
input	[7:0]	ps2_mouse_ascii;	// PS/2 mouse port character
input	[7:0]	ps2_kbd_ascii;		// PS/2 keyboard port character
output	[7:0]	char_mode_data;		// character mode video data

input   [11:0] 	ext_char_addr;		// character address for external data
input	[7:0]  	ext_char_data;		// external character data
input			ext_write_enable;	// external write enable
input			ext_request;		// flag to request external access to the character RAM			

reg		[7:0]	char_write_data;
reg		[12:0] 	char_write_addr;
wire			write_enable		= 1'b1;

wire 	[11:0]	ext_char_addr;
wire	[7:0]  	ext_char_data;
wire			ext_write_enable;
wire			ext_request;
reg				valid_ext_request;


// create a flag to allow external access to the RAM if the address is in row 9 to row 20
	always @ (ext_request or ext_char_addr) begin
	if (ext_char_addr > 639 & ext_char_addr < 1600) begin
		valid_ext_request <= ext_request;
		end
	else begin
		valid_ext_request <= 1'b0;
		end
	end



// create the write address counter
always @ (posedge write_clock or posedge reset) begin
	if (reset) begin
		char_write_addr <= 13'h0000;
		end
	else if (char_write_addr == 590) begin
		char_write_addr <= 13'h0000;
		end
	else begin
		char_write_addr <= char_write_addr + 1;
		end
	end


// create the character mode text data in memory
always @ (char_write_addr  or sn_12 or sn_11 or sn_10 or sn_9 or sn_8 or sn_7
 or sn_6 or sn_5 or sn_4 or sn_3 or sn_2 or sn_1 or ps2_mouse_ascii[7:0] or ps2_kbd_ascii[7:0]) begin
case (char_write_addr)
00:begin	// 1st row
	char_write_data = 8'h01;	// Xilinx bug top left
	end

01:begin
	char_write_data = 8'h02;	// Xilinx bug top right
	end

80:begin	// 2nd row
	char_write_data = 8'h03;	// Xilinx bug bottom left
	end

81:begin
	char_write_data = 8'h04;	// Xilinx bug bottom right
	end

83:begin 										
	char_write_data = 8'h58;	// X
	end
84:begin
	char_write_data = 8'h49;	// I
	end
85:begin	
	char_write_data = 8'h4C;	// L
	end
86:begin	
	char_write_data = 8'h49;	// I
	end
87:begin	
	char_write_data = 8'h4E;	// N
	end
88:begin	
	char_write_data = 8'h58;	// X
	end
89:begin	
	char_write_data = 8'h20;	// space
	end
90:begin	
	char_write_data = 8'h52;	// R
	end
91:begin	
	char_write_data = 8'h45;	// E
	end
92:begin	
	char_write_data = 8'h53;	// S
	end
93:begin	
	char_write_data = 8'h45;	// E
	end
94:begin	
	char_write_data = 8'h41;	// A
	end
95:begin	
	char_write_data = 8'h52;	// R
	end
96:begin	
	char_write_data = 8'h43;	// C
	end
97:begin	
	char_write_data = 8'h48;	// H
	end
98:begin	
	char_write_data = 8'h20;	// space
	end
99:begin	
	char_write_data = 8'h4C;	// L
	end
100:begin	
	char_write_data = 8'h41;	// A
	end
101:begin	
	char_write_data = 8'h42;	// B
	end
102:begin	
	char_write_data = 8'h53;	// S
	end
140:begin	
	char_write_data = 8'h52;	// R
	end
141:begin	
	char_write_data = 8'h69;	// i
	end
142:begin	
	char_write_data = 8'h63;	// c
	end
143:begin	
	char_write_data = 8'h6B;	// k
	end
144:begin	
	char_write_data = 8'h20;	// space
	end
145:begin	
	char_write_data = 8'h42;	// B
	end
146:begin	
	char_write_data = 8'h61;	// a
	end
147:begin	
	char_write_data = 8'h6C;	// l
	end
148:begin	
	char_write_data = 8'h6C;	// l
	end
149:begin	
	char_write_data = 8'h61;	// a
	end
150:begin	
	char_write_data = 8'h6E;	// n
	end
151:begin	
	char_write_data = 8'h74;	// t
	end
152:begin	
	char_write_data = 8'h79;	// y
	end
153:begin	
	char_write_data = 8'h6E;	// n
	end
154:begin	
	char_write_data = 8'h65;	// e
	end
155:begin	
	char_write_data = 8'h20;	// SPACE
	end
156:begin	
	char_write_data = 8'h32;	// 2
	end
157:begin	
	char_write_data = 8'h30;	// 0
	end
158:begin	
	char_write_data = 8'h30;	// 0
	end
159:begin	
	char_write_data = 8'h34;	// 4
	end

240:begin							//4th ROW			
	char_write_data = 8'h58;	// X
	end
241:begin	
	char_write_data = 8'h55;	// U
	end
242:begin	
	char_write_data = 8'h50;	// P
	end
243:begin	
	char_write_data = 8'h20;	// space
	end
244:begin	
	char_write_data = 8'h56;	// V 
	end
245:begin	
	char_write_data = 8'h69;	// i
	end
246:begin	
	char_write_data = 8'h72;	// r
	end
247:begin	
	char_write_data = 8'h74;	// t
	end
248:begin	
	char_write_data = 8'h65;	// e
	end
249:begin	
	char_write_data = 8'h78;	// x
	end
250:begin	
	char_write_data = 8'h2D;	// -
	end
251:begin	
	char_write_data = 8'h49;	// I
	end
252:begin	
	char_write_data = 8'h49;	// I
	end
253:begin	
	char_write_data = 8'h20;	// space
	end
254:begin	
	char_write_data = 8'h50;	// P
	end
255:begin	
	char_write_data = 8'h72;	// r
	end
256:begin	
	char_write_data = 8'h6F;	// o
	end
257:begin	
	char_write_data = 8'h20;	// space
	end
258:begin	
	char_write_data = 8'h44;	// D
	end
259:begin	
	char_write_data = 8'h65;	// e
	end
260:begin	
	char_write_data = 8'h76;	// v
	end
261:begin	
	char_write_data = 8'h65;	// e
	end
262:begin	
	char_write_data = 8'h6C;	// l
	end
263:begin	
	char_write_data = 8'h6F;	// o
	end
264:begin	
	char_write_data = 8'h70;	// p
	end
265:begin	
	char_write_data = 8'h6D;	// m
	end
266:begin	
	char_write_data = 8'h65;	// e
	end
267:begin	
	char_write_data = 8'h6E;	// n
	end
268:begin	
	char_write_data = 8'h74;	// t
	end
269:begin	
	char_write_data = 8'h20;	// SPACE
	end
270:begin	
	char_write_data = 8'h53;	// S