bist.prj

Viertex 2 开发板的接口程序

#-- Synplicity, Inc.
#-- Version 7.5.1     
#-- Project file C:\ML_XUP\edk_6_2_builds\ML_XUP_Interim_Integrated_BIST_rev0\pcores\hw_bist_v1_00_a\synplicity_build\BIST.prj
#-- Written on Mon Aug 30 14:56:40 2004


#add_file options
add_file -verilog "BLACK_BOXES.v"
add_file -verilog "CLOCK_GEN.v"
add_file -verilog "EXPANSION_PORTS.v"
add_file -verilog "VIDEO_RAM.v"
add_file -verilog "COLOR_BARS.v"
add_file -verilog "VIDEO_OUT.v"
add_file -verilog "RAMP.v"
add_file -verilog "SVGA_TIMING_GENERATION.v"
add_file -verilog "SVGA_DEFINES.v"
add_file -verilog "ps2_keyboard_interface.v"
add_file -verilog "PS2.v"
add_file -verilog "CHAR_RAM.v"
add_file -verilog "CHAR_GEN_ROM.v"
add_file -verilog "CHARACTER_MODE.v"
add_file -verilog "special_clk_div.v"
add_file -verilog "ONEWIRE_IFACE.v"
add_file -verilog "HEX_2_ASCII.V"
add_file -verilog "jcnt2.v"
add_file -verilog "jcnt1.v"
add_file -verilog "crcreg.v"
add_file -verilog "sr2.v"
add_file -verilog "sr1.v"
add_file -verilog "parallel_sn_data.v"
add_file -verilog "bitreg.v"
add_file -verilog "ONEWIRE_MASTER.v"
add_file -verilog "SSN.v"
add_file -verilog "CHAR_MODE.v"
add_file -verilog "AUDIO_LEDS_PB_SWITCHES.v"
add_file -verilog "HW_BIST.v"


#implementation: "netlist"
impl -add netlist

#device options
set_option -technology VIRTEX2P
set_option -part XC2VP2
set_option -package FG256
set_option -speed_grade -7

#compilation/mapping options
set_option -default_enum_encoding default
set_option -symbolic_fsm_compiler 1
set_option -resource_sharing 1
set_option -use_fsm_explorer 0

#map options
set_option -frequency 1.000
set_option -fanout_limit 10000
set_option -disable_io_insertion 1
set_option -pipe 0
set_option -update_models_cp 0
set_option -verification_mode 0
set_option -fixgatedclocks 0
set_option -modular 0
set_option -retiming 0

#simulation options
set_option -write_verilog 0
set_option -write_vhdl 0

#automatic place and route (vendor) options
set_option -write_apr_constraint 1

#set result format/file last
project -result_file "../netlist/hw_bist.edf"
impl -active "netlist"