jcnt1.v

Viertex 2 开发板的接口程序

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/*
-------------------------------------------------------------------------------
-- Title      : Two bit Johnson counter with synchronous reset
-- Project    : XUP Virtex-II Pro Demonstration System
-------------------------------------------------------------------------------
-- File       : jcnt1.v
-- Company    : Xilinx Inc
-- Created    : 2001/03/15
-- Last update: 2001/03/15
-- Copyright  : (c) Xilinx Inc 1999, 2000
-------------------------------------------------------------------------------
-- Uses       : 
-------------------------------------------------------------------------------
-- Used by    : onewire_master.v
-------------------------------------------------------------------------------

-- Description: Two bit Johnson counter with synchronous reset
-------------------------------------------------------------------------------
*/



module JCNT1 (clk,reset,en,q);
input clk;
input reset;
input en;
output [1:0] q;
reg [1:0] q;

always @ (posedge clk) begin
	if (reset) begin
		q[1:0] <= 2'b00;
		end
	else if (en) begin
		q[1] <=  q[0] ;
		q[0] <= !q[1];
		end
	end

endmodule