📄 bldc3pwm.lst
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dspa -q -l -s -i../../../rtmon -i../../../sys/bldc3_2/asm -i..\..\..\rtmon -i..\..\..\sys\bldc3_2\asm -v2xx -iC:/ti/c2400/cgtools/include -g bldc3pwm.asm bldc3pwm.obj
TMS320C24xx COFF Assembler Version 7.02 Sun Apr 27 22:05:44 2003
Copyright (c) 1987-2002 Texas Instruments Incorporated
bldc3pwm.asm PAGE 1
1 ;============================================================================
2 ; File Name: Bldc3pwm.asm
3 ;
4 ; Module Name: BLDC_3PWM_DRV
5 ;
6 ; Initialization Routine: BLDC_3PWM_DRV_INIT
7 ;
8 ; Originator: Digital Control Systems Group
9 ; Texas Instruments
10 ;
11 ; Description: Controls switching state of Inverter driving a BLDC motor
12 ;
13 ; |~~~~~~~~~~~~~~~|
14 ; cmtn_ptr_bdo----->| |----->o CMPR1 (EV register)
15 ; D_func o------>| BLDC_3PWM_DRV |----->o CMPR2 (EV register)
16 ; Mfunc_p o------>| |----->o CMPR3 (EV register)
17 ; | |----->o T1PER (EV register)
18 ; |_______________|
19 ;
20 ;
21 ;
22 ;=====================================================================================
23 ; History:
24 ;-------------------------------------------------------------------------------------
25 ; 9-15-2000 Release Rev 1.0
26 ;=============================================================================
27 ;(To use this Module, copy this section to main system file)
28 ; .ref BLDC_3PWM_DRV, BLDC_3PWM_DRV_INIT ;function call
29 ; .ref cmtn_ptr_bd, D_func, Mfunc_p ;Inputs
30 ; Note: CMPR1, CMPR2, CMPR3, T1PR are defined in .h file
31 ;=============================================================================
32 ;Module definitions for external reference.
33 .def BLDC_3PWM_DRV, BLDC_3PWM_DRV_INIT ;function call
34 .def cmtn_ptr_bd, D_func, Mfunc_p ;Inputs
35 ;=============================================================================
36 .include x24x_app.h
37
38
39 0001 ACTIVE_HI .set 1 ;Select ACTIVE_HI or ACTIVE_LO by setting
40 0000 ACTIVE_LO .set 0 ;the corresponding parameter to 1. Set the other
41 ;parameter to 0.
42 ;This setting depends on Power devices. ACTIVE_HI implies the power device turns
43 ;ON with a HIGH gate signal. ACTIVE_LO implies the power device turns
44 ;ON with a LOW gate signal. This polarity definition is not the same as the PWM
45 ;polarity(Active High/Active Low) defined by the ACTR
46 ;register in x24x/x24xx. The setting chosen here is applicable only when ACTR
47 ;is configured to generate Active High PWM.
48
49 ;==============================================================================
50 ;Variable Definitions for BLDC_PWM module
51 ;------------------------------------------------------------------------------
52
53 ;cmtn_ptr_bd .usect "bldc3pwm",1 ;Commutation pointer
54 ;D_func .usect "bldc3pwm",1
TMS320C24xx COFF Assembler Version 7.02 Sun Apr 27 22:05:44 2003
Copyright (c) 1987-2002 Texas Instruments Incorporated
bldc3pwm.asm PAGE 2
55 ;Mfunc_p .usect "bldc3pwm",1
56 ;period_max .usect "bldc3pwm",1
57 ;period .usect "bldc3pwm",1
58 ;GPR0_BLDC_PWM .usect "bldc3pwm",1
59
60 0000 bldc3pwm_vars .usect "bldc3pwm",6,1
61 0000- cmtn_ptr_bd .set bldc3pwm_vars+0 ;Commutation pointer
62 0001- D_func .set bldc3pwm_vars+1
63 0002- Mfunc_p .set bldc3pwm_vars+2
64 0003- period_max .set bldc3pwm_vars+3
65 0004- period .set bldc3pwm_vars+4
66 0005- GPR0_BLDC_PWM .set bldc3pwm_vars+5
67
68
69 ;===============================================================================
70 0000 BLDC_3PWM_DRV_INIT:
71 ;===============================================================================
72 ;---target dependancy-----------------------------------------------------------
73 .if (x240) ;target dependancy
74 FPERIOD .set 1000 ;1000 x 50nS = 50uS, i.e. 20KHz PWM
75
76 ; Initialize Event Manager
77
78 ;PWM Unit setting
79 ldp #Mfunc_p
80 SPLK #FPERIOD, period_max
81 SPLK #7FFFh, Mfunc_p
82
83 ;Configure Full Compare registers
84 POINT_EV
85 ; SPLK #FPERIOD, T1PER ;temporary init only
86 SPLK #FPERIOD, T1PER ;temporary init only
87 SPLK #0000h,ACTR
88 SPLK #0000001000000000b,COMCON ;Compare Cntl
89 SPLK #1000001000000000b,COMCON ;Compare Cntl
90 SPLK #1001000001000000b,T1CON ;Asym
91 SPLK #0000000000000000b,GPTCON
92 ;||||!!!!||||!!!!
93 ;5432109876543210
94 .endif
95 ;-------------------------------------------------------------------------------
96
97 ;---target dependancy-----------------------------------------------------------
98 .if (x243) ;target dependancy
99
100 FPERIOD .set 1000 ;1000 x 50nS = 50uS, i.e. 20KHz PWM
101
102 ; Initialize Event Manager
103
104 ;PWM Unit setting
105 ldp #Mfunc_p
106 SPLK #FPERIOD, period_max
107 SPLK #7FFFh, Mfunc_p
108
TMS320C24xx COFF Assembler Version 7.02 Sun Apr 27 22:05:44 2003
Copyright (c) 1987-2002 Texas Instruments Incorporated
bldc3pwm.asm PAGE 3
109 ;Configure Full Compare registers
110 POINT_EV
111 ; SPLK #FPERIOD, T1PER ;temporary init only
112 SPLK #FPERIOD, T1PER ;temporary init only
113 SPLK #0000h,ACTR
114 SPLK #0000001000000000b,COMCON ;Compare Cntl
115 SPLK #1000001000000000b,COMCON ;Compare Cntl
116 SPLK #1001000001000000b,T1CON ;Asym
117 SPLK #0000000000000000b,GPTCON
118 ;||||!!!!||||!!!!
119 ;5432109876543210
120
121 ;Enable Primary function on CMP1-CMP6 PWM outputs
122 POINT_PF2 ;OCRA.6 - OCRA.11
123 LACC OCRA
124 OR #0000111111000000b
125 ;||||!!!!||||!!!!
126 ;5432109876543210
127 SACL OCRA
128
129 .endif
130 ;--------------------------------------------------------------------------------
131
132 ;---target dependancy------------------------------------------------------------
133 .if (x2407) ;target dependancy
134
135 07d0 FPERIOD .set 2000 ;2000 x 25nS = 50uS, i.e. 20KHz PWM
136
137 ; Initialize Event Manager
138
139 ;PWM Unit setting
140 0000 bc00- ldp #Mfunc_p
141 0001 ae03- SPLK #FPERIOD, period_max
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