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at91rm9200的启动代码,开发环境ads1.2,这是本人学习过程中产生de

swivec
                B           swivec          	; Software Interrupt
pabtvec
                B           pabtvec         	; Prefetch Abort
dabtvec
                B           dabtvec         	; Data Abort
rsvdvec
                B           rsvdvec         	; reserved
irqvec
                ldr         pc, [pc,#-0xF20]    ; IRQ : read the AIC
                ;'&' is same as '0x' [DUI0204E_rvct_assembler_guide.pdf 3.6.4 Numeric literals]
                ; address of AIC_IVR is 0xfffff100, pc=0x18+0x8 ,then 0x18+0x8-0xf20=0xfffff100.
fiqvec
                B           fiqvec          	; FIQ

;-------------------
;- The reset handler
;-------------------
InitReset

;------------------------------------------------------------------------------
;-PMC initialisation : Enable the Main Oscillator
;------------------------------------------------------------------------------
;-Slow clock mode init
;-After reset, only the 32KHz oscillator is enabled.
;-The ARM7TDMI or ARM9 runs the first instructions at 32768Hz <=> Slow Clock.
;-The processor clock and master clock are enabled at slow clock.
;-All the peripheral clocks are disabled.
;-The main oscillator is disabled.
;------------------------------------------------------------------------------

;------------------------------------------------------------------------------
;Step 1.
;------------------------------------------------------------------------------
;-Enabling the Main Oscillator
;-Normally First instruction in PMC initialisation
;------------------------------------------------------------------------------
;[doc1768.pdf 23.4.5.3 Main Oscillator Control]
;-Main oscillator Enable register	APMC_MOR : Enable main oscillator , OSCOUNT = 0xFF
	ldr     r1, = AT91C_BASE_CKGR	; Get the CKGR Base Address
	ldr 	r0, = AT91C_CKGR_MOSCEN:OR:AT91C_CKGR_OSCOUNT     ; = Main Oscillator Enable :OR: Main Oscillator Start-up Time
	str     r0, [r1, #CKGR_MOR]

;------------------------------------------------------------------------------
;- Setup the stack for each mode
;-------------------------
;- The processor will remain in the last initialized mode.
;------------------------------------------------------------------------------

;- Load the stack base addresses

	; "." is Address of current instruction [DUI0204E_rvct_assembler_guide.pdf Table 3-2 Built-in variables]
	;[DUI0204E_rvct_assembler_guide.pdf 2.3.1 Layout of assembly language source files]
	;Labels
	;Labels are symbols that represent addresses. The address given by a label is calculated
	;during assembly.
	;The assembler calculates the address of a label relative to the origin of the section where
	;the label is defined. A reference to a label within the same section can use the PC plus
	;or minus an offset. This is called program-relative addressing.
	;Addresses of labels in other sections are calculated at link time, when the linker has
	;allocated specific locations in memory for each section.

	; 段起始地址为 0   "." 和 "StackData" 都是相对于段起始位置的偏移则
	; 假设 .= a 那么 pc = a+8 再假设 StackData = b 那么 StackData和 pc之间的距离就是
	; b-(a+8)=b-a-8= -(8+a-b) = -(8+.-b)=-(8+.-StackData)
	; 所以 add     r0, pc,#-(8+.-StackData) 就将StackData的地址存在了r0中。
	;<<ARM 体系结构与编程>> p50,p53
	; ia--Increment After    ib--Increment Before    da--Decrement After    db--Decrement Before
	; fd--Full Descending    ed--Empty Descending    fa--Full Ascending     ea--Empty Ascending

	add     r0, pc,#-(8+.-StackData)  ; @ where to read values (relative)
	ldmia   r0, {r1-r6}

;- Set up Supervisor Mode and set SVC Mode Stack
	msr     cpsr_c, #ARM_MODE_SVC:OR:I_BIT:OR:F_BIT
	bic     r1, r1, #3                  ; Insure word alignement
	mov     sp, r1                      ; Init stack SYS

;- Set up Interrupt Mode and set IRQ Mode Stack
	msr     CPSR_c, #ARM_MODE_IRQ:OR:I_BIT:OR:F_BIT
	bic     r2, r2, #3                  ; Insure word alignement
	mov     sp, r2                      ; Init stack IRQ

;- Set up Fast Interrupt Mode and set FIQ Mode Stack
	msr     CPSR_c, #ARM_MODE_FIQ:OR:I_BIT:OR:F_BIT
	bic     r3, r3, #3                  ; Insure word alignement
	mov     sp, r3                      ; Init stack FIQ

;- Set up Abort Mode and set Abort Mode Stack
	msr     CPSR_c, #ARM_MODE_ABORT:OR:I_BIT:OR:F_BIT
	bic     r4, r4, #3                  ; Insure word alignement
	mov     sp, r4                      ; Init stack Abort

;- Set up Undefined Instruction Mode and set Undef Mode Stack
	msr     CPSR_c, #ARM_MODE_UNDEF:OR:I_BIT:OR:F_BIT
	bic     r5, r5, #3                  ; Insure word alignement
	mov     sp, r5                      ; Init stack Undef

;- Set up user Mode and set user Mode Stack
	msr     CPSR_c, #ARM_MODE_SYS:OR:I_BIT:OR:F_BIT
	bic     r6, r6, #3                  ; Insure word alignement
	mov     sp, r6                      ; Init stack Undef

	b       EndInitStack

StackData
	DCD     AT91_SVC_Stack_Begin
	DCD     AT91_IRQ_Stack_Begin
	DCD     AT91_FIQ_Stack_Begin
	DCD     AT91_ABT_Stack_Begin
	DCD     AT91_UND_Stack_Begin
	DCD     AT91_USER_Stack_Begin
EndInitStack

;------------------------------------------------------------------------------
;-Low level Init (PMC, AIC, EBI, ....)
;------------------------------------------------------------------------------

;- Add loop to compensate Main Oscillator startup time
	ldr 	r0, =0x00000010
LoopOsc
	subs    r0, r0, #1
	bhi     LoopOsc

	IMPORT    AT91F_LowLevelInit

	ldr       r0, = AT91F_LowLevelInit
	mov       lr, pc
	bx        r0
	; to aviod init failure in 'AT91F_LowLevelInit'
	; the IRD disabled when run 'AT91F_LowLevelInit'. so ...
	msr     CPSR_c, #ARM_MODE_SYS:OR:F_BIT ;enable IRQ

;-------------------------------------
; Read/modify/write CP15 control register
;-------------------------------------
    MRC     p15, 0, r0, c1, c0,0 ; read cp15 control registre (cp15 r1) in r0
    ldr     r3, =0xC0000080      ; Reset bit :Little Endian end fast bus mode
    ldr     r4, =0xC0004000      ; Set bit :Asynchronous clock mode, Not Fast Bus, Round Robin replacement
    bic     r0, r0, r3
    orr     r0, r0, r4
    MCR     p15, 0, r0, c1, c0,0 ; write r0 in cp15 control registre (cp15 r1)

;------------------------------------------------------------------------------
;- Initialise C variables
;------------------------
;- Following labels are automatically generated by the linker.
;- RO: Read-only = the code
;- RW: Read Write = the data pre-initialized and zero-initialized.
;- ZI: Zero-Initialized.
;- Pre-initialization values are located after the code area in the image.
;- Zero-initialized datas are mapped after the pre-initialized.
;- Note on the Data position :
;- If using the ARMSDT, when no -rw-base option is used for the linker, the
;- data area is mapped after the code. You can map the data either in internal
;- SRAM ( -rw-base=0x40 or 0x34) or in external SRAM ( -rw-base=0x2000000 ).
;- Note also that to improve the code density, the pre_initialized data must
;- be limited to a minimum.
;------------------------------------------------------------------------------
;[DUI0203E_rvct_developer_guide.pdf 2.4.3 Scatter-loading description file example]
; 如果使用scatter-loading的话,编译连接后产生的映象中RW的存放位置和运行时的位置是
; 可以不一样的,这样的话,程序运行时就因该将RW段搬运到它应该在的位置
; 理解一:
; RW段在连接产生的映象文件中的存放位置由scater文件指定,因为系统中的存储器是不连续的
; ROM 和 RAM 之间是有很大的距离的,连接产生的映象文件是要烧入ROM的,而RW段应该在RAM中
; 所以需要在运行时由用户代码或者C库的初始化代码将之搬运到正确的位置上.
; 理解二:
; C程序的main执行前,程序的RW段需要初始化成用户指定的数据,ZI段需要清零.但是初始化数据是存放在哪儿
; 的呢?--只有一个地方,那就是连接产生的映象文件--也就是要烧入ROM中的文件.但是它存放的位置一般来说
; 都是只读存储器,所以它的运行时地址是不一样的(scater指定),这样必须在程序运行时由用户代码或者C库
; 的初始化代码将之搬运到正确的位置上.ZI段不存在搬运的问题,只需要清零.
;
	add     r2, pc,#-(8+.-CInitData)  ; @ where to read values (relative)
	ldmia   r2, {r0, r1, r3, r4}
; r0 = 编译连接产生的映象文件中 RO 末尾 = 该映象中存放RW数据的起点
; r1 = 连接时确定的RW段运行时的地址
; r3 = 连接时确定的ZI段运行时的地址
; r4 = 连接时确定的ZI段运行时尾部

	cmp         r0, r1                  ; Check that they are different 如果相等说明RW的映象文件中的地址和运行时地址相同,不需要搬运
	beq         EndRW
LoopRW
	cmp         r1, r3                  ; Copy init data
	ldrcc       r2, [r0], #4
	strcc       r2, [r1], #4
	bcc         LoopRW
EndRW

	mov         r2, #0
LoopZI
	cmp         r3, r4                  ; Zero init
	strcc       r2, [r3], #4
	bcc         LoopZI

	b           EndInitC

CInitData
 	IMPORT      |Image$$RO$$Limit|      ; End of ROM code (=start of ROM data)
	IMPORT      |Image$$RW$$Base|       ; Base of RAM to initialise
	IMPORT      |Image$$ZI$$Base|       ; Base and limit of area
	IMPORT      |Image$$ZI$$Limit|      ; Top of zero init segment

	DCD     |Image$$RO$$Limit|      ; End of ROM code (=start of ROM data)
 	DCD     |Image$$RW$$Base|       ; Base of RAM to initialise
 	DCD     |Image$$ZI$$Base|       ; Base and limit of area
 	DCD     |Image$$ZI$$Limit|      ; Top of zero init segment
EndInitC


;------------------------------------------------------------------------------
;- Branch on C code Main function (with interworking)
;----------------------------------------------------
;- Branch must be performed by an interworking call as either an ARM or Thumb
;- main C function must be supported. This makes the code not position-
;- independant. A Branch with link would generate errors
;------------------------------------------------------------------------------
	IMPORT      main
_main
__main
	EXPORT    _main
	EXPORT    __main
	ldr       r0, =main
	mov       lr, pc
	bx        r0

;------------------------------------------------------------------------------
;- Loop for ever
;---------------
;- End of application. Normally, never occur.
;- Could jump on Software Reset ( B 0x0 ).
;------------------------------------------------------------------------------
End
	b           End



            END