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312 1 USBIRQ = bmSOF; // Clear SOF IRQ
313 1 }
314
315 void ISR_Ures(void) interrupt 0
316 {
317 1 //
318 1 // Arm all of the OUT endpoints so they can accept data
319 1 //
320 1 EPIO[OUT1BUF_ID].bytes = 0;
321 1 EPIO[OUT2BUF_ID].bytes = 0;
322 1 EPIO[OUT3BUF_ID].bytes = 0;
323 1 EPIO[OUT4BUF_ID].bytes = 0;
324 1 EPIO[OUT5BUF_ID].bytes = 0;
325 1 EPIO[OUT6BUF_ID].bytes = 0;
326 1 EPIO[OUT7BUF_ID].bytes = 0;
327 1
328 1 EZUSB_IRQ_CLEAR();
329 1 USBIRQ = bmURES; // Clear URES IRQ
330 1 }
331
332 void ISR_IBN(void) interrupt 0
333 {
334 1 // ISR for the IN Bulk NAK (IBN) interrupt.
335 1 }
336
337 void ISR_Susp(void) interrupt 0
338 {
339 1 Sleep = TRUE;
340 1
341 1 EZUSB_IRQ_CLEAR();
342 1 USBIRQ = bmSUSP;
343 1 }
344
345 void ISR_Ep0in(void) interrupt 0
346 {
347 1 }
348
349 void ISR_Ep0out(void) interrupt 0
350 {
351 1 }
352
353 void ISR_Ep1in(void) interrupt 0
354 {
355 1 }
356
357 void ISR_Ep1out(void) interrupt 0
358 {
359 1 int i;
360 1
361 1 //
362 1 // workaround to cover the case where the host thinks the
363 1 // previous IN completed but EZ-USB didn't receive a valid
364 1 // handshake (i.e. the ACK was scrambled). If we have
365 1 // received new OUT data (which we have, because we're in this
C51 COMPILER V7.00 PERIPH 09/27/2002 10:11:22 PAGE 7
366 1 // ISR) but the corresponding IN endpoint is still busy, then
367 1 // we know we missed the handshake. The solution is to flip
368 1 // the data toggle and proceed with the new data.
369 1 //
370 1 // NOTE: This workaround is specific to this particular loopback
371 1 // application and should not be included in normal endpoint handling
372 1 // firmware.
373 1 //
374 1 if (EPIO[IN1BUF_ID].cntrl & bmEPBUSY)
375 1 {
376 2 TOGCTL = 0x08 | IN1BUF_ID;
377 2 WRITEDELAY();
378 2 if (TOGCTL & 0x80)
379 2 TOGCTL |= 0x20;
380 2 else
381 2 TOGCTL |= 0x40;
382 2 }
383 1
384 1 // Loop the data to the IN endpoint
385 1 for (i=0; i < OUT1BC; i++)
386 1 {
387 2 IN1BUF[i] = ~OUT1BUF[i];
388 2 }
389 1
390 1 // Arm the IN endpoint
391 1 IN1BC = i;
392 1
393 1 // Arm the OUT so it can receive the next packet
394 1 OUT1BC = 0;
395 1
396 1
397 1 // clear the IRQ
398 1 EZUSB_IRQ_CLEAR();
399 1 OUT07IRQ = bmEP1;
400 1 }
401
402 void ISR_Ep2in(void) interrupt 0
403 {
404 1 }
405
406 void ISR_Ep2out(void) interrupt 0
407 {
408 1 int i;
409 1
410 1 if (EPIO[IN2BUF_ID].cntrl & bmEPBUSY)
411 1 {
412 2 TOGCTL = 0x08 | IN2BUF_ID;
413 2 WRITEDELAY();
414 2 if (TOGCTL & 0x80)
415 2 TOGCTL |= 0x20;
416 2 else
417 2 TOGCTL |= 0x40;
418 2 }
419 1
420 1 // Loop the data to the IN endpoint
421 1 for (i=0; i < OUT2BC; i++)
422 1 {
423 2 IN2BUF[i] = ~OUT2BUF[i];
424 2 }
425 1
426 1 // Arm the IN endpoint
427 1 IN2BC = i;
C51 COMPILER V7.00 PERIPH 09/27/2002 10:11:22 PAGE 8
428 1
429 1 // Arm the OUT so it can receive the next packet
430 1 OUT2BC = 0;
431 1
432 1 // clear the IRQ
433 1 EZUSB_IRQ_CLEAR();
434 1 OUT07IRQ = bmEP2;
435 1 }
436
437 void ISR_Ep3in(void) interrupt 0
438 {
439 1 }
440
441 void ISR_Ep3out(void) interrupt 0
442 {
443 1 int i;
444 1
445 1 if (EPIO[IN3BUF_ID].cntrl & bmEPBUSY)
446 1 {
447 2 TOGCTL = 0x08 | IN3BUF_ID;
448 2 WRITEDELAY();
449 2 if (TOGCTL & 0x80)
450 2 TOGCTL |= 0x20;
451 2 else
452 2 TOGCTL |= 0x40;
453 2 }
454 1
455 1 // Loop the data to the IN endpoint
456 1 for (i=0; i < OUT3BC; i++)
457 1 {
458 2 IN3BUF[i] = ~OUT3BUF[i];
459 2 }
460 1
461 1 // Arm the IN endpoint
462 1 IN3BC = i;
463 1
464 1 // Arm the OUT so it can receive the next packet
465 1 OUT3BC = 0;
466 1
467 1 // clear the IRQ
468 1 EZUSB_IRQ_CLEAR();
469 1 OUT07IRQ = bmEP3;
470 1 }
471
472 void ISR_Ep4in(void) interrupt 0
473 {
474 1 }
475
476 void ISR_Ep4out(void) interrupt 0
477 {
478 1 int i;
479 1
480 1 if (EPIO[IN4BUF_ID].cntrl & bmEPBUSY)
481 1 {
482 2 TOGCTL = 0x08 | IN4BUF_ID;
483 2 WRITEDELAY();
484 2 if (TOGCTL & 0x80)
485 2 TOGCTL |= 0x20;
486 2 else
487 2 TOGCTL |= 0x40;
488 2 }
489 1
C51 COMPILER V7.00 PERIPH 09/27/2002 10:11:22 PAGE 9
490 1 // Loop the data to the IN endpoint
491 1 for (i=0; i < OUT4BC; i++)
492 1 {
493 2 IN4BUF[i] = ~OUT4BUF[i];
494 2 }
495 1
496 1 // Arm the IN endpoint
497 1 IN4BC = i;
498 1
499 1 // Arm the OUT so it can receive the next packet
500 1 OUT4BC = 0;
501 1
502 1 // clear the IRQ
503 1 EZUSB_IRQ_CLEAR();
504 1 OUT07IRQ = bmEP4;
505 1 }
506
507 void ISR_Ep5in(void) interrupt 0
508 {
509 1 }
510
511 void ISR_Ep5out(void) interrupt 0
512 {
513 1 int i;
514 1
515 1 if (EPIO[IN5BUF_ID].cntrl & bmEPBUSY)
516 1 {
517 2 TOGCTL = 0x08 | IN5BUF_ID;
518 2 WRITEDELAY();
519 2 if (TOGCTL & 0x80)
520 2 TOGCTL |= 0x20;
521 2 else
522 2 TOGCTL |= 0x40;
523 2 }
524 1
525 1 // Loop the data to the IN endpoint
526 1 for (i=0; i < OUT5BC; i++)
527 1 {
528 2 IN5BUF[i] = ~OUT5BUF[i];
529 2 }
530 1
531 1 // Arm the IN endpoint
532 1 IN5BC = i;
533 1
534 1 // Arm the OUT so it can receive the next packet
535 1 OUT5BC = 0;
536 1
537 1 // clear the IRQ
538 1 EZUSB_IRQ_CLEAR();
539 1 OUT07IRQ = bmEP5;
540 1 }
541
542 void ISR_Ep6in(void) interrupt 0
543 {
544 1 }
545
546 void ISR_Ep6out(void) interrupt 0
547 {
548 1 int i;
549 1
550 1 if (EPIO[IN6BUF_ID].cntrl & bmEPBUSY)
551 1 {
C51 COMPILER V7.00 PERIPH 09/27/2002 10:11:22 PAGE 10
552 2 TOGCTL = 0x08 | IN6BUF_ID;
553 2 WRITEDELAY();
554 2 if (TOGCTL & 0x80)
555 2 TOGCTL |= 0x20;
556 2 else
557 2 TOGCTL |= 0x40;
558 2 }
559 1
560 1 // Loop the data to the IN endpoint
561 1 for (i=0; i < OUT6BC; i++)
562 1 {
563 2 IN6BUF[i] = ~OUT6BUF[i];
564 2 }
565 1
566 1 // Arm the IN endpoint
567 1 IN6BC = i;
568 1
569 1 // Arm the OUT so it can receive the next packet
570 1 OUT6BC = 0;
571 1
572 1 // clear the IRQ
573 1 EZUSB_IRQ_CLEAR();
574 1 OUT07IRQ = bmEP6;
575 1 }
576
577 void ISR_Ep7in(void) interrupt 0
578 {
579 1 }
580
581 void ISR_Ep7out(void) interrupt 0
582 {
583 1 int i;
584 1
585 1 if (EPIO[IN7BUF_ID].cntrl & bmEPBUSY)
586 1 {
587 2 TOGCTL = 0x08 | IN7BUF_ID;
588 2 WRITEDELAY();
589 2 if (TOGCTL & 0x80)
590 2 TOGCTL |= 0x20;
591 2 else
592 2 TOGCTL |= 0x40;
593 2 }
594 1
595 1 // Loop the data to the IN endpoint
596 1 for (i=0; i < OUT7BC; i++)
597 1 {
598 2 IN7BUF[i] = ~OUT7BUF[i];
599 2 }
600 1
601 1 // // BUGBUG If 63 bytes was written, inject an error
602 1 // if (OUT7BC == 63)
603 1 // {
604 1 // IN7BUF[3] = IN7BUF[4];
605 1 // }
606 1
607 1 // Arm the IN endpoint
608 1 IN7BC = i;
609 1
610 1 // Arm the OUT so it can receive the next packet
611 1 OUT7BC = 0;
612 1
613 1 // clear the IRQ
C51 COMPILER V7.00 PERIPH 09/27/2002 10:11:22 PAGE 11
614 1 EZUSB_IRQ_CLEAR();
615 1 OUT07IRQ = bmEP7;
616 1 }
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 1141 ----
CONSTANT SIZE = ---- ----
XDATA SIZE = ---- 2
PDATA SIZE = ---- ----
DATA SIZE = 3 7
IDATA SIZE = ---- ----
BIT SIZE = ---- 2
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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