allegro.jrl

于博士cadence视频配套工程文件

\t (00:00:03) allegro 15.7 p007 (v15-7-42E) i86
\t (00:00:03) 

\t (00:00:03) Opening existing drawing...
   (00:00:04) Loading signal.cxt 
\d (00:00:05) Database opened: E:/class_cadence/Minisystem/DSPsystem.brd
\t (00:00:06) Grids are drawn 256.000, 256.000 apart for enhanced viewability.
\t (00:00:06) Grids are drawn 64.000, 64.000 apart for enhanced viewability.
\i (00:00:06) trapsize 59524
\t (00:00:06) Grids are drawn 256.000, 256.000 apart for enhanced viewability.
\i (00:00:06) trapsize 82569
\i (00:00:06) trapsize 82569
\t (00:00:10) Grids are drawn 64.000, 64.000 apart for enhanced viewability.
\i (00:00:10) trapsize 44118
\i (00:00:10) trapsize 55624
\i (00:00:13) color 
\i (00:00:13) setwindow form.cvf_main
\i (00:00:13) FORM cvf_main class_list Stack-Up
\i (00:00:15) FORM cvf_main all_visible1 YES 
\i (00:00:16) FORM cvf_main all_visible2 YES 
\i (00:00:17) FORM cvf_main all_visible4 YES 
\i (00:00:19) FORM cvf_main class_list Geometry 
\i (00:00:21) FORM cvf_main board_geometry/outline/visible YES 
\i (00:00:25) FORM cvf_main class_list Components 
\i (00:00:27) FORM cvf_main ref_des/assembly_top/visible YES 
\i (00:00:27) FORM cvf_main ref_des/assembly_bottom/visible YES 
\i (00:00:29) FORM cvf_main class_list Manufacturing 
\i (00:00:35) FORM cvf_main class_list Areas 
\i (00:00:36) FORM cvf_main all_visible4 YES 
\i (00:00:37) FORM cvf_main all_visible5 YES 
\i (00:00:40) FORM cvf_main all_visible1 YES 
\i (00:00:41) FORM cvf_main apply  
\i (00:00:42) FORM cvf_main ok  
\i (00:00:46) setwindow pcb
\i (00:00:46) zoom out 
\i (00:00:46) setwindow pcb
\i (00:00:46) zoom out -965.769 -1173.432
\t (00:00:46) Grids are drawn 256.000, 256.000 apart for enhanced viewability.
\i (00:00:46) trapsize 111248
\i (00:00:46) zoom in 
\i (00:00:46) setwindow pcb
\i (00:00:46) zoom in -1746.600 -1742.893
\t (00:00:46) Grids are drawn 64.000, 64.000 apart for enhanced viewability.
\i (00:00:46) trapsize 55624
\i (00:00:46) zoom in 
\i (00:00:46) setwindow pcb
\i (00:00:46) zoom in -2236.094 -1820.767
\i (00:00:46) trapsize 27812
\i (00:00:47) zoom in 
\i (00:00:47) setwindow pcb
\i (00:00:47) zoom in -2386.279 -1831.891
\t (00:00:47) Grids are drawn 16.000, 16.000 apart for enhanced viewability.
\i (00:00:47) trapsize 13906
\i (00:00:47) zoom in 
\i (00:00:47) setwindow pcb
\i (00:00:47) zoom in -2427.997 -1845.797
\i (00:00:47) trapsize 6953
\i (00:00:48) zoom out 
\i (00:00:48) setwindow pcb
\i (00:00:48) zoom out -2443.293 -1845.796
\i (00:00:48) trapsize 13906
\i (00:00:48) zoom out 
\i (00:00:48) setwindow pcb
\i (00:00:48) zoom out -2490.574 -1845.797
\t (00:00:48) Grids are drawn 64.000, 64.000 apart for enhanced viewability.
\i (00:00:48) trapsize 27812
\i (00:00:48) zoom out 
\i (00:00:48) setwindow pcb
\i (00:00:48) zoom out -2557.323 -1879.171
\i (00:00:48) trapsize 55624
\i (00:00:48) zoom out 
\i (00:00:48) setwindow pcb
\i (00:00:48) zoom out -2568.449 -2012.669
\t (00:00:48) Grids are drawn 256.000, 256.000 apart for enhanced viewability.
\i (00:00:48) trapsize 111248
\i (00:00:49) zoom in 
\i (00:00:49) setwindow pcb
\i (00:00:49) zoom in 1768.851 1616.811
\t (00:00:49) Grids are drawn 64.000, 64.000 apart for enhanced viewability.
\i (00:00:49) trapsize 55624
\i (00:00:49) zoom in 
\i (00:00:49) setwindow pcb
\i (00:00:49) zoom in 2391.843 1683.560
\i (00:00:49) trapsize 27812
\i (00:00:51) color 
\i (00:00:52) setwindow form.cvf_main
\i (00:00:52) FORM cvf_main class_list Stack-Up
\i (00:00:53) FORM cvf_main class_list Areas 
\i (00:00:55) FORM cvf_main all_visible1 NO 
\i (00:00:56) FORM cvf_main apply  
\i (00:00:57) FORM cvf_main ok  
\i (00:00:58) setwindow pcb
\i (00:00:58) zoom out 
\i (00:00:58) setwindow pcb
\i (00:00:58) zoom out 2425.218 1588.999
\i (00:00:58) trapsize 55624
\i (00:00:58) zoom out 
\i (00:00:58) setwindow pcb
\i (00:00:58) zoom out 2425.218 1700.247
\t (00:00:58) Grids are drawn 256.000, 256.000 apart for enhanced viewability.
\i (00:00:58) trapsize 111248
\i (00:00:58) zoom in 
\i (00:00:58) setwindow pcb
\i (00:00:58) zoom in -211.372 -2076.638
\t (00:00:58) Grids are drawn 64.000, 64.000 apart for enhanced viewability.
\i (00:00:58) trapsize 55624
\i (00:00:59) zoom in 
\i (00:00:59) setwindow pcb
\i (00:00:59) zoom in -1212.608 -1887.515
\i (00:00:59) trapsize 27812
\i (00:00:59) zoom out 
\i (00:00:59) setwindow pcb
\i (00:00:59) zoom out -1284.920 -1876.390
\i (00:00:59) trapsize 55624
\i (00:01:00) zoom out 
\i (00:01:00) setwindow pcb
\i (00:01:00) zoom out 261.435 -1976.513
\t (00:01:00) Grids are drawn 256.000, 256.000 apart for enhanced viewability.
\i (00:01:00) trapsize 111248
\i (00:01:00) zoom in 
\i (00:01:00) setwindow pcb
\i (00:01:00) zoom in 1168.109 59.333
\t (00:01:00) Grids are drawn 64.000, 64.000 apart for enhanced viewability.
\i (00:01:00) trapsize 55624
\i (00:01:01) zoom in 
\i (00:01:01) setwindow pcb
\i (00:01:01) zoom in 344.871 -496.910
\i (00:01:01) trapsize 27812
\i (00:01:02) zoom out 
\i (00:01:02) setwindow pcb
\i (00:01:02) zoom out 372.683 -296.662
\i (00:01:02) trapsize 55624
\i (00:01:11) save 
\f (00:01:11) E:/class_cadence/Minisystem/DSPsystem.brd: File Exists. Overwrite? 
\i (00:01:12) fillin yes 
\i (00:01:20) dlib 
\i (00:01:29) setwindow form.dlib
\i (00:01:29) FORM dlib browse_export  
\i (00:01:35) fillin "E:\class_cadence\PCB_LIB"
\i (00:01:37) FORM dlib execute  
\t (00:01:37) Starting Cadence export libraries...
\i (00:01:58) FORM dlib cancel  
\i (00:17:17) setwindow pcb
\i (00:17:17) trapsize 44118
\i (00:17:17) trapsize 55624
\i (00:17:29) save 
\f (00:17:29) E:/class_cadence/Minisystem/DSPsystem.brd: File Exists. Overwrite? 
\i (00:17:30) fillin yes 
\i (00:17:31) exit