plat_dep.h

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//  This file is part of MANTIS OS, Operating System for Nymph.
//  See http://mantis.cs.colorado.edu/
//
//  Copyright (C) 2003 University of Colorado, Boulder
//
//  This program is free software; you can redistribute it and/or
//  modify it under the terms of the GNU General Public License
//  as published by the Free Software Foundation; either version 2
//  of the License, or (at your option) any later version.
//

//  This program is distributed in the hope that it will be useful,
//  but WITHOUT ANY WARRANTY; without even the implied warranty of
//  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
//  GNU General Public License for more details.
//
//  You should have received a copy of the GNU General Public License
//  (See http://www.gnu.org/copyleft/gpl.html)
//  along with this program; if not, write to the Free Software
//  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307,
//  USA, or send email to [e-mail].

/** @file avr/include/plat_dep.h
 * @brief AVR Platform specific functions used in the kernel
 *
 */
 
// ATMEGA/AVR platform dependent "stuff"

#ifndef __PLAT_DEP_H__
#define __PLAT_DEP_H__

#include "mos.h"

// 4k + 256 memory mapped IO at beginning
/** @brief Total bytes of memory */
#define MEMORY_SIZE  (4096+256)
#define ARCH_PROGMEM PROGMEM

#define TSLICE_CNTRLA TCCR1A
#define TSLICE_CNTRLB TCCR1B
#define TSLICE_FLAG   OCF1A
#define TSLICE_CNT    TCNT1
#define TSLICE_INT    OCIE1A
#define TSLICE_OCR    OCR1A
#define TSLICE_SIG    SIG_OUTPUT_COMPARE1A

#define SLEEP_CNTRL TCCR0
#define SLEEP_INT   OCIE0
#define SLEEP_OCR   OCR0
#define SLEEP_CNT   TCNT0
#define SLEEP_FLAG  OCF0
#define SLEEP_SIG   SIG_OUTPUT_COMPARE0

#define SOFT_INT_SIG SIG_INTERRUPT7

#define TRIGGER_INT_BIT 7 //which user interrupt to use to trigger dispatcher
                          //NOTE: if you change this you must change signal handler
                          //ex: SIGNAL(INTx)

#define SETUP_SOFT_INT()                          \
   EIMSK |= (1 << TRIGGER_INT_BIT);               \
   EICRB &= ~(0x3 << (TRIGGER_INT_BIT - 4) * 2);  \
   DDRE |= (1 << TRIGGER_INT_BIT)
#define DISABLE_SOFT_INT() PORTE |= (1 << TRIGGER_INT_BIT)
#define DO_SOFT_INT() PORTE &= ~(1 << TRIGGER_INT_BIT)

// in order to wake from sleep mode the timer must be async
#define WAIT_FOR_ASYNC_UPDATE() \
      while ((ASSR & (1 << OCR0UB)) || (ASSR & (1 << TCN0UB)));

// stack pointer type
typedef uint8_t stackval_t;

// size of the SR -- used for mos_(enable|disable)_ints();
typedef uint8_t handle_t;

// minimum stack size
#define PLAT_STACK_MIN 64

#define ENABLE_INTS() sei()
#define DISABLE_INTS() cli()

#define PLAT_INIT() do {						\
      WDTCR = (1 << WDCE) | (1 << WDE); /*disable watchdog timer*/	\
      WDTCR = 0x00;							\
      MCUCSR |= (1 << JTD); /*disable on-chip debugging*/		\
   } while(0);

// timeslicing macros
#define DISABLE_TSLICE_TIMER() TIMSK &= ~(1 << TSLICE_INT)
#define ENABLE_TSLICE_TIMER() TIMSK |= (1 << TSLICE_INT)
#define TSLICE_TIMER_VALUE TSLICE_CNT
// avr doesn't need to double check why an int. occurred.
#define TSLICE_TIMER_EXPIRED (1)

#define SET_TSLICE_TIMER_VALUE(value) TSLICE_CNT = value
#define SET_TSLICE_OCR_VALUE(value) TSLICE_OCR = value

#define PRE_KERNEL_SLEEP() SFIOR |= (1 << PUD); // disable all pull-ups
#define POST_KERNEL_SLEEP() SFIOR &= ~(1 << PUD); // re-enable the pull-ups

// sleep timer macros
#define DISABLE_SLEEP_TIMER() TIMSK &= ~(1 << SLEEP_INT)
#define ENABLE_SLEEP_TIMER() TIMSK |= (1 << SLEEP_INT)
#define SET_SLEEP_TIMER_VALUE(value) SLEEP_CNT = value
#define SET_SLEEP_OCR_VALUE(value) SLEEP_OCR = value;
// avr doesn't need to double check why an int. occurred.
#define SLEEP_TIMER_EXPIRED (1)

// set sleep enabled, modes for sleep mode
#define ENABLE_SLEEP()                                  \
   MCUCR |= (1 << SE) | (1 << SM1) | (1 << SM0);        \
   MCUCR &= ~(1 << SM2);

// set sleep enable, modes for idle mode
#define ENABLE_IDLE()                                   \
   MCUCR |= (1 << SE);					\
   MCUCR &= ~((1 << SM2) | (1 << SM1) | (1 << SM0));                

// perform sleep/idle
#define SLEEP() asm volatile("sleep\n")
#define IDLE() asm volatile("sleep\n")

#define SLEEP_INT_HEADER() SIGNAL(SLEEP_SIG)
#define TSLICE_INT_HEADER() SIGNAL(TSLICE_SIG)
#define SOFT_INT_HEADER() SIGNAL(SOFT_INT_SIG)
//extern uint16_t last_sleep_time;

/** @brief Initialize the hardware timer
 * This timer is used for the kernel time slice.
 */
void kernel_timer_init(void);

/** @brief initialize the timer used for sleeping
 *
 */
void sleep_timer_init(void);

/** @brief enables interrupts
 *
 */
#define mos_enable_ints(int_handle) (SREG = int_handle)

/** @brief disables interrupts
 *
 */
handle_t mos_disable_ints(void);


#define GET_SP(sp)              \
    asm volatile(               \
   	"in %A0, __SP_L__\n\t"  \
   	"in %B0, __SP_H__\n\t"  \
   	: "=r" (sp) : )         \

#endif