📄 avr-eeprom.c
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// This file is part of MANTIS OS, Operating System// See http://mantis.cs.colorado.edu///// Copyright (C) 2003,2004,2005 University of Colorado, Boulder//// This program is free software; you can redistribute it and/or// modify it under the terms of the mos license (see file LICENSE)/* Project Mantis File: eeprom.c Author: Jeff Rose Date: 2-17-03 Edited 04-06-2004 by Adam Torgerson -Added device layer support EEPROM driver for both the onboard 4k.*/#include "mos.h"#ifdef ARCH_AVR#include "avr-eeprom.h"#include "sem.h"#include "dev.h"#include "mutex.h"/* Define some states so we know what to do in the interrupt handlers. *//** @brief Define for EEPROM write state */#define EEPROM_WRITE 0/** @brief Define for EEPROM read state */#define EEPROM_READ 1static mos_sem_t eeprom_sem;mos_mutex_t eeprom_mutex;static uint8_t eeprom_state;static uint8_t *eeprom_data;static uint16_t eeprom_index;static uint16_t eeprom_size;static uint16_t eeprom_addr;static uint16_t dev_eeprom_addr;/** @brief Read from the current eeprom address into buf for count bytes */uint16_t dev_read_DEV_AVR_EEPROM(void *buf, uint16_t count){ //set up state for interrupt state machine eeprom_state = EEPROM_READ; eeprom_data = (uint8_t *)buf; eeprom_addr = dev_eeprom_addr; eeprom_size = count; eeprom_index = 0; EECR |= (1 << EERIE); // Enable the eeprom ready interrupt //wait until state machine posts semaphore mos_sem_wait(&eeprom_sem); //increment address dev_eeprom_addr += count; return count;}/** @brief Write from buf to the current eeprom address for count bytes */uint16_t dev_write_DEV_AVR_EEPROM(const void *buf, uint16_t count){ //set up state for interrput state machine eeprom_state = EEPROM_WRITE; eeprom_data = (uint8_t *)buf; eeprom_addr = dev_eeprom_addr; eeprom_size = count; eeprom_index = 0; // Enable the eeprom ready interrupt EECR |= (1 << EERIE); //wait until state machine posts semaphore mos_sem_wait(&eeprom_sem); //increment address dev_eeprom_addr += count; return count;}uint8_t dev_ioctl_DEV_AVR_EEPROM(int8_t request, ...){ int16_t i; va_list ap; va_start (ap, request); switch (request) { case DEV_SEEK: i = va_arg (ap, int16_t); dev_eeprom_addr = i; break; default: return DEV_BAD_IOCTL; break; } va_end (ap); return DEV_OK;}uint8_t dev_mode_DEV_AVR_EEPROM(uint8_t md){ return DEV_UNSUPPORTED;}void avr_eeprom_init(void){ //init state vars mos_sem_init(&eeprom_sem, 0); mos_mutex_init (&eeprom_mutex);}/** @brief Interrupt handler for the on-chip eeprom operations. */SIGNAL(SIG_EEPROM_READY){ if(eeprom_state == EEPROM_WRITE) { if(eeprom_index < eeprom_size) { EEAR = eeprom_addr + eeprom_index; // Set the address register EEDR = eeprom_data[eeprom_index++]; // Fill the data register // Now execute the write sequence EECR = (1 << EEMWE) | (1 << EERIE); EECR = (1 << EEMWE) | (1 << EERIE) | (1 << EEWE); } else { // Disable this interrupt EECR &= ~(1 << EERIE); mos_sem_post(&eeprom_sem); // Wake the thread that called write } } else { // EEPROM_READ if(eeprom_index < eeprom_size) { EEAR = eeprom_addr + eeprom_index; // Setup the address EECR |= (1 << EERE); // Set the read strobe eeprom_data[eeprom_index++] = EEDR; // Now read the data } else { EECR &= ~(1 << EERIE); // Disable this interrupt // Wake the thread that called read mos_sem_post(&eeprom_sem); } }}#endif
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