📄 stm32f2xx_can.c
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- normal mode
- initialization mode
@endverbatim
* @{
*/
/**
* @brief Selects the CAN Operation mode.
* @param CAN_OperatingMode: CAN Operating Mode.
* This parameter can be one of @ref CAN_OperatingMode_TypeDef enumeration.
* @retval status of the requested mode which can be
* - CAN_ModeStatus_Failed: CAN failed entering the specific mode
* - CAN_ModeStatus_Success: CAN Succeed entering the specific mode
*/
uint8_t CAN_OperatingModeRequest(CAN_TypeDef* CANx, uint8_t CAN_OperatingMode)
{
uint8_t status = CAN_ModeStatus_Failed;
/* Timeout for INAK or also for SLAK bits*/
uint32_t timeout = INAK_TIMEOUT;
/* Check the parameters */
assert_param(IS_CAN_ALL_PERIPH(CANx));
assert_param(IS_CAN_OPERATING_MODE(CAN_OperatingMode));
if (CAN_OperatingMode == CAN_OperatingMode_Initialization)
{
/* Request initialisation */
CANx->MCR = (uint32_t)((CANx->MCR & (uint32_t)(~(uint32_t)CAN_MCR_SLEEP)) | CAN_MCR_INRQ);
/* Wait the acknowledge */
while (((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_INAK) && (timeout != 0))
{
timeout--;
}
if ((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_INAK)
{
status = CAN_ModeStatus_Failed;
}
else
{
status = CAN_ModeStatus_Success;
}
}
else if (CAN_OperatingMode == CAN_OperatingMode_Normal)
{
/* Request leave initialisation and sleep mode and enter Normal mode */
CANx->MCR &= (uint32_t)(~(CAN_MCR_SLEEP|CAN_MCR_INRQ));
/* Wait the acknowledge */
while (((CANx->MSR & CAN_MODE_MASK) != 0) && (timeout!=0))
{
timeout--;
}
if ((CANx->MSR & CAN_MODE_MASK) != 0)
{
status = CAN_ModeStatus_Failed;
}
else
{
status = CAN_ModeStatus_Success;
}
}
else if (CAN_OperatingMode == CAN_OperatingMode_Sleep)
{
/* Request Sleep mode */
CANx->MCR = (uint32_t)((CANx->MCR & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP);
/* Wait the acknowledge */
while (((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_SLAK) && (timeout!=0))
{
timeout--;
}
if ((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_SLAK)
{
status = CAN_ModeStatus_Failed;
}
else
{
status = CAN_ModeStatus_Success;
}
}
else
{
status = CAN_ModeStatus_Failed;
}
return (uint8_t) status;
}
/**
* @brief Enters the Sleep (low power) mode.
* @param CANx: where x can be 1 or 2 to select the CAN peripheral.
* @retval CAN_Sleep_Ok if sleep entered, CAN_Sleep_Failed otherwise.
*/
uint8_t CAN_Sleep(CAN_TypeDef* CANx)
{
uint8_t sleepstatus = CAN_Sleep_Failed;
/* Check the parameters */
assert_param(IS_CAN_ALL_PERIPH(CANx));
/* Request Sleep mode */
CANx->MCR = (((CANx->MCR) & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP);
/* Sleep mode status */
if ((CANx->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) == CAN_MSR_SLAK)
{
/* Sleep mode not entered */
sleepstatus = CAN_Sleep_Ok;
}
/* return sleep mode status */
return (uint8_t)sleepstatus;
}
/**
* @brief Wakes up the CAN peripheral from sleep mode .
* @param CANx: where x can be 1 or 2 to select the CAN peripheral.
* @retval CAN_WakeUp_Ok if sleep mode left, CAN_WakeUp_Failed otherwise.
*/
uint8_t CAN_WakeUp(CAN_TypeDef* CANx)
{
uint32_t wait_slak = SLAK_TIMEOUT;
uint8_t wakeupstatus = CAN_WakeUp_Failed;
/* Check the parameters */
assert_param(IS_CAN_ALL_PERIPH(CANx));
/* Wake up request */
CANx->MCR &= ~(uint32_t)CAN_MCR_SLEEP;
/* Sleep mode status */
while(((CANx->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK)&&(wait_slak!=0x00))
{
wait_slak--;
}
if((CANx->MSR & CAN_MSR_SLAK) != CAN_MSR_SLAK)
{
/* wake up done : Sleep mode exited */
wakeupstatus = CAN_WakeUp_Ok;
}
/* return wakeup status */
return (uint8_t)wakeupstatus;
}
/**
* @}
*/
/** @defgroup CAN_Group5 CAN Bus Error management functions
* @brief CAN Bus Error management functions
*
@verbatim
===============================================================================
CAN Bus Error management functions
===============================================================================
This section provides functions allowing to
- Return the CANx's last error code (LEC)
- Return the CANx Receive Error Counter (REC)
- Return the LSB of the 9-bit CANx Transmit Error Counter(TEC).
@note If TEC is greater than 255, The CAN is in bus-off state.
@note if REC or TEC are greater than 96, an Error warning flag occurs.
@note if REC or TEC are greater than 127, an Error Passive Flag occurs.
@endverbatim
* @{
*/
/**
* @brief Returns the CANx's last error code (LEC).
* @param CANx: where x can be 1 or 2 to select the CAN peripheral.
* @retval Error code:
* - CAN_ERRORCODE_NoErr: No Error
* - CAN_ERRORCODE_StuffErr: Stuff Error
* - CAN_ERRORCODE_FormErr: Form Error
* - CAN_ERRORCODE_ACKErr : Acknowledgment Error
* - CAN_ERRORCODE_BitRecessiveErr: Bit Recessive Error
* - CAN_ERRORCODE_BitDominantErr: Bit Dominant Error
* - CAN_ERRORCODE_CRCErr: CRC Error
* - CAN_ERRORCODE_SoftwareSetErr: Software Set Error
*/
uint8_t CAN_GetLastErrorCode(CAN_TypeDef* CANx)
{
uint8_t errorcode=0;
/* Check the parameters */
assert_param(IS_CAN_ALL_PERIPH(CANx));
/* Get the error code*/
errorcode = (((uint8_t)CANx->ESR) & (uint8_t)CAN_ESR_LEC);
/* Return the error code*/
return errorcode;
}
/**
* @brief Returns the CANx Receive Error Counter (REC).
* @note In case of an error during reception, this counter is incremented
* by 1 or by 8 depending on the error condition as defined by the CAN
* standard. After every successful reception, the counter is
* decremented by 1 or reset to 120 if its value was higher than 128.
* When the counter value exceeds 127, the CAN controller enters the
* error passive state.
* @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
* @retval CAN Receive Error Counter.
*/
uint8_t CAN_GetReceiveErrorCounter(CAN_TypeDef* CANx)
{
uint8_t counter=0;
/* Check the parameters */
assert_param(IS_CAN_ALL_PERIPH(CANx));
/* Get the Receive Error Counter*/
counter = (uint8_t)((CANx->ESR & CAN_ESR_REC)>> 24);
/* Return the Receive Error Counter*/
return counter;
}
/**
* @brief Returns the LSB of the 9-bit CANx Transmit Error Counter(TEC).
* @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
* @retval LSB of the 9-bit CAN Transmit Error Counter.
*/
uint8_t CAN_GetLSBTransmitErrorCounter(CAN_TypeDef* CANx)
{
uint8_t counter=0;
/* Check the parameters */
assert_param(IS_CAN_ALL_PERIPH(CANx));
/* Get the LSB of the 9-bit CANx Transmit Error Counter(TEC) */
counter = (uint8_t)((CANx->ESR & CAN_ESR_TEC)>> 16);
/* Return the LSB of the 9-bit CANx Transmit Error Counter(TEC) */
return counter;
}
/**
* @}
*/
/** @defgroup CAN_Group6 Interrupts and flags management functions
* @brief Interrupts and flags management functions
*
@verbatim
===============================================================================
Interrupts and flags management functions
===============================================================================
This section provides functions allowing to configure the CAN Interrupts and
to get the status and clear flags and Interrupts pending bits.
The CAN provides 14 Interrupts sources and 15 Flags:
===============
Flags :
===============
The 15 flags can be divided on 4 groups:
A. Transmit Flags
-----------------------
CAN_FLAG_RQCP0,
CAN_FLAG_RQCP1,
CAN_FLAG_RQCP2 : Request completed MailBoxes 0, 1 and 2 Flags
Set when when the last request (transmit or abort) has
been performed.
B. Receive Flags
-----------------------
CAN_FLAG_FMP0,
CAN_FLAG_FMP1 : FIFO 0 and 1 Message Pending Flags
set to signal that messages are pending in the receive
FIFO.
These Flags are cleared only by hardware.
CAN_FLAG_FF0,
CAN_FLAG_FF1 : FIFO 0 and 1 Full Flags
set when three messages are stored in the selected
FIFO.
CAN_FLAG_FOV0
CAN_FLAG_FOV1 : FIFO 0 and 1 Overrun Flags
set when a new message has been received and passed
the filter while the FIFO was full.
C. Operating Mode Flags
-----------------------
CAN_FLAG_WKU : Wake up Flag
set to signal that a SOF bit has been detected while
the CAN hardware was in Sleep mode.
CAN_FLAG_SLAK : Sleep acknowledge Flag
Set to signal that the CAN has entered Sleep Mode.
D. Error Flags
-----------------------
CAN_FLAG_EWG : Error Warning Flag
Set when the warning limit has been reached (Receive
Error Counter or Transmit Error Counter greater than 96).
This Flag is cleared only by hardware.
CAN_FLAG_EPV : Error Passive Flag
Set when the Error Passive limit has been reached
(Receive Error Counter or Transmit Error Counter
greater than 127).
This Flag is cleared only by hardware.
CAN_FLAG_BOF : Bus-Off Flag
set when CAN enters the bus-off state. The bus-off
state is entered on TEC overflow, greater than 255.
This Flag is cleared only by hardware.
CAN_FLAG_LEC : Last error code Flag
set If a message has been transferred (reception or
transmission) with error, and the error code is hold.
===============
Interrupts :
===============
The 14 interrupts can be divided on 4 groups:
A. Transmit interrupt
-----------------------
CAN_IT_TME : Transmit mailbox empty Interrupt
if enabled, this interrupt source is pending when
no transmit request are pending for Tx mailboxes.
B. Receive Interrupts
-----------------------
CAN_IT_FMP0,
CAN_IT_FMP1 : FIFO 0 and FIFO1 message pending Interrupts
if enabled, these interrupt sources are pending when
messages are pending in the receive FIFO.
The corresponding interrupt pending bits are cleared
only by hardware.
CAN_IT_FF0,
CAN_IT_FF1 : FIFO 0 and FIFO1 full Interrupts
if enabled, these interrupt sources are pending when
three messages are stored in the selected FIFO.
CAN_IT_FOV0,
CAN_IT_FOV1 : FIFO 0 and FIFO1 overrun Interrupts
if enabled, these interrupt sources are pending when
a new message has been received and passed the filter
while the FIFO was full.
C. Operating Mode Interrupts
-------------------------------
CAN_IT_WKU : Wake-up Interrupt
if enabled, this interrupt source is pending when
a SOF bit has been detected while the CAN hardware was
in Sleep mode.
CAN_IT_SLK : Sleep acknowledge Interrupt
if enabled, this interrupt source is pending when
the CAN has entered Sleep Mode.
D. Error Interrupts
-----------------------
CAN_IT_EWG : Error warning Interrupt
if enabled, this interrupt source is pending when
the warning limit has been reached (Receive Error
Counter or Transmit Error Counter=96).
CAN_IT_EPV : Error passive Interrupt
if enabled, this interrupt source is pending when
the Error Passive limit has been reached (Receive
Error Counter or Transmit Error Counter>127).
CAN_IT_BOF : Bus-off Interrupt
if enabled, this interrupt source is pending when
CAN enters the bus-off state. The bus-off state is
entered on TEC overflow, greater than 255.
This Flag is cleared only by hardware.
CAN_IT_LEC : Last error code Interrupt
if enabled, this interrupt source is pending when
a message has been transferred (reception or
transmission) with error, and the error code is hold.
CAN_IT_ERR : Error Interrupt
if enabled, this interrupt source is pending when
an error condition is pending.
Managing the CAN controller events :
------------------------------------
The user should identify which mode will be used in his application to manage
the CAN controller events: Polling mode or Interrupt mode.
1. In the Polling Mode it is advised to use the following functions:
- CAN_GetFlagStatus() : to check if flags events occur.
- CAN_ClearFlag() : to clear the flags events.
2. In the Interrupt Mode it is advised to use the following functions:
- CAN_ITConfig() : to enable or disable the interrupt source.
- CAN_GetITStatus() : to check if Interrupt occurs.
- CAN_ClearITPendingBit() : to clear the Interrupt pending Bit (corresponding Flag).
@note This function has no impact on CAN_IT_FMP0 and CAN_IT_FMP1 Interrupts
pending bits since there are cleared only by hardware.
@endverbatim
* @{
*/
/**
* @brief Enables or disables the specified CANx interrupts.
* @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
* @param CAN_IT: specifies the CAN interrupt sources to be enabled or disabled.
* This parameter can be:
* @arg CAN_IT_TME: Transmit mailbox empty Interrupt
* @arg CAN_IT_FMP0: FIFO 0 message pending Interrupt
* @arg CAN_IT_FF0: FIFO 0 full Interrupt
* @arg CAN_IT_FOV0: FIFO 0 overrun Interrupt
* @arg CAN_IT_FMP1: FIFO 1 message pending Interrupt
* @arg CAN_IT_FF1: FIFO 1 full Interrupt
* @arg CAN_IT_FOV1: FIFO 1 overrun Interrupt
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