📄 fantest.asm
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SETB ACC.0 ; send read command and receive data
LCALL START
JC X3421
LCALL SHOUT ; Re-write device address
JC X3421
MOV R4, #2 ; byte Q'TY per page
MOV R0, #2CH ; Save data which Read from I2c Rom to 44h--48h unit
X3121: LCALL SHIN ; Read 8 time from rom
MOV @R0, A
CJNE R4, #1, X3221
LCALL NAK
JMP X3321
X3221: CALL ACK
INC R0
DJNZ R4, X3121
X3321: LCALL STOP
CLR C
JMP X3521
X3421: LCALL STOP
X3521: RET
/*************** 24c02 SDA, SCL start time sequence *************************************/
START: SETB SDA
SETB SCL
JNB SDA, X40
JNB SCL, X40
NOP
CLR SDA
NOP
NOP
NOP
NOP
NOP
CLR SCL
CLR C
JMP X41
X40: SETB C
X41: RET
/*************** 24c02 SDA, SCL stop time sequence *************************************/
STOP: CLR SDA
NOP
NOP
SETB SCL
NOP
NOP
NOP
NOP
NOP
SETB SDA
RET
/*************** SDA, SCL initial *************************************/
I2CINIT: SETB SDA
SETB SCL
RET
/*************** write a byte to SDA bus *************************************/
SHOUT: ; Shift out a byte to the 24c02, most significant bit first
PUSH B ; init B=#10
MOV B, #8 ; 8 bit counter
SETB SDA
X42: NOP
NOP
NOP
NOP
RLC A ; move MSB bit to CY=1
MOV SDA, C ; output bit
NOP ; enforce SCL low and data setup
NOP
SETB SCL
NOP
NOP
NOP
NOP
CLR SCL
DJNZ B, X42 ; next bit
SETB SDA ; release SDA for ACK
NOP
NOP
SETB SCL
NOP
NOP
NOP
NOP
MOV C, SDA
CLR SCL
POP B
RET
/*************** read a byte from SDA bus *************************************/
SHIN: ; Shift in a byte from the 24c02, most significant bit first
SETB SDA ; make SDA an input
PUSH B
MOV B, #8 ; bit counter
X43: NOP
NOP ; enforce SCL low and data setup
NOP
SETB SCL ; raise clock
NOP
NOP ; enforce SCL high
MOV C, SDA ; input bit
RLC A ; move bit into byte
CLR SCL ; drop clock
NOP
DJNZ B, X43 ; next bit
POP B
RET
/*************** 24c02 ACK response signal *************************************/
ACK: ; clock out an acknowledge bit
CLR SDA ; ACK bit
NOP ; enforce SDA low and data setup
NOP
SETB SCL ; clock raise
NOP
NOP ; enforce SCL high
NOP
NOP
CLR SCL ; drop clcok
RET
/*************** 24c02 No ACK response signal *************************************/
NAK: ; Clock out a negative acknowledge bit
SETB SDA ; NAK bit
NOP ; enforce SDA low and data setup
NOP
SETB SCL ; raise clock
NOP
NOP
NOP ; enforce SCL high
NOP
CLR SCL ; drop clcok
RET
/*************** interrupt T0 *************************************/
TIM0: PUSH ACC
PUSH PSW
CLR ET0 ; T0 intrrupt
SETB RS0 ; RS1 & RS0 select REG work group 1
CLR RS1
CLR TF0 ; clear TF0 intrrupt flag
CLR TR0 ; stop T0/TR0
MOV A, 4EH ; reload TL0 count
MOV TL0, A
MOV TH0, #0FFH
MOV A, 30H ; Counter value 30H--31H
ADD A, #01H
;DA A
MOV 30H, A
JNC OVER
MOV A, 31H
ADD A, #01H
;DA A
MOV 31H, A
JNC OVER
OVER: SETB TR0
SETB ET0
POP PSW
POP ACC
RETI
/*************** interrupt T2 *************************************/
TIM2: PUSH ACC
PUSH PSW
CLR ET2 ; T2 intrrupt
CLR RS0 ; RS1 & RS0 select REG work group 2
SETB RS1
CLR T2CON.7 ; clear TF2 flag
CLR T2CON.2 ; Stop T2/TR2
MOV TL2, #0CH ; T2 50 ms timer #(65536-46068) mod 256
MOV TH2, #4CH ; T2 50 ms timer #(65536-46068) / 256
SETB T2CON.2
MOV A, 55H
MOV R7, A
DJNZ R7, EXIT0
MOV 55H, #20
CLR TF0 ; clear TF0 flag
CLR TR0
CLR ET0
MOV R0, 27H ; init value #70h in 27h
MOV A, TL0
CLR C
SUBB A, 4EH
MOV @R0, A
MOV A, 4EH
MOV TL0, A
MOV TH0, #0FFH
INC R0
MOV 27H, R0
MOV A, 30H
MOV 30H, #00H
MOV 57H, A
MOV A, 31H
MOV 31H, #00H
MOV 58H, A
SETB TR0
SETB ET0
MOV A, 26H
MOV R6, A
DJNZ R6, RESTAT
MOV 26H, #10 ; counter 10 times
MOV 27H, #70H ; save 10 pcs TL0 value
JMP EXIT2
RESTAT:MOV A, R6
MOV 26H, A
JMP EXIT2
EXIT0: MOV A, R7
MOV 55H, A
EXIT2: SETB ET2
POP PSW
POP ACC
RETI
/*************** RS232 interrupt T1/ ES *************************************/
UART: PUSH ACC
PUSH PSW
SETB RS0 ; RS1 & RS0 select REG work group 3
SETB RS1
JBC RI, UART1
LJMP RETURN
UART1: MOV A, SBUF
MOV R1, 2EH
MOV @R1, A
INC 2EH
MOV A, 2EH
CJNE A, #3AH, RETURN ; send 5 byte
MOV 2EH, #35H
RETURN:CLR TI
POP PSW
POP ACC
RETI
/*************** 16*2 LCD initial *************************************/
Initial:MOV A, #38H ; 8 bit, 2 line, 5*8 matrix
LCALL Write_instruction
MOV A, #0CH ; screen on, cursor off, blink off
LCALL Write_instruction
MOV A, #06H ; +1, display off
LCALL Write_instruction
RET
CLS: MOV A, #01H ; clear screen
LCALL Write_instruction
RET
/*************** 16*2 LCD time sequence *************************************/
Write_instruction:
LCALL CheckBusy
CLR RS ; 0: instruction, 1: data
CLR R_W ; 0: write 1: read
CLR E ; 0~~~1: drop edge enable
SETB E ; 1
MOV DB0_DB7,A
CLR E
RET
WriteLCDData:
LCALL CheckBusy
SETB RS ; 0: instruction; 1: data
CLR R_W ; 0: write 1: read
CLR E
SETB E
MOV DB0_DB7,A ; write A to LCD
CLR E
RET
CheckBusy:
PUSH ACC
CheckBusyLoop:
CLR RS ; 0:instruction; 1: data;
SETB R_W ; 0: write; 1: read;
CLR E ; 0~~~1: drop edge enable
SETB E ; 1
MOV A,DB0_DB7 ; read P2 port
CLR E
JB ACC.7, CheckBusyLoop ; is 1, it's busy, return to continous, is 0 idle! return to Write_instruction
POP ACC
LCALL DELAY0
RET
PR_STRING:
PUSH ACC
PR_LOOP:CLR A
MOVC A,@A+DPTR
JZ END_PR
LCALL WriteLCDData
INC DPTR
LJMP PR_LOOP
END_PR: POP ACC
RET
/***********************************************************/
DELAY0:MOV R3, #05
D1: MOV R4, #248 ;delay 0.5ms
DJNZ R4, $
DJNZ R3, D1
RET
DELAY1:MOV R5,#02
D3: MOV R6,#248
DJNZ R6,$
DJNZ R5,D3
RET
DELAY2:MOV R5, #10 ; delay 2 s
D5: MOV R3, #200 ; delay 100ms
D4: MOV R4, #248 ;delay 0.5ms
DJNZ R4, $
DJNZ R3, D4
DJNZ R5, D5
RET
Delay10ms:
MOV R6, #20
TENMS: MOV R7,#248
DJNZ R7,$
DJNZ R6, TENMS
RET
LINE1: DB "FREQ:", 00H
LINE2: DB ".", 00H
LINE3: DB "Over Range!", 00H
LINE5: DB "L-Limit:", 00H
LINE6: DB "H-Limit:", 00H
LINE7: DB "Fan Q'TY:", 00H
LINE8: DB "rpm", 00H
LINE9: DB "pcs ", 00H
LINE10: DB "OK ", 00H
LINE11: DB " ", 00H
LINE12: DB "Error! Re-enter!", 00H
LINE13: DB "Select Function!", 00H
LINE14: DB "Save Result.....", 00H
TABLE: DB 00H, 01H, 02H, 03H
DB 04H, 05H, 06H, 07H
DB 08H, 09H, 0AH, 0BH
DB 0CH, 0DH, 0EH, 0FH
TABLE1: DB 3CH, 0E4H, 0C8H, 0ACH
DB 90H, 74H, 58H, 3CH
DB 20H, 04H
END
/* BIN2BCD3: CLR A
MOV 60h,A
MOV 61h,A
MOV 62h,A
MOV R2,#10H
HB3: MOV A,40H
RLC A
MOV 40H,A
MOV A,41H
RLC A
MOV 41H,A
MOV A,62H
ADDC A,62H
DA A
MOV 62H,A
MOV A,61H
ADDC A,61H
DA A
MOV 61H,A
MOV A,60H
ADDC A,60H
MOV 60H,A
DJNZ R2,HB3 */
/* 商为单字节
MOV R0, 22H
MOV R1, 23H
MOV R4, 4FH
MOV R6, #08H
CHU4: MOV A, R0
ADD A, R0
MOV R0, A
ADDC A, R1
MOV R1, A
SUBB A, R4
JC C, CHU41
MOV R1, A
INC R0
CHU41: DJNZ R6, CHU4
商为双字节
MOV R0, 22H
MOV R1, 23H
MOV R2, #00H
MOV R3, 4FH
MOV R4, #00H
MOV R5, #00H
MOV R6, #10H
CHU5: MOV A, R0
ADD A, R0
MOV R0, A
MOV A, R1
ADDC A, R1
MOV R1, A
MOV A, R2
ADDC A, R2
MOV R2, A
MOV A, R4 ;商数左移
ADD A, R4
MOV R4, A
MOV A, R5
ADDC A, R5
MOV R5, A
MOV A, R2
CJNE A, 4FH, CHU50
CHU50: JC CHU51
MOV A, R2 ; 建立新的余数
SUBB A, R3
MOV R2, A
MOV A, R4
ADD A, #01H
MOV R4, A
MOV A, R5
ADDC A, #00H
MOV R5, A
CHU51: DJNZ R6, CHU5
MOV 43H, R2
MOV 24H, R4
MOV 25H, R5
*/
/*
;商为单字节;;Input: 被除数放在R0,R1 R0放被除数低字节,除数放在R4,R7为字节长度
;OutPut: 商数庆在R0中,余数放在R1中
CHU4: MOV A, R0
ADD A, R0
MOV R0, A
ADDC A, R1
MOV R1, A
SUBB A, R4
JC CHU41
MOV R1, A
INC R0
CHU41: DJNZ R7, CHU4
MOV B, R1
MOV A, R0
SWAP A
DA A
MOV 43H, A
MOV A, B
MOV B,#10
MUL AB
MOV R0, A
MOV R1, B
MOV A, 4FH
MOV B, #10
MUL AB
MOV R4, A
;MOV 2FH, B ;MSB NO USED
MOV R6, #08H
CHU42: MOV A, R0
ADD A, R0
MOV R0, A
ADDC A, R1
MOV R1, A
SUBB A, R4
JC CHU43
MOV R1, A
INC R0
CHU43: DJNZ R6, CHU42
MOV A, R0
DA A
ORL A, 43H
DA A
MOV 43H, A
*/
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