jit-sparc.def

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	debug(("srl %s,%s,%s\n", regname(r1), regname(r2), regname(w)));
}

define_insn(lshl_int, lshl_RRR)
{
	int r1;
	int r2;
	int w;

	r2 = rreg_int(2);
	r1 = rreg_int(1);
	w = wreg_int(0);

	insn_RRR(0x25, w, r1, r2);

	debug(("sll %s,%s,%s\n", regname(r1), regname(r2), regname(w)));
}

define_insn(lshl_int_const, lshl_RRC)
{
	int r;
	int o;
	int w;

	o = const_int(2);
	r = rreg_int(1);
	w = wreg_int(0);

	insn_RRC(2, 0x25, w, r, o);

	debug(("sll %s,%d,%s\n", regname(r), o, regname(w)));
}

/* --------------------------------------------------------------------- */

define_insn(load_int, load_RxR)
{
	int r = rreg_int(2);
	int w = wreg_int(0);

	ldst_RRR(0, w, r, REG_g0);

	debug(("ld [%s],%s\n", regname(r), regname(w)));
}

define_insn(load_offset_int, load_RRC)
{
	int o = const_int(2);
	int r = rreg_int(1);
	int w = wreg_int(0);

	ldst_RRC(0, w, r, o);

	debug(("ld %s,[%s+%d]\n", regname(w), regname(r), o));
}

define_insn(load_float, fload_RxR)
{
	int r = rreg_int(2);
	int w = wreg_float(0);

	ldst_RRR(0x20, w, r, REG_g0);

	debug(("ldf [%s],%s\n", regname(r), fregname(w)));
}

define_insn(load_double, floadl_RxR)
{
	int r = rreg_int(2);
	int w = wreg_double(0);

	ldst_RRR(0x20, w, r, REG_g0);
	debug(("ldf [%s],%s\n", regname(r), fregname(w)));

	ldst_RRC(0x20, w+1, r, 4);
	debug(("ldf [%s+4],%s\n", regname(r), fregname(w+1)));
}

define_insn(load_byte, loadb_RxR)
{
	int r = rreg_int(2);
	int w = wreg_int(0);

	ldst_RRR(9, w, r, REG_g0);

	debug(("ldsb [%s],%s\n", regname(r), regname(w)));
}

define_insn(load_char, loadc_RxR)
{
	int r = rreg_int(2);
	int w = wreg_int(0);

	ldst_RRR(2, w, r, REG_g0);

	debug(("lduh [%s],%s\n", regname(r), regname(w)));
}

define_insn(load_short, loads_RxR)
{
	int r = rreg_int(2);
	int w = wreg_int(0);

	ldst_RRR(0xA, w, r, REG_g0);

	debug(("ldsh [%s],%s\n", regname(r), regname(w)));
}

define_insn(store_int, store_xRR)
{
	int r = rreg_int(2);
	int w = rreg_int(1);

	ldst_RRR(4, r, w, REG_g0);

	debug(("st %s,[%s]\n", regname(r), regname(w)));
}

define_insn(store_offset_int, store_xRRC)
{
	int o = const_int(2);
	int r = rreg_int(1);
	int w = rreg_int(0);

	ldst_RRC(0x04, w, r, o);

	debug(("st %s,[%s+%d]\n", regname(w), regname(r), o));
}

define_insn(store_float, fstore_xRR)
{
	int r = rreg_float(2);
	int w = rreg_int(1);

	ldst_RRR(0x24, r, w, REG_g0);

	debug(("stf %s,[%s]\n", fregname(r), regname(w)));
}

define_insn(store_double, fstorel_xRR)
{
	int r = rreg_double(2);
	int w = rreg_int(1);

	ldst_RRR(0x24, r, w, REG_g0);
	debug(("stf %s,[%s]\n", fregname(r), regname(w)));

	ldst_RRC(0x24, r+1, w, 4);
	debug(("stf %s,[%s+4]\n", fregname(r+1), regname(w)));
}

define_insn(store_byte, storeb_xRR)
{
	int r = rreg_int(2);
	int w = rreg_int(1);

	ldst_RRR(5, r, w, REG_g0);

	debug(("stb %s,[%s]\n", regname(r), regname(w)));
}

define_insn(store_short, stores_xRR)
{
	int r = rreg_int(2);
	int w = rreg_int(1);

	ldst_RRR(6, r, w, REG_g0);

	debug(("sth %s,[%s]\n", regname(r), regname(w)));
}

/* --------------------------------------------------------------------- */

define_insn(cmp_int, cmp_xRR)
{
	int r1 = rreg_int(1);
	int r2 = rreg_int(2);

	insn_RRR(0x14, REG_g0, r1, r2);

	debug(("subxx %s,%s,g0\n", regname(r2), regname(r1)));
}

define_insn(cmp_int_const, cmp_xRC)
{
	int r = rreg_int(1);
	int o = const_int(2);

	insn_RRC(2, 0x14, REG_g0, r, o);

	debug(("subxx %d,%s,g0\n", o, regname(r)));
}

/* --------------------------------------------------------------------- */

define_insn(cvt_int_float, cvtif_RxR)
{
	int r;
	int w;

	r = rreg_float(2);
	w = wreg_float(0);

	finsn_RRR(0xC4, w, REG_g0, r);

	debug(("fitos %s,%s\n", regname(r), fregname(w)));
}

define_insn(cvt_int_double, cvtid_RxR)
{
	int r;
	int w;

	r = rreg_float(2);
	w = wreg_double(0);

	finsn_RRR(0xC8, w, REG_g0, r);

	debug(("fitod %s,%s\n", regname(r), fregname(w)));
}

define_insn(cvt_float_int, cvtfi_RxR)
{
	int r;
	int w;

	r = rreg_float(2);
	w = wreg_float(0);

	finsn_RRR(0xD1, w, REG_g0, r);

	debug(("fstoi %s,%s\n", fregname(r), fregname(w)));
}

define_insn(cvt_double_int, cvtdi_RxR)
{
	int r;
	int w;

	r = rreg_double(2);
	w = wreg_float(0);

	finsn_RRR(0xD2, w, REG_g0, r);

	debug(("fdtoi %s,%s\n", fregname(r), fregname(w)));
}

define_insn(cvt_float_double, cvtfd_RxR)
{
	int r;
	int w;

	r = rreg_float(2);
	w = wreg_double(0);

	finsn_RRR(0xC9, w, REG_g0, r);

	debug(("fstod %s,%s\n", fregname(r), fregname(w)));
}

define_insn(cvt_double_float, cvtdf_RxR)
{
	int r;
	int w;

	r = rreg_double(2);
	w = wreg_float(0);

	finsn_RRR(0xC6, w, REG_g0, r);

	debug(("fdtos %s,%s\n", fregname(r), fregname(w)));
}

/* --------------------------------------------------------------------- */

define_insn(build_key, set_word_xxC)
{
	jint val = const_int(2);

	LOUT = val;

	debug((".word %08x\n", val));
}

define_insn(build_code_ref, set_wordpc_xxC)
{
	label* l = (label*)const_int(2);

	l->type |= Llong|Labsolute;
	l->at = (uintp)CODEPC;
	LOUT = 0;
	l->from = (uintp)CODEPC;
	debug((".word ?\n"));
}

#if 0
define_insn(build_const_ref, set_wordconst_xxC)
{
	label* l = (label*)const_int(2);

	/* Align data onto relevant boundary */
	if (l->size == 2 && ((uintp)CODEPC) % 8 != 0) {
		LOUT = 0;
	}

	l->to = (uintp)CODEPC;

	LOUT = l->u.word[0];
	debug((".word 0x08x\n", l->u.word[0]));

	if (l->size == 2) {
		LOUT = l->u.word[1];
		debug((".word 0x08x\n", l->u.word[1]));
	}
}
#endif

/* --------------------------------------------------------------------- */

define_insn(set_label, set_label_xxC)
{
	label* l = (label*)const_int(2);
	l->to = (uint32)CODEPC;
}

define_insn(branch, branch_xCC)
{
	label* l = (label*)const_int(1);
	int bt = const_int(2);

	l->type |= Llong22|Lrelative;
	l->at = (uintp)CODEPC;
	l->from = (uintp)CODEPC;

	switch (bt) {
	case ba:
		insn_branch(0x08, 0, 0);
		debug(("ba ?\n"));
		break;
	case beq:
		insn_branch(0x01, 0, 0);
		debug(("be ?\n"));
		break;
	case bne:
		insn_branch(0x09, 0, 0);
		debug(("bne ?\n"));
		break;
	case blt:
		insn_branch(0x03, 0, 0);
		debug(("bl ?\n"));
		break;
	case ble:
		insn_branch(0x02, 0, 0);
		debug(("ble ?\n"));
		break;
	case bgt:
		insn_branch(0x0a, 0, 0);
		debug(("bgt ?\n"));
		break;
	case bge:
		insn_branch(0x0b, 0, 0);
		debug(("bge ?\n"));
		break;
	case bult:
		insn_branch(0x05, 0, 0);
		debug(("bul ?\n"));
		break;
	case bugt:
		insn_branch(0x0c, 0, 0);
		debug(("bugt ?\n"));
		break;
	default:
		ABORT();
	}

	NOP();
}

define_insn(branch_indirect, branch_indirect_xRC)
{
	int r = rreg_int(1);
	assert(const_int(2) == ba);

	insn_RRR(0x38, REG_g0, r, REG_g0);

	debug(("jmpl [%s]\n", regname(r)));

	NOP();
}

define_insn(call_ref, call_xCC)
{
	label* l = (label*)const_int(1);
	assert(const_int(2) == ba);

	l->type |= Llong30|Lrelative;
	l->at = (uintp)CODEPC;
	l->from = (uintp)CODEPC;
	
	insn_call(0);
	debug(("call ?\n"));

	NOP();
}

define_insn(call, call_xRC)
{
	int r = rreg_int(1);
	assert(const_int(2) == ba);

	insn_RRR(0x38, REG_o7, r, REG_g0);

	debug(("jmpl [%s],o7\n", regname(r)));

	NOP();
}

define_insn(push_int, push_xRC)
{
	int r;
	int a;
	int w;

	a = const_int(2);
	r = rreg_int(1);

	if (a < 6) {
		w = REG_o0 + a;
		if (r != w) {
			clobberRegister(w);
			insn_RRR(2, w, r, REG_g0);
			debug(("mov %s,%s\n", regname(r), regname(w)));
		}
	}
	else {
		w = SLOT2PUSHOFFSET(a);
		ldst_RRC(0x04, r, REG_sp, w);
		debug(("st %s,[sp+%d]\n", regname(r), w));
	}
	argcount++;
}

define_insn(push_float, fpush_xRC)
{
	int r;
	int a;
	int w;

	a = const_int(2);

	if (a < 6) {
		r = rreg_int(1);
		w = REG_o0 + a;
		if (r != w) {
			clobberRegister(w);
			insn_RRR(2, w, r, REG_g0);
			debug(("mov %s,%s\n", regname(r), regname(w)));
		}
	}
	else {
		r = rreg_float(1);
		w = SLOT2PUSHOFFSET(a);
		ldst_RRC(0x24, r, REG_sp, w);
		debug(("stf %s,[sp+%d]\n", fregname(r), w));
	}
	argcount++;
}

define_insn(push_double, fpushl_xRC)
{
	int r;
	int a;
	int w;

	a = const_int(2);

	if (a < 6) {
		w = REG_o0 + a;
		r = rslot_double(1);

		clobberRegister(w);

		ldst_RRC(0, w, REG_fp, r);
		debug(("ld %s,[fp+%d]\n", regname(w), r));
	}
	else {
		r = rreg_double(1);
		w = SLOT2PUSHOFFSET(a);

		ldst_RRC(0x24, r, REG_sp, w);
		debug(("stf %s,[sp+%d]\n", fregname(r), w));
	}
	a++;

	if (a < 6) {
		w = REG_o0 + a;
		r = rslot_double(1);

		clobberRegister(w);
		ldst_RRC(0, w, REG_fp, r+4);
		debug(("ld %s,[fp+%d]\n", regname(w), r+4));
	}
	else {
		r = rreg_double(1);
		w = SLOT2PUSHOFFSET(a);

		ldst_RRC(0x24, r+1, REG_sp, w);
		debug(("stf %s,[sp+%d]\n", fregname(r+1), w));
	}

	argcount += 2;
}

define_insn(popargs, popargs_xxC)
{
	argcount = 0;
}

define_insn(return_int, return_Rxx)
{
	forceRegister(seq_dst(s), REG_o0, Rint);
}

define_insn(return_long, returnl_Rxx)
{
	forceRegister(seq_dst(s), REG_o0, Rint);
	forceRegister(seq_dst(s)+1, REG_o1, Rint);
}

define_insn(return_float, freturn_Rxx)
{
	forceRegister(seq_dst(s), REG_f0, Rfloat);
}

define_insn(return_double, freturnl_Rxx)
{
	forceRegister(seq_dst(s), REG_f0, Rdouble);
}

define_insn(returnarg_int, returnarg_xxR)
{
	int r = rreg_int(2);
	insn_RRR(2, REG_i0, r, REG_g0);
}

define_insn(returnarg_long, returnargl_xxR)
{
	int r1;
	int r2;
	SlotInfo* r;

	r = seq_slot(s, 2);
	r1 = _slowSlotRegister(r, Rint, rread);
	r2 = _slowSlotRegister(r+1, Rint, rread);

	if (REG_i0 != r2) {
		insn_RRR(2, REG_i0, r1, REG_g0);
		insn_RRR(2, REG_i1, r2, REG_g0);
	}
	else if (REG_i1 != r1) {
		insn_RRR(2, REG_i1, r2, REG_g0);
		insn_RRR(2, REG_i0, r1, REG_g0);
	}
	else {
		/* swap i0 <-> i1 */

		insn_RRR(3, r1, r1, r2);

		debug(("xor %s,%s,%s\n", regname(r1), regname(r2), regname(r1)));
		insn_RRR(3, r2, r1, r2);

		debug(("xor %s,%s,%s\n", regname(r1), regname(r2), regname(r2)));
		insn_RRR(3, r1, r1, r2);

		debug(("xor %s,%s,%s\n", regname(r1), regname(r2), regname(r1)));
	}
}

define_insn(returnarg_float, freturnarg_xxR)
{
	int r = rreg_float(2);

	finsn_RRR(1, 0 /* REG_f0 */, 0, r);
	debug(("fmovs %s,%s\n", regname(REG_f0), fregname(r)));
}

define_insn(returnarg_double, freturnargl_xxR)
{
	int r = rreg_double(2);

	finsn_RRR(1, 0 /* REG_f0 */, 0, r);
	finsn_RRR(1, 1 /* REG_f1 */, 0, r+1);
	debug(("fmovs %s,%s\n", regname(REG_f0), fregname(r)));
	debug(("fmovs %s,%s\n", regname(REG_f1), fregname(r+1)));
}