ice.h

GDB Remote Stub Backend for debugging an embedded ARM system via JTAG common hardware debug interfac

/*
 *  Copyright (C) 2004 Tobias Lorenz
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/* EmbeddedICE macrocell programming */

/* ICE Register address */
#define ICE_Debug_control		0x00	/* width  4 */
#define ICE_Debug_status		0x01	/* width  5 */
#define ICE_Vector_catch_control	0x02	/* width  8 */
#define ICE_Debug_comms_control		0x04	/* width  6 */
#define ICE_Debug_comms_data		0x05	/* width 32 */
#define ICE_WP_0_address_value		0x08	/* width 32 */
#define ICE_WP_0_address_mask		0x09	/* width 32 */
#define ICE_WP_0_data_value		0x0A	/* width 32 */
#define ICE_WP_0_data_mask		0x0B	/* width 32 */
#define ICE_WP_0_control_value		0x0C	/* width  9 */
#define ICE_WP_0_control_mask		0x0D	/* width  8 */
#define ICE_WP_1_address_value		0x10	/* width 32 */
#define ICE_WP_1_address_mask		0x11	/* width 32 */
#define ICE_WP_1_data_value		0x12	/* width 32 */
#define ICE_WP_1_data_mask		0x13	/* width 32 */
#define ICE_WP_1_control_value		0x14	/* width  9 */
#define ICE_WP_1_control_mask		0x15	/* width  8 */

/* ICE Debug control register */
#define ICE_DCR_DBGACK		(1<<0)	/* debug acknowledge */
#define ICE_DCR_DBGRQ		(1<<1)	/* debug request */
#define ICE_DCR_INTDIS		(1<<2)	/* interrupt disable */
#define ICE_DCR_Single_step	(1<<3)	/* single stepping */

/* ICE Debug status register */
#define ICE_DSR_DBGACK		(1<<0)	/* debug acknowledge */
#define ICE_DSR_DBGRQ		(1<<1)	/* debug request */
#define ICE_DSR_IFEN		(1<<2)	/* interrupt enable */
#define	ICE_DSR_SYSCOMP		(1<<3)	/* system complete */
#define ICE_DSR_ITBIT		(1<<4)	/* instruction thumb bit */
#define ICE_DSR_Halted		(ICE_DSR_DBGACK | ICE_DSR_SYSCOMP)

/* ICE Vector catch control register */
#define ICE_VCCR_Reset		(1<<0)
#define ICE_VCCR_Undef		(1<<1)
#define ICE_VCCR_SWI		(1<<2)
#define ICE_VCCR_P_Abort	(1<<3)
#define ICE_VCCR_D_Abort	(1<<4)
#define ICE_VCCR_Reserved	(1<<5)
#define ICE_VCCR_IRQ		(1<<6)
#define ICE_VCCR_FIQ		(1<<7)

/* ICE Debug comms control register */
#define ICE_DCCR_Read		(1<<0)
#define ICE_DCCR_Write		(1<<1)

/* ICE WP Control register */
#define ICE_CR_DnRW		(1<<0)
#define ICE_CR_DMAS0		(1<<1)
#define ICE_CR_DMAS1		(1<<2)
#define ICE_CR_nOPC		(1<<3)
#define ICE_CR_nTRANS		(1<<4)
#define ICE_CR_EXTERN		(1<<5)
#define ICE_CR_CHAIN		(1<<6)
#define ICE_CR_RANGE		(1<<7)
#define ICE_CR_ENABLE		(1<<8)
#define ICE_CR_DMAS_Byte	(0<<1)
#define ICE_CR_DMAS_Halfword	(1<<1)
#define ICE_CR_DMAS_Word	(2<<1)
#define ICE_CR_DMAS_Reserved	(3<<1)
#define ICE_CR_All		(0x1FF)	/* for mask setting */

/* Exception vectors */
#define EV_Reset			0x00000000
#define EV_Undefined_instruction	0x00000004
#define EV_Software_integer		0x00000008
#define EV_Prefetch_Abort		0x0000000C
#define EV_Data_Abort			0x00000010
#define EV_Reserved			0x00000014
#define EV_IRQ				0x00000018
#define EV_FIQ				0x0000001C


/* EmbeddedICE */
unsigned long ice_register(unsigned long addr, unsigned long data, unsigned char write);

int ice_halted(void);						// testet, ob CPU angehalten ist
void ice_show_status(void);

/* Debug communication channel */
void ice_dcc_write(long value);	/* not tested */
long ice_dcc_read(long value);	/* not tested */

/* Der EmbeddedICE kann nur zwei Break-/Watchpoints: 0 und 1 */
// mask=0, wenn nur eine Adresse und kein Adressbereich
// mask=1, f黵 Thumb-Instruktionen
// mask=3, f黵 ARM-Instruktionen
void ice_set_hardware_breakpoint(char nr, unsigned long addr, unsigned long mask);	// Hardware Breakpoint setzen und aktivieren
void ice_set_software_breakpoint(char nr, unsigned long pattern);			// Software Breakpoint setzen und aktivieren
void ice_set_hardware_watchpoint(char nr, unsigned long addr, unsigned long mask);	// Hardware Watchpoint setzen und aktivieren

void ice_disable_wp(char nr);					// Break-/Watchpoint deaktivieren
int ice_wp_enabled(char nr);					// testet, ob WP aktiviert ist
unsigned long ice_get_breakpoint_addr(char nr);			// Adresse des Breakpoints (auch wenn nicht aktiviert)
unsigned long ice_get_watchpoint_addr(char nr);			// Adresse des Watchpoints (auch wenn nicht aktiviert)
								//   ... und Abfrage eines Software Breakpoint Patterns

// Prozessor anhalten bei illegalen Instruktionen (Kapitel 5.14 Vector Catching)
// ice_register(ICE_Vector_catch_control, ICE_VCCR_Undef, 1);