jtag.h

GDB Remote Stub Backend for debugging an embedded ARM system via JTAG common hardware debug interfac

/*
 *  Copyright (C) 2004 Tobias Lorenz
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/* tap+jtag+sc functions */

/* parallel port bits */
#define PP_nTRST	0x01
#define PP_TMS		0x02
#define PP_CLK		0x04
#define PP_TDI		0x08
#define PP_PWR		0x80
#define PP_TDO		0x80	/* remember this signal is inverted */

/* TAP state machine */
#define TAPSM_Exit2_DR		0x0
#define TAPSM_Exit1_DR		0x1
#define TAPSM_Shift_DR		0x2
#define TAPSM_Pause_DR		0x3
#define TAPSM_Select_IR_Scan	0x4
#define TAPSM_Update_DR		0x5
#define TAPSM_Capture_DR	0x6
#define TAPSM_Select_DR_Scan	0x7
#define TAPSM_Exit2_IR		0x8
#define TAPSM_Exit1_IR		0x9
#define TAPSM_Shift_IR		0xA
#define TAPSM_Pause_IR		0xB
#define TAPSM_Run_Test_Idle	0xC
#define TAPSM_Update_IR		0xD
#define TAPSM_Capture_IR	0xE
#define TAPSM_Test_Logic_Reset	0xF

/* JTAG commands */
#define JTAG_EXTEST		0x0
#define JTAG_SCAN_N		0x2
#define JTAG_SAMPLE_PRELOAD	0x3
#define JTAG_RESTART		0x4
#define JTAG_CLAMP		0x5
#define JTAG_HIGHZ		0x7
#define JTAG_CLAMPZ		0x9
#define JTAG_INTEST		0xC
#define JTAG_IDCODE		0xE
#define JTAG_BYPASS		0xF

/* Register sizes */
#define JTAG_REG_BR		1	/* bypass register */
#define JTAG_REG_DIR		32	/* device identification code register */
#define JTAG_REG_IR		4	/* instruction register */
#define JTAG_REG_SCSR		5	/* scan chain select register */

/* Scan Chains */
#define SC_Macrocell_scan_test			0
#define SC_Debug				1
#define SC_EmbeddedICE_macrocell_programming	2
#define SC_External_boundary_scan		3
extern const unsigned int SC_sizes[32];

/* Scan Chain 0: Macrocell scan test */
// Instruction memory interface signals
#define SC0_IA		100,130
#define SC0_IABE	156,156
#define SC0_IABORT	155,155
#define SC0_ID		32,1
#define SC0_InM		170,174
#define SC0_InMREQ	143,143
#define SC0_InTRANS	151,151
#define SC0_ISEQ	169,169
#define SC0_ITBIT	150,150
// Data memory interface signals
#define SC0_DA		68,99
#define SCO_DABE	158,158
#define SC0_DABORT	157,157
#define SC0_DD		36,67
#define SC0_DDBE	142,142
#define SC0_DDEN	35,35
#define SC0_DLOCK	182,182
#define SC0_DMAS	146,147
#define SC0_DMORE	181,181
#define SC0_DnM		175,179
#define SC0_DnMREQ	144,144
#define SC0_DnRW	145,145
#define SC0_DnTRANS	152,152
#define SC0_DSEQ	180,180
// Coprocessor interface signals
#define SC0_CHSD	164,165
#define SC0_CHSE	166,167
#define SC0_LATECANCEL	149,149
#define SC0_PASS	148,148
// Debug signals
#define SC0_COMMRX	136,136
#define SC0_COMMTX	137,137
#define SC0_DBGACK	138,138
#define SC0_DBGRQI	141,141
#define SC0_DEWPT	132,132
#define SC0_EDBGRQ	133,133
#define SC0_EXTERN0	134,134
#define SC0_EXTERN1	135,135
#define SC0_IEBKPT	131,131
#define SC0_INSTREXEC	184,184
#define SC0_RANGEOUT0	139,139
#define SC0_RANGEOUT1	140,140
// Miscellaneous signals
#define SC0_BIGEND	162,162
#define SC0_ECLK	183,183
#define SC0_nFIQ	159,159
#define SC0_HIVECS	163,163
#define SC0_nIRQ	160,160
#define SC0_ISYNC	161,161
#define SC0_nRESET	153,153
#define SC0_nWAIT	154,154
#define SC0_UNIEN	168,168
// Internal signals
#define SC0_SYSSPEED	33,33
#define SC0_Unused	34,34


/* tap state machine */
void tapsm_reset(unsigned char wire_reset);

/* jtag */
void jtag_ireg(unsigned long *data, unsigned int length);
void jtag_dreg(unsigned long *data, unsigned int length);
void jtag_instruction(unsigned long cmd, unsigned long *data, unsigned int size);
void jtag_get_idcode(void);
extern unsigned long jtag_idcode;

/* scan chain */
void sc_select(unsigned long sc);
unsigned long sc_read(unsigned long *data, unsigned int hibit, unsigned int lobit);