📄 neutrality.vhd
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-- ********************************************
LIBRARY ieee;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
--*********************************************
ENTITY neutrality is
PORT(
CLK_1,res : IN STD_LOGIC;
d1_in,d2_in,d3_in,d4_in,d5_in,d6_in,d7_in,d8_in,d9_in : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
com_out : OUT STD_LOGIC_VECTOR(7 DOWNTO 0)
);
END neutrality ;
--*********************************************
ARCHITECTURE A OF neutrality IS
SIGNAL d1,d2,d3,d4,d5,d6,d7,d8,d9 : STD_LOGIC_VECTOR(7 downto 0);
SIGNAL com_out_buf_1,com_out_buf : STD_LOGIC_VECTOR(7 downto 0);
SIGNAL com_d_1,com_d_2,com_d_3,com_d_4,com_d_5,com_d_6,com_d_7,com_d_8,com_d_9 : STD_LOGIC_VECTOR(7 DOWNTO 0);
SIGNAL com_res_1,com_res_2,com_res_3,com_res_4,com_res_5,
com_res_6,com_res_7,com_res_8,com_res_9 : STD_LOGIC_VECTOR(2 DOWNTO 0);
component reserch
PORT(
f_in : in std_logic_vector(7 downto 0);
f_out : out std_logic_vector(2 downto 0)
);
end component;
BEGIN
com:block
begin
process(d1,d2,d3,d4,d5,d6,d7,d8,d9,clk_1)
begin
if res='1' then
d1<=(others=>'0');d2<=(others=>'0');d3<=(others=>'0');d4<=(others=>'0');
d5<=(others=>'0');d6<=(others=>'0');d7<=(others=>'0');d8<=(others=>'0');
d9<=(others=>'0');
elsif rising_edge(clk_1) then
d1<=d1_in;d2<=d2_in;d3<=d3_in;d4<=d4_in;
d5<=d5_in;d6<=d6_in;d7<=d7_in;d8<=d8_in;
d9<=d9_in;
end if;
if d1>=d2 then com_d_1(7)<='1'; --d1
else com_d_1(7)<='0';
end if;
if d1>=d3 then com_d_1(6)<='1';
else com_d_1(6)<='0';
end if;
if d1>=d4 then com_d_1(5)<='1';
else com_d_1(5)<='0';
end if;
if d1>=d5 then com_d_1(4)<='1';
else com_d_1(4)<='0';
end if;
if d1>=d6 then com_d_1(3)<='1';
else com_d_1(3)<='0';
end if;
if d1>=d7 then com_d_1(2)<='1';
else com_d_1(2)<='0';
end if;
if d1>=d8 then com_d_1(1)<='1';
else com_d_1(1)<='0';
end if;
if d1>=d9 then com_d_1(0)<='1';
else com_d_1(0)<='0';
end if;
if d2>=d1 then com_d_2(7)<='1'; --d2
else com_d_2(7)<='0';
end if;
if d2>=d3 then com_d_2(6)<='1';
else com_d_2(6)<='0';
end if;
if d2>=d4 then com_d_2(5)<='1';
else com_d_2(5)<='0';
end if;
if d2>=d5 then com_d_2(4)<='1';
else com_d_2(4)<='0';
end if;
if d2>=d6 then com_d_2(3)<='1';
else com_d_2(3)<='0';
end if;
if d2>=d7 then com_d_2(2)<='1';
else com_d_2(2)<='0';
end if;
if d2>=d8 then com_d_2(1)<='1';
else com_d_2(1)<='0';
end if;
if d2>=d9 then com_d_2(0)<='1';
else com_d_2(0)<='0';
end if;
if d3>=d1 then com_d_3(7)<='1'; --d3
else com_d_3(7)<='0';
end if;
if d3>=d2 then com_d_3(6)<='1';
else com_d_3(6)<='0';
end if;
if d3>=d4 then com_d_3(5)<='1';
else com_d_3(5)<='0';
end if;
if d3>=d5 then com_d_3(4)<='1';
else com_d_3(4)<='0';
end if;
if d3>=d6 then com_d_3(3)<='1';
else com_d_3(3)<='0';
end if;
if d3>=d7 then com_d_3(2)<='1';
else com_d_3(2)<='0';
end if;
if d3>=d8 then com_d_3(1)<='1';
else com_d_3(1)<='0';
end if;
if d3>=d9 then com_d_3(0)<='1';
else com_d_3(0)<='0';
end if;
if d4>=d1 then com_d_4(7)<='1'; --d4
else com_d_4(7)<='0';
end if;
if d4>=d2 then com_d_4(6)<='1';
else com_d_4(6)<='0';
end if;
if d4>=d3 then com_d_4(5)<='1';
else com_d_4(5)<='0';
end if;
if d4>=d5 then com_d_4(4)<='1';
else com_d_4(4)<='0';
end if;
if d4>=d6 then com_d_4(3)<='1';
else com_d_4(3)<='0';
end if;
if d4>=d7 then com_d_4(2)<='1';
else com_d_4(2)<='0';
end if;
if d4>=d8 then com_d_4(1)<='1';
else com_d_4(1)<='0';
end if;
if d4>=d9 then com_d_4(0)<='1';
else com_d_4(0)<='0';
end if;
if d5>=d1 then com_d_5(7)<='1'; --d5
else com_d_5(7)<='0';
end if;
if d5>=d2 then com_d_5(6)<='1';
else com_d_5(6)<='0';
end if;
if d5>=d3 then com_d_5(5)<='1';
else com_d_5(5)<='0';
end if;
if d5>=d4 then com_d_5(4)<='1';
else com_d_5(4)<='0';
end if;
if d5>=d6 then com_d_5(3)<='1';
else com_d_5(3)<='0';
end if;
if d5>=d7 then com_d_5(2)<='1';
else com_d_5(2)<='0';
end if;
if d5>=d8 then com_d_5(1)<='1';
else com_d_5(1)<='0';
end if;
if d5>=d9 then com_d_5(0)<='1';
else com_d_5(0)<='0';
end if;
if d6>=d1 then com_d_6(7)<='1'; --d6
else com_d_6(7)<='0';
end if;
if d6>=d2 then com_d_6(6)<='1';
else com_d_6(6)<='0';
end if;
if d6>=d3 then com_d_6(5)<='1';
else com_d_6(5)<='0';
end if;
if d6>=d4 then com_d_6(4)<='1';
else com_d_6(4)<='0';
end if;
if d6>=d5 then com_d_6(3)<='1';
else com_d_6(3)<='0';
end if;
if d6>=d7 then com_d_6(2)<='1';
else com_d_6(2)<='0';
end if;
if d6>=d8 then com_d_6(1)<='1';
else com_d_6(1)<='0';
end if;
if d6>=d9 then com_d_6(0)<='1';
else com_d_6(0)<='0';
end if;
if d7>=d1 then com_d_7(7)<='1'; --d7
else com_d_7(7)<='0';
end if;
if d7>=d2 then com_d_7(6)<='1';
else com_d_7(6)<='0';
end if;
if d7>=d3 then com_d_7(5)<='1';
else com_d_7(5)<='0';
end if;
if d7>=d4 then com_d_7(4)<='1';
else com_d_7(4)<='0';
end if;
if d7>=d5 then com_d_7(3)<='1';
else com_d_7(3)<='0';
end if;
if d7>=d6 then com_d_7(2)<='1';
else com_d_7(2)<='0';
end if;
if d7>=d8 then com_d_7(1)<='1';
else com_d_7(1)<='0';
end if;
if d7>=d9 then com_d_7(0)<='1';
else com_d_7(0)<='0';
end if;
if d8>=d1 then com_d_8(7)<='1'; --d8
else com_d_8(7)<='0';
end if;
if d8>=d2 then com_d_8(6)<='1';
else com_d_8(6)<='0';
end if;
if d8>=d3 then com_d_8(5)<='1';
else com_d_8(5)<='0';
end if;
if d8>=d4 then com_d_8(4)<='1';
else com_d_8(4)<='0';
end if;
if d8>=d5 then com_d_8(3)<='1';
else com_d_8(3)<='0';
end if;
if d8>=d6 then com_d_8(2)<='1';
else com_d_8(2)<='0';
end if;
if d8>=d7 then com_d_8(1)<='1';
else com_d_8(1)<='0';
end if;
if d8>=d9 then com_d_8(0)<='1';
else com_d_8(0)<='0';
end if;
if d9>=d1 then com_d_9(7)<='1'; --d9
else com_d_9(7)<='0';
end if;
if d9>=d2 then com_d_9(6)<='1';
else com_d_1(6)<='0';
end if;
if d9>=d3 then com_d_9(5)<='1';
else com_d_9(5)<='0';
end if;
if d9>=d4 then com_d_9(4)<='1';
else com_d_9(4)<='0';
end if;
if d9>=d5 then com_d_9(3)<='1';
else com_d_9(3)<='0';
end if;
if d9>=d6 then com_d_9(2)<='1';
else com_d_9(2)<='0';
end if;
if d9>=d7 then com_d_9(1)<='1';
else com_d_9(1)<='0';
end if;
if d9>=d8 then com_d_9(0)<='1';
else com_d_9(0)<='0';
end if;
end process;
end block com;
research_compare : BLOCK
begin
U1: reserch PORT MAP( f_in(7 downto 0) => com_d_1(7 downto 0), f_out(2 downto 0) => com_res_1(2 downto 0) );
U2: reserch PORT MAP( f_in(7 downto 0) => com_d_2(7 downto 0), f_out(2 downto 0) => com_res_2(2 downto 0) );
U3: reserch PORT MAP( f_in(7 downto 0) => com_d_3(7 downto 0), f_out(2 downto 0) => com_res_3(2 downto 0) );
U4: reserch PORT MAP( f_in(7 downto 0) => com_d_4(7 downto 0), f_out(2 downto 0) => com_res_4(2 downto 0) );
U5: reserch PORT MAP( f_in(7 downto 0) => com_d_5(7 downto 0), f_out(2 downto 0) => com_res_5(2 downto 0) );
U6: reserch PORT MAP( f_in(7 downto 0) => com_d_6(7 downto 0), f_out(2 downto 0) => com_res_6(2 downto 0) );
U7: reserch PORT MAP( f_in(7 downto 0) => com_d_7(7 downto 0), f_out(2 downto 0) => com_res_7(2 downto 0) );
U8: reserch PORT MAP( f_in(7 downto 0) => com_d_8(7 downto 0), f_out(2 downto 0) => com_res_8(2 downto 0) );
U9: reserch PORT MAP( f_in(7 downto 0) => com_d_9(7 downto 0), f_out(2 downto 0) => com_res_9(2 downto 0) );
END BLOCK research_compare;
compare_out : BLOCK
begin
process(com_res_1,com_res_2,com_res_3,com_res_4,com_res_5,
com_res_6,com_res_7,com_res_8,com_res_9,
d1,d2,d3,d4,d5,d6,d7,d8,d9)
begin
if com_res_1="100" then com_out_buf<=d1;
elsif com_res_2="100" then com_out_buf<=d2;
elsif com_res_3="100" then com_out_buf<=d3;
elsif com_res_4="100" then com_out_buf<=d4;
elsif com_res_5="100" then com_out_buf<=d5;
elsif com_res_6="100" then com_out_buf<=d6;
elsif com_res_7="100" then com_out_buf<=d7;
elsif com_res_8="100" then com_out_buf<=d8;
elsif com_res_9="100" then com_out_buf<=d9;
elsif com_res_1="101" then com_out_buf<=d1;
elsif com_res_2="101" then com_out_buf<=d2;
elsif com_res_3="101" then com_out_buf<=d3;
elsif com_res_4="101" then com_out_buf<=d4;
elsif com_res_5="101" then com_out_buf<=d5;
elsif com_res_6="101" then com_out_buf<=d6;
elsif com_res_7="101" then com_out_buf<=d7;
elsif com_res_8="101" then com_out_buf<=d8;
elsif com_res_9="101" then com_out_buf<=d9;
elsif com_res_1="110" then com_out_buf<=d1;
elsif com_res_2="110" then com_out_buf<=d2;
elsif com_res_3="110" then com_out_buf<=d3;
elsif com_res_4="110" then com_out_buf<=d4;
elsif com_res_5="110" then com_out_buf<=d5;
elsif com_res_6="110" then com_out_buf<=d6;
elsif com_res_7="110" then com_out_buf<=d7;
elsif com_res_8="110" then com_out_buf<=d8;
elsif com_res_9="110" then com_out_buf<=d9;
elsif com_res_1="111" then com_out_buf<=d1;
elsif com_res_2="111" then com_out_buf<=d2;
elsif com_res_3="111" then com_out_buf<=d3;
elsif com_res_4="111" then com_out_buf<=d4;
elsif com_res_5="111" then com_out_buf<=d5;
elsif com_res_6="111" then com_out_buf<=d6;
elsif com_res_7="111" then com_out_buf<=d7;
elsif com_res_8="111" then com_out_buf<=d8;
elsif com_res_9="111" then com_out_buf<=d9;
end if;
if rising_edge(clk_1) then
com_out_buf_1<=com_out_buf;
end if;
com_out<=com_out_buf_1;
END process;
END BLOCK compare_out;
END A;
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