projectvectors.h

freescale hc12_C32 例程

/******************************************************************************
*                                             COPYRIGHT (c) MOTOROLA 2003   
* FILE NAME: projectvectors.h                                             
*                                                                           
* PURPOSE: header file which includes all C32 (L45J) interrupt handler prototypes
*		     							 
*                                                                           
* DESCRIPTION:  project vectors (interrupt handlers)        
*                                                                           
* NOTE: Interrupt vectors must point to fixed paged address. From the fixed
* 		routine a call can redirect to paged memory. 
* 
* AUTHOR: r9aabe    LOCATION: Austin,TX     LAST EDIT DATE: 05/12/03  
*                                                                           
******************************************************************************/

#ifndef PROJECTVECTORS_H        /*prevent duplicated includes*/
#define PROJECTVECTORS_H

/*Include Files*/
#include "projectglobals.h"

/*Local Prototypes*/
void software_trap(void);


#pragma CODE_SEG NON_BANKED        
void unused_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED
void pwm_shutdown_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED
void portp_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED
void mscan0_tx_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED
void mscan0_rx_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED
void mscan0_error_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED
void mscan0_wakeup_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED
void flash_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED
void crg_scm_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED
void crg_pll_lock_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED
void portj_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED
void atd0_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED
void sci0_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED
void spi0_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED
void pa_a_edge_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED
void pa_a_overflow_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED
void rti_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED
void irq_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED
void xirq_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED
void swi_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED
void trap_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED
void cop_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED
void clockmonitor_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED        
void tim0_ch0_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED        
void tim0_ch1_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED        
void tim0_ch2_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED        
void tim0_ch3_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED        
void tim0_ch4_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED        
void tim0_ch5_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED        
void tim0_ch6_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED        
void tim0_ch7_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED        
void tim0_overflow_isr(void);
#pragma CODE_SEG DEFAULT

#pragma CODE_SEG NON_BANKED        
void vreg_lvi_isr(void);
#pragma CODE_SEG DEFAULT

#endif /*PROJECTVECTORS_H*/