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📄 stm32f107.c

📁 LWIP在STM32裸机上的移植
💻 C
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#include "stm32_eth.h"
#include "stm32f107.h"
#include <stdio.h>

#define PHY_ADDRESS       0x00		 	/* Relative to STM3210C-EVAL Board */

//#define MII_MODE          			/* MII mode for STM3210C-EVAL Board (MB784) (check jumpers setting) */
#define RMII_MODE       				/* RMII mode for STM3210C-EVAL Board (MB784) (check jumpers setting) */

void LED_Configuration(void);
void KEY_Configuration(void);
void TIM3_Configuration(void);
void GPIO_Configuration(void);
void NVIC_Configuration(void);
void IWDG_Configuration(void);
void Ethernet_Configuration(void);

void System_Setup(void)
{
//	RCC_ClocksTypeDef RCC_Clocks;

  	SystemInit();			//Setup STM32 clock, PLL and Flash configuration

	RCC_AHBPeriphClockCmd(RCC_AHBPeriph_ETH_MAC | RCC_AHBPeriph_ETH_MAC_Tx |
                          RCC_AHBPeriph_ETH_MAC_Rx, ENABLE);

  	RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC |
                           RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_AFIO |
						   RCC_APB2Periph_USART1, ENABLE);

	/* CAN1 and CAN2 Periph clocks enable */
	RCC_APB1PeriphClockCmd(RCC_APB1Periph_CAN1 | RCC_APB1Periph_CAN2, ENABLE);	 //不用CAN时关闭此时钟   

	RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE);       //Enable TIM3 clock

//	RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);

	LED_Configuration();
//	KEY_Configuration();
 	NVIC_Configuration();  
	GPIO_Configuration();
	Ethernet_Configuration();	//Configure the Ethernet peripheral

	TIM3_Configuration();
//	IWDG_Configuration();

  	/* SystTick configuration: an interrupt every 10ms */
// 	RCC_GetClocksFreq(&RCC_Clocks);

// 	SysTick_Config(RCC_Clocks.SYSCLK_Frequency / 100);

    /* Update the SysTick IRQ priority should be higher than the Ethernet IRQ */
    /* The Localtime should be updated during the Ethernet packets processing */
// 	NVIC_SetPriority(SysTick_IRQn, 1);   
}

void KEY_Configuration(void)
{
	GPIO_InitTypeDef GPIO_InitStructure;

	//KEY1->PC4 , KEY3->PC13
    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_13;
    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; 			 //上拉输入
    GPIO_Init(GPIOC, &GPIO_InitStructure);

	//KEY2->PB10
    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; 			 //上拉输入
    GPIO_Init(GPIOB, &GPIO_InitStructure);
}

void LED_Configuration(void)
{
	GPIOE->CRH &= 0XF0FFFFFF;	//PE14 -> Error指示灯
	GPIOE->CRH |= 0X03000000;
	GPIOE->ODR |= 1<<14;		
}

void Ethernet_Configuration(void)
{
  	ETH_InitTypeDef ETH_InitStructure;

  	/* MII/RMII Media interface selection -----------------------------------*/
#ifdef MII_MODE /* Mode MII with STM3210C-EVAL  */
  	GPIO_ETH_MediaInterfaceConfig(GPIO_ETH_MediaInterface_MII);

  	/* Get HSE clock = 25MHz on PA8 pin (MCO) */
  	RCC_MCOConfig(RCC_MCO_HSE);

#elif defined RMII_MODE  /* Mode RMII with STM3210C-EVAL */
  	GPIO_ETH_MediaInterfaceConfig(GPIO_ETH_MediaInterface_RMII);

  	/* Set PLL3 clock output to 50MHz (25MHz /5 *10 =50MHz) */
  	RCC_PLL3Config(RCC_PLL3Mul_10);
  	/* Enable PLL3 */
  	RCC_PLL3Cmd(ENABLE);
  	/* Wait till PLL3 is ready */
  	while (RCC_GetFlagStatus(RCC_FLAG_PLL3RDY) == RESET)
  	{}

  	/* Get PLL3 clock on PA8 pin (MCO) */
  	RCC_MCOConfig(RCC_MCO_PLL3CLK);
#endif

  	/* Reset ETHERNET on AHB Bus */
  	ETH_DeInit();

  	/* Software reset */
  	ETH_SoftwareReset();

  	/* Wait for software reset */
  	while (ETH_GetSoftwareResetStatus() == SET);

  	/* ETHERNET Configuration -----------------------------------------------*/
  	/* Call ETH_StructInit if you don't like to configure all ETH_InitStructure parameter */
  	ETH_StructInit(&ETH_InitStructure);

  	/* Fill ETH_InitStructure parametrs */
  	/*------------------------   MAC   --------------------------------------*/
  	ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Enable  ;
  	ETH_InitStructure.ETH_LoopbackMode = ETH_LoopbackMode_Disable;
  	ETH_InitStructure.ETH_RetryTransmission = ETH_RetryTransmission_Disable;
  	ETH_InitStructure.ETH_AutomaticPadCRCStrip = ETH_AutomaticPadCRCStrip_Disable;
  	ETH_InitStructure.ETH_ReceiveAll = ETH_ReceiveAll_Disable;
  	ETH_InitStructure.ETH_BroadcastFramesReception = ETH_BroadcastFramesReception_Enable;
  	ETH_InitStructure.ETH_PromiscuousMode = ETH_PromiscuousMode_Disable;
  	ETH_InitStructure.ETH_MulticastFramesFilter = ETH_MulticastFramesFilter_Perfect;
  	ETH_InitStructure.ETH_UnicastFramesFilter = ETH_UnicastFramesFilter_Perfect;
#ifdef CHECKSUM_BY_HARDWARE
  	ETH_InitStructure.ETH_ChecksumOffload = ETH_ChecksumOffload_Enable;
#endif

  	/*------------------------   DMA   -----------------------------------*/  
  
  	/* When we use the Checksum offload feature, we need to enable the Store and Forward mode: 
  	the store and forward guarantee that a whole frame is stored in the FIFO, so the MAC can insert/verify the checksum, 
  	if the checksum is OK the DMA can handle the frame otherwise the frame is dropped */
  	ETH_InitStructure.ETH_DropTCPIPChecksumErrorFrame = ETH_DropTCPIPChecksumErrorFrame_Enable; 
  	ETH_InitStructure.ETH_ReceiveStoreForward = ETH_ReceiveStoreForward_Enable;         
  	ETH_InitStructure.ETH_TransmitStoreForward = ETH_TransmitStoreForward_Enable;     
 
  	ETH_InitStructure.ETH_ForwardErrorFrames = ETH_ForwardErrorFrames_Disable;       
  	ETH_InitStructure.ETH_ForwardUndersizedGoodFrames = ETH_ForwardUndersizedGoodFrames_Disable;   
  	ETH_InitStructure.ETH_SecondFrameOperate = ETH_SecondFrameOperate_Enable;                                                          
  	ETH_InitStructure.ETH_AddressAlignedBeats = ETH_AddressAlignedBeats_Enable;      
  	ETH_InitStructure.ETH_FixedBurst = ETH_FixedBurst_Enable;                
  	ETH_InitStructure.ETH_RxDMABurstLength = ETH_RxDMABurstLength_32Beat;          
  	ETH_InitStructure.ETH_TxDMABurstLength = ETH_TxDMABurstLength_32Beat;                                                                 
  	ETH_InitStructure.ETH_DMAArbitration = ETH_DMAArbitration_RoundRobin_RxTx_2_1;

  	/* Configure Ethernet */
//	ETH_Init(&ETH_InitStructure, PHY_ADDRESS);

	if(ETH_Init(&ETH_InitStructure, PHY_ADDRESS))
		GPIOE->BSRR |= GPIO_Pin_14;			//LED不亮(网络初始化正常)
	else	
	  	GPIOE->BRR |= GPIO_Pin_14;			//LED亮(初始化错误)
 
  	/* Enable the Ethernet Rx Interrupt */
  	ETH_DMAITConfig(ETH_DMA_IT_NIS | ETH_DMA_IT_R, ENABLE);

}

#ifdef MII_MODE

void GPIO_Configuration(void)
{
    GPIO_InitTypeDef GPIO_InitStructure;

    /* ETHERNET pins configuration */
    /* AF Output Push Pull:
    - ETH_MII_MDIO / ETH_RMII_MDIO: PA2
    - ETH_MII_MDC  / ETH_RMII_MDC : PC1
    - ETH_MII_TXD2  : PC2
    - ETH_MII_TX_EN / ETH_RMII_TX_EN: PB11
    - ETH_MII_TXD0  / ETH_RMII_TXD0 : PB12
    - ETH_MII_TXD1  / ETH_RMII_TXD1 : PB13
    
    - ETH_MII_TXD3  : PB8     
    - ETH_MII_PPS_OUT / ETH_RMII_PPS_OUT: PB5
    */
  
  	/* Configure PA2 as alternate function push-pull */
  	GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
  	GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  	GPIO_Init(GPIOA, &GPIO_InitStructure);

  	/* Configure PC1, PC2 and PC3 as alternate function push-pull */
  	GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1 | GPIO_Pin_2;
  	GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  	GPIO_Init(GPIOC, &GPIO_InitStructure);

  	/* Configure PB5, PB8, PB11, PB12 and PB13 as alternate function push-pull */
  	GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_8 | GPIO_Pin_11 |
                                  GPIO_Pin_12 | GPIO_Pin_13;
  	GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  	GPIO_Init(GPIOB, &GPIO_InitStructure);

    /**************************************************************/
    /*               For Remapped Ethernet pins                   */
    /**************************************************************/
    /* Input (Reset Value):
    - ETH_MII_CRS CRS                   : PA0
    - ETH_MII_RX_CLK / ETH_RMII_REF_CLK : PA1    (RMII)
    - ETH_MII_COL                       : PA3
    - ETH_MII_RX_DV  / ETH_RMII_CRS_DV  : PD8    (RMII)
    - ETH_MII_TX_CLK                    : PC3
    - ETH_MII_RXD0   / ETH_RMII_RXD0    : PD9    (RMII)

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