📄 txloop.asm
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* TXLOOP - Transmit loop using Mailbox 5
* This program TRANSMITS data to another CAN module using MAILBOX5
* This program could either loop forever or transmit "n+1" # of times,
* where "n" is the TXCOUNT value. The # of times data was actually
* transmitted is recorded in 304h in Data memory
* COMMENTS : The two CAN modules must be connected to each other with
* appropriate termination resistors. Program does not use any interrupts.
* A CLKOUT of 40 MHz yields a baud rate of 1 Mbits/s.
; XF is pulsed everytime a packet is transmitted. At 40 MHz CLKOUT, XF will
; pulse every 136 uS.
; Last update 12/27/2002
.title "TXLOOP" ; Title
.include "240x.h" ; Variable and register declaration
.include "vector.h" ; Vector table (takes care of dummy password)
.global START
TXCOUNT .set 01000 ; Determines the # of Xmit cycles
;------------------------------------------------------------------------
; Other constant definitions
;------------------------------------------------------------------------
DP_PF1 .set 0E0h ; Page 1 of peripheral file (7000h/80h)E0
DP_CAN .set 0E2h ; CAN Registers (7100h)
DP_CAN2 .set 0E4h ; CAN RAM (7200h)
KICK_DOG .macro ; Watchdog reset macro
LDP #00E0h
SPLK #05555h, WDKEY
SPLK #0AAAAh, WDKEY
LDP #0h
.endm
.text
START: KICK_DOG ; Reset Watchdog counter
SPLK #0,60h
OUT 60h,WSGR ; Set waitstates for external memory (if used)
SETC INTM ; Disable interrupts
SPLK #0000h,IMR ; Mask all core interrupts
LDP #0E0h
SPLK #006Fh, WDCR ; Disable WD
SPLK #0010h,SCSR1 ; Enable clock to CAN module (For 240xA only)
LDP #225
SPLK #00C0H,MCRB ; Configure CAN pins
CALL AR_INIT
MAR *,AR6 ; Initialize counter @ 304h
SPLK #0h,*
LDP #DP_CAN ; Enable all CAN interrupts. This is reqd
SPLK #03F7Fh,CANIMR ; to poll flags.
;**************************************************************************
;****** DISABLE MBX BEFORE WRITING TO MSGID/MSGCTRL OF MBX5 **********
;**************************************************************************
SPLK #0000000000000000b,CANMDER ; Disable all mailboxes
; ||||||||||||||||
; FEDCBA9876543210
;**************************************************************************
;*********** Set MSGID/MSGCTRL for transmit mailbox **********
;**************************************************************************
LDP #DP_CAN2
SPLK #1010111000010101b,CANMSGID5H ; Set mailbox 5 ID
; |||||||||||||||| ; XMIT Mailbox
; FEDCBA9876543210
;bit 0-12 upper 13 bits of extended identifier
;bit 13 Auto answer mode bit
;bit 14 Acceptance mask enable bit
;bit 15 Identifier extension bit
SPLK #1101110000110101b,CANMSGID5L ; AE15 DC35 --> ID
; ||||||||||||||||
; FEDCBA9876543210
;bit 0-15 lower part of extended identifier
SPLK #0000000000001000b,CANMSGCTRL5 ; 0008
; ||||||||||||||||
; FEDCBA9876543210
;bit 0-3 Data length code. 1000 = 8 bytes
;bit 4 0: data frame
;**************************************************************************
;****** ENABLE MBX AFTER WRITING TO MSGID/MSGCTRL OF MBX5 **********
;**************************************************************************
LDP #DP_CAN
SPLK #0000000000100000b,CANMDER
; ||||||||||||||||
; FEDCBA9876543210
;bit 0-5 enable mailbox 5
;**************************************************************************
;*********** Write CAN Mailboxes **********
;**************************************************************************
LDP #DP_CAN2
SPLK #00100h,CANMBX5A ; Message to transmit
SPLK #00302h,CANMBX5B
SPLK #00504h,CANMBX5C
SPLK #00706h,CANMBX5D
COPY5 MAR *,AR5 ; AR5 => Mailbox 5 RAM (XMIT)
LACL *+,AR0 ; Copy Mailbox 5 RAM in B0 (300 & above)
SACL *+,AR4 ; AR4 => Counter
BANZ COPY5 ; All four words read?
;**************************************************************************
;*********** Bit timing Registers configuration **********************
;**************************************************************************
LDP #DP_CAN
SPLK #0001000000000000b,CANMCR
; ||||||||||||||||
; FEDCBA9876543210
;bit 12 Change configuration request for write-access to BCR (CCR=1)
W_CCE BIT CANGSR,#0Bh ; Wait for Change config Enable
BCND W_CCE,NTC ; bit to be set in GSR
;SPLK #0000000000000000b,CANBCR2 ; For 1 M bits/s @ 20 MHz CLKOUT
SPLK #0000000000000001b,CANBCR2 ; For 1 M bits/s @ 40 MHz CLKOUT
; ||||||||||||||||
; FEDCBA9876543210
; bit 0-7 Baud rate prescaler
; bit 8-15 Reserved
SPLK #0000000011111010b,CANBCR1 ; For 1 M bits/s @ 85 % samp. pt
; ||||||||||||||||
; FEDCBA9876543210
; bit 0-2 TSEG2
; bit 3-6 TSEG1
; bit 7 Sample point setting (1: 3 times, 0: once)
; bit 8-9 Synchronization jump width
; bit A-F Reserved
SPLK #0000000000000000b,CANMCR
; ||||||||||||||||
; FEDCBA9876543210
;bit 12 Change conf register
W_NCCE BIT CANGSR,#0Bh ; Wait for Change config disable
BCND W_NCCE,TC
;**************************************************************************
;*********** TRANSMIT **********
;**************************************************************************
TX_LOOP SPLK #0080h,CANTCR ; Transmit request for mailbox 5
SETC XF ; A toggling XF bit indicates
RPT #080h ; that the program is still
NOP ; running.
CLRC XF
W_TA BIT CANTCR,BIT15 ; Wait for transmission acknowledge
BCND W_TA,NTC
W_FLAG3 BIT CANIFR,BIT13 ; wait for interrupt flag
BCND W_FLAG3,NTC
MAR *,AR6 ; This loop merely keeps a
LACL * ; count of the number of times
ADD #1 ; data packets were transmitted
SACL * ; to the remote node.
SPLK #8000h,CANTCR ; reset TA
MAR *,AR1
;BANZ TX_LOOP ; Uncomment this line for "n" transmissions
B TX_LOOP ; Uncomment this line for infinite transmissions
LOOP B LOOP ; Loop here after completion of transmissions
;**************************************************************************
;*********** COMMON ROUTINES **********
;**************************************************************************
; AR Initializing routine
AR_INIT LAR AR0,#0300h ; AR0 => Xmitted data
LAR AR1,#TXCOUNT ; AR1 => Counter for TX loops
LAR AR4,#03 ; AR4 => Counter for copying data
LAR AR5,#722Ch ; AR5 => Mailbox 5 RAM (TRANSMIT)
LAR AR6,#304h ; AR6 keeps track of transmit cycles
RET
GISR1: RET
GISR2: RET
GISR3: RET
GISR4: RET
GISR5: RET
GISR6: RET
PHANTOM: RET
.end
; c:\CAN\JH\TXLOOP.asm
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