rem-req.asm

TI公司TMS320LF240X DSP实现CAN通讯的完整源代码！！！！！用2000系列DSP的同志不下载会后悔

*    PROGRAM TO TRANSMIT A REMOTE FRAME REQUEST IN THE 24x/240xA CAN 
* This program transmits a remote frame and expects a data frame in response
* Transmission of a remote frame by (and reception of the data frame in) MBX3
* To be used along with REM-ANS.asm



	.title 		"REM_REQ"  		; Title 
    .include    "240x.h"		; Variable and register declaration
    .include    "vector.h"		; Vector table (takes care of dummy password)
    .global		START

;-----------------------------------------------------------
; Other constant definitions
;-----------------------------------------------------------	 

DP_PF1		.set	0E0h	; Page 1 of peripheral file (7000h/80h
DP_CAN		.set	0E2h    ; Can Registers (7100h)
DP_CAN2		.set	0E4h    ; Can RAM (7200h)

;-----------------------------------------------------------------------------
; M A C R O - Definitions
;-----------------------------------------------------------------------------

KICK_DOG	.macro				; Watchdog reset macro
		LDP		#00E0h
		SPLK	#05555h, WDKEY
		SPLK	#0AAAAh, WDKEY
		LDP		#0h
		.endm

;==============================================================================
; M A I N   C O D E  - starts here
;==============================================================================
		.text

START:	KICK_DOG        ; Reset Watchdog counter
		SPLK	#0,60h
		OUT		60h,WSGR		; Set waitstates for external memory (if used)
		SETC	INTM    		; Disable interrupts
		SPLK	#0000h,IMR		; Mask all core interrupts
		LDP		#0E0h
		SPLK	#006Fh, WDCR	; Disable WD 
		SPLK	#0010h,SCSR1	; Enable clock to CAN module (For 240xA only)
				    
		LDP		#225		
		SPLK	#00C0H,MCRB		; Configure CAN pins				
		
		LDP 	#DP_CAN
		SPLK	#1011111111111111b,CANIMR	; Enable all CAN interrupts

;**************************************************************************
;******     DISABLE MBX BEFORE WRITING TO MSGID/MSGCTRL OF MBX3  **********
;**************************************************************************	
	   
	   	SPLK	#0000000000000000b,CANMDER 	
;			 	 ||||||||||||||||
;			 	 FEDCBA9876543210   

;**************************************************************************
;***********                Write CAN Mailboxes                  **********
;**************************************************************************

		LDP		#DP_CAN2
				
		SPLK	#1001111111111111b,CANMSGID3H
;			 	 ||||||||||||||||
;			 	 FEDCBA9876543210  

;bit 0-12	upper 13 bits of extended identifier
;bit 13		Auto answer mode bit
;bit 14		Acceptance mask enable bit
;bit 15		Identifier extension bit

		SPLK	#1111111111111111b,CANMSGID3L
;			 	 ||||||||||||||||
;			 	 FEDCBA9876543210 

;bit 0-15	lower part of extended identifier

		SPLK	#0000000000011000b,CANMSGCTRL3
;			 	 ||||||||||||||||
;			 	 FEDCBA9876543210

;bit 0-3	Data length code. 1000 = 8 bytes
;bit 4		1: Remote frame	
	
;**************************************************************************
;***********    		Enable Mailbox                   		 **********
;**************************************************************************

		LDP 	#DP_CAN	
		
		SPLK	#0000000000001000b,CANMDER 	
;			 	 ||||||||||||||||
;			 	 FEDCBA9876543210

;bit 0-5	enable mailbox 3 
;bit 7		0: mailbox 3 = transmit 

;**************************************************************************
;***********    Bit timing Registers configuration   **********************
;**************************************************************************
		
		SPLK	#0001000000000000b,CANMCR 	
;			 	 ||||||||||||||||
;			 	 FEDCBA9876543210

;bit 12		Change configuration request for write-access to BCR (CCR=1)

W_CCE	BIT		CANGSR,#0Bh	; Wait for Change config Enable
		BCND	W_CCE,NTC	; bit to be set in GSR
         
        ;SPLK	#0000000000000000b,CANBCR2     ; For 1 M bits/s @ 20 MHz CLKOUT
        SPLK	#0000000000000001b,CANBCR2     ; For 1 M bits/s @ 40 MHz CLKOUT
;			 	 ||||||||||||||||
;			     FEDCBA9876543210 

; bit 0-7	Baud rate prescaler	 
; bit 8-15	Reserved
	    
		SPLK	#0000000011111010b,CANBCR1     ; For 1 M bits/s @ 85 % samp. pt
;			 	 ||||||||||||||||
;			  	 FEDCBA9876543210  

; bit 0-2	TSEG2	 
; bit 3-6	TSEG1				
; bit 7		Sample point setting (1: 3 times, 0: once)
; bit 8-9	Synchronization jump width 	
; bit A-F	Reserved 

		SPLK	#0000000000000000b,CANMCR 	
;			  	 ||||||||||||||||
;			  	 FEDCBA9876543210 

;bit 12		Change conf register

W_NCCE	BIT		CANGSR,#0Bh	; Wait for Change config disable
		BCND	W_NCCE,TC

;**************************************************************************
;***********                      TRANSMIT                      **********
;**************************************************************************
		SPLK	#0020h,CANTCR	; Transmit request for MBX3           
			
W_TA	BIT		CANTCR,2	; Wait for transmission acknowledge
		BCND	W_TA,NTC
		SPLK	#2000h,CANTCR	; reset TA 

RX_LOOP:
W_RA	BIT		CANRCR,BIT7	; Wait for data from remote node
		BCND	W_RA,NTC	; to be written into MBX3

LOOP	B		LOOP	

GISR1:		
GISR2:		
GISR3:		
GISR4:		
GISR5:		
GISR6:		
PHANTOM RET		
		.end