📄 fw.lst
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C51 COMPILER V6.10 FW 12/02/2005 23:12:52 PAGE 1
C51 COMPILER V6.10, COMPILATION OF MODULE FW
OBJECT MODULE PLACED IN .\fw.OBJ
COMPILER INVOKED BY: e:\p\u\Keil\C51\BIN\C51.EXE .\fw.c DEBUG OBJECTEXTEND
stmt level source
1 //-----------------------------------------------------------------------------
2 // File: fw.c
3 // Contents: Firmware frameworks task dispatcher and device request parser
4 // source.
5 //
6 // $Revision: 1 $
7 // $Date: 07/05/05 5:33p $
8 //
9 // Copyright (c) 2005 Asia Science, Inc. All rights reserved
10 //-----------------------------------------------------------------------------
11 #include "fx2.h"
12 #include "fx2regs.h"
13
14 //-----------------------------------------------------------------------------
15 // Constants
16 //-----------------------------------------------------------------------------
17 #define DELAY_COUNT 0x9248*8L // Delay for 8 sec at 24Mhz, 4 sec at 48
18 #define _IFREQ 48000 // IFCLK constant for Synchronization Delay
19 #define _CFREQ 48000 // CLKOUT constant for Synchronization Delay
20
21 //-----------------------------------------------------------------------------
22 // Random Macros
23 //-----------------------------------------------------------------------------
24 #define min(a,b) (((a)<(b))?(a):(b))
25 #define max(a,b) (((a)>(b))?(a):(b))
26
27 // Registers which require a synchronization delay, see section 15.14
28 // FIFORESET FIFOPINPOLAR
29 // INPKTEND OUTPKTEND
30 // EPxBCH:L REVCTL
31 // GPIFTCB3 GPIFTCB2
32 // GPIFTCB1 GPIFTCB0
33 // EPxFIFOPFH:L EPxAUTOINLENH:L
34 // EPxFIFOCFG EPxGPIFFLGSEL
35 // PINFLAGSxx EPxFIFOIRQ
36 // EPxFIFOIE GPIFIRQ
37 // GPIFIE GPIFADRH:L
38 // UDMACRCH:L EPxGPIFTRIG
39 // GPIFTRIG
40
41 // Note: The pre-REVE EPxGPIFTCH/L register are affected, as well...
42 // ...these have been replaced by GPIFTC[B3:B0] registers
43
44 #include "fx2sdly.h" // Define _IFREQ and _CFREQ above this #include
45
46 //-----------------------------------------------------------------------------
47 // Global Variables
48 //-----------------------------------------------------------------------------
49 volatile BOOL GotSUD;
50 BOOL Rwuen;
51 BOOL Selfpwr;
52 volatile BOOL Sleep; // Sleep mode enable flag
53
54 WORD pDeviceDscr; // Pointer to Device Descriptor; Descriptors may be moved
55 WORD pDeviceQualDscr;
C51 COMPILER V6.10 FW 12/02/2005 23:12:52 PAGE 2
56 WORD pHighSpeedConfigDscr;
57 WORD pFullSpeedConfigDscr;
58 WORD pConfigDscr;
59 WORD pOtherConfigDscr;
60 WORD pStringDscr;
61
62 //-----------------------------------------------------------------------------
63 // Prototypes
64 //-----------------------------------------------------------------------------
65 void SetupCommand(void);
66 void TD_Init(void);
67 void TD_Poll(void);
68 BOOL TD_Suspend(void);
69 BOOL TD_Resume(void);
70
71 BOOL DR_GetDescriptor(void);
72 BOOL DR_SetConfiguration(void);
73 BOOL DR_GetConfiguration(void);
74 BOOL DR_SetInterface(void);
75 BOOL DR_GetInterface(void);
76 BOOL DR_GetStatus(void);
77 BOOL DR_ClearFeature(void);
78 BOOL DR_SetFeature(void);
79 BOOL DR_VendorCmnd(void);
80
81 void WRITE_DS1073();
82
83 // this table is used by the epcs macro
84 const char code EPCS_Offset_Lookup_Table[] =
85 {
86 0, // EP1OUT
87 1, // EP1IN
88 2, // EP2OUT
89 2, // EP2IN
90 3, // EP4OUT
91 3, // EP4IN
92 4, // EP6OUT
93 4, // EP6IN
94 5, // EP8OUT
95 5, // EP8IN
96 };
97
98 // macro for generating the address of an endpoint's control and status register (EPnCS)
99 #define epcs(EP) (EPCS_Offset_Lookup_Table[(EP & 0x7E) | (EP > 128)] + 0xE6A1)
100
101 //-----------------------------------------------------------------------------
102 // Code
103 //-----------------------------------------------------------------------------
104
105 // Task dispatcher
106 void main(void)
107 {
108 1 DWORD i;
109 1 WORD offset;
110 1 DWORD DevDescrLen;
111 1 DWORD j=0;
112 1 WORD IntDescrAddr;
113 1 WORD ExtDescrAddr;
114 1
115 1 // Initialize Global States
116 1 Sleep = FALSE; // Disable sleep mode
117 1 Rwuen = FALSE; // Disable remote wakeup
C51 COMPILER V6.10 FW 12/02/2005 23:12:52 PAGE 3
118 1 Selfpwr = FALSE; // Disable self powered
119 1 GotSUD = FALSE; // Clear "Got setup data" flag
120 1
121 1 // Initialize user device
122 1 TD_Init();
123 1
124 1 //CLKOUT output float
125 1 CPUCS &=0xfd;
126 1
127 1 //USB CONNECT, although not necessary
128 1 USBCS &= 0xf8;
129 1
130 1
131 1 //set PA0/INT0 pin serve as PORT function ,not INT function as OUTPUT
132 1 //PA1/INT1 the same
133 1 PORTACFG &= 0xfc;
134 1
135 1 //set PA0,PA1,PA3 as output.
136 1 OEA = OEA|0x0b;
137 1
138 1 //Reset PLD
139 1 IOA &=0xf7;
140 1
141 1 //set PA7/FLAGD/SLCS serve as FLAGD
142 1 PORTACFG |= 0x80;
143 1
144 1 //set PA3/WU2EN serve as PA3
145 1 WAKEUPCS &= 0xfd;
146 1
147 1 //set FD[15:0]/PD:PB serve as FD[15:0],not portD and PortB
148 1 //and PA2/SLOE serve as SLOE, PA4/FIFOADD0 serve as FIFOADR0
149 1 //and PA5/FIFOADD1 serve as FIFOADD1
150 1 //and PA6/PKTEND serve as PKTEND
151 1 //and PA7/FLAGD/SLCS serve as not only PA7
152 1 IFCONFIG |=0x03;
153 1
154 1 // set the slave FIFO interface to 48MHz,default is 12MHZ
155 1 // IFCONFIG |= 0x40;
156 1
157 1 //set the slave FIFO as sync mode
158 1 IFCONFIG &=0xf7;
159 1
160 1 //Enable IFCLK output
161 1 IFCONFIG |=0x20;
162 1
163 1 //INVert polarity
164 1 IFCONFIG |=0x10;
165 1
166 1 //set IFCLK as internal source
167 1 IFCONFIG |=0x80;
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