📄 lpc177x_8x_i2c.c
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if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max)
{
// update status
TransferCfg->status = CodeStatus;
goto error;
}
else
{
goto retry;
}
}
}
else
{
// Do not issue an ACK signal
CodeStatus = I2C_GetByte(I2Cx, &tmp, 0);
if (CodeStatus != I2C_I2STAT_M_RX_DAT_NACK)
{
TransferCfg->retransmissions_count++;
if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max)
{
// update status
TransferCfg->status = CodeStatus;
goto error;
}
else
{
goto retry;
}
}
}
*rxdat++ = tmp;
TransferCfg->rx_count++;
}
}
/* Send STOP condition ------------------------------------------------- */
I2C_Stop(I2Cx);
return SUCCESS;
error:
// Send stop condition
I2C_Stop(I2Cx);
return ERROR;
}
else if (Opt == I2C_TRANSFER_INTERRUPT)
{
// Setup tx_rx data, callback and interrupt handler
i2cdat[i2cId].txrx_setup = (uint32_t) TransferCfg;
// Set direction phase, write first
i2cdat[i2cId].dir = 0;
/* First Start condition -------------------------------------------------------------- */
I2Cx->CONCLR = I2C_I2CONCLR_SIC;
I2Cx->CONSET = I2C_I2CONSET_STA;
I2C_IntCmd(i2cId, 1);
return (SUCCESS);
}
return ERROR;
}
/*********************************************************************//**
* @brief Receive and Transmit data in slave mode
* @param[in] I2Cx I2C peripheral selected, should be
* - LPC_I2C0
* - LPC_I2C1
* - LPC_I2C2
* @param[in] TransferCfg Pointer to a I2C_S_SETUP_Type structure that
* contains specified information about the
* configuration for master transfer.
* @param[in] Opt I2C_TRANSFER_OPT_Type type that selected for
* interrupt or polling mode.
* @return SUCCESS or ERROR
*
* Note:
* The mode of slave's operation depends on the command sent from master on
* the I2C bus. If the master send a SLA+W command, this sub-routine will
* use receive data length and receive data pointer. If the master send a SLA+R
* command, this sub-routine will use transmit data length and transmit data
* pointer.
* If the master issue an repeat start command or a stop command, the slave will
* enable an time out condition, during time out condition, if there's no activity
* on I2C bus, the slave will exit, otherwise (i.e. the master send a SLA+R/W),
* the slave then switch to relevant operation mode. The time out should be used
* because the return status code can not show difference from stop and repeat
* start command in slave operation.
* In case of the expected data length from master is greater than data length
* that slave can support:
* - In case of reading operation (from master): slave will return I2C_I2DAT_IDLE_CHAR
* value.
* - In case of writing operation (from master): slave will ignore remain data from master.
**********************************************************************/
Status I2C_SlaveTransferData(uint8_t i2cId, I2C_S_SETUP_Type *TransferCfg,
I2C_TRANSFER_OPT_Type Opt)
{
LPC_I2C_TypeDef* I2Cx = I2C_GetPointer(i2cId);
uint8_t *txdat;
uint8_t *rxdat;
uint32_t CodeStatus;
uint32_t timeout;
int32_t time_en;
// reset all default state
txdat = (uint8_t *) TransferCfg->tx_data;
rxdat = (uint8_t *) TransferCfg->rx_data;
// Reset I2C setup value to default state
TransferCfg->tx_count = 0;
TransferCfg->rx_count = 0;
TransferCfg->status = 0;
// Polling option
if (Opt == I2C_TRANSFER_POLLING)
{
/* Set AA bit to ACK command on I2C bus */
I2Cx->CONSET = I2C_I2CONSET_AA;
/* Clear SI bit to be ready ... */
I2Cx->CONCLR = (I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC);
time_en = 0;
timeout = 0;
while (1)
{
/* Check SI flag ready */
if (I2Cx->CONSET & I2C_I2CONSET_SI)
{
time_en = 0;
switch (CodeStatus = (I2Cx->STAT & I2C_STAT_CODE_BITMASK))
{
/* No status information */
case I2C_I2STAT_NO_INF:
I2Cx->CONSET = I2C_I2CONSET_AA;
I2Cx->CONCLR = I2C_I2CONCLR_SIC;
break;
/* Reading phase -------------------------------------------------------- */
/* Own SLA+R has been received, ACK has been returned */
case I2C_I2STAT_S_RX_SLAW_ACK:
/* General call address has been received, ACK has been returned */
case I2C_I2STAT_S_RX_GENCALL_ACK:
I2Cx->CONSET = I2C_I2CONSET_AA;
I2Cx->CONCLR = I2C_I2CONCLR_SIC;
break;
/* Previously addressed with own SLA;
* DATA byte has been received;
* ACK has been returned */
case I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK:
/* DATA has been received, ACK hasn been return */
case I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK:
/*
* All data bytes that over-flow the specified receive
* data length, just ignore them.
*/
if ((TransferCfg->rx_count < TransferCfg->rx_length) && (TransferCfg->rx_data != NULL))
{
*rxdat++ = (uint8_t)I2Cx->DAT;
TransferCfg->rx_count++;
}
I2Cx->CONSET = I2C_I2CONSET_AA;
I2Cx->CONCLR = I2C_I2CONCLR_SIC;
break;
/* Previously addressed with own SLA;
* DATA byte has been received;
* NOT ACK has been returned */
case I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK:
/* DATA has been received, NOT ACK has been returned */
case I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK:
I2Cx->CONCLR = I2C_I2CONCLR_SIC;
break;
/*
* Note that: Return code only let us know a stop condition mixed
* with a repeat start condition in the same code value.
* So we should provide a time-out. In case this is really a stop
* condition, this will return back after time out condition. Otherwise,
* next session that is slave receive data will be completed.
*/
/* A Stop or a repeat start condition */
case I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX:
I2Cx->CONCLR = I2C_I2CONCLR_SIC;
// enable time out
time_en = 1;
timeout = 0;
break;
/* Writing phase -------------------------------------------------------- */
/* Own SLA+R has been received, ACK has been returned */
case I2C_I2STAT_S_TX_SLAR_ACK:
/* Data has been transmitted, ACK has been received */
case I2C_I2STAT_S_TX_DAT_ACK:
/*
* All data bytes that over-flow the specified receive
* data length, just ignore them.
*/
if ((TransferCfg->tx_count < TransferCfg->tx_length) && (TransferCfg->tx_data != NULL))
{
I2Cx->DAT = *txdat++;
TransferCfg->tx_count++;
}
I2Cx->CONSET = I2C_I2CONSET_AA;
I2Cx->CONCLR = I2C_I2CONCLR_SIC;
break;
/* Data has been transmitted, NACK has been received,
* that means there's no more data to send, exit now */
/*
* Note: Don't wait for stop event since in slave transmit mode,
* since there no proof lets us know when a stop signal has been received
* on slave side.
*/
case I2C_I2STAT_S_TX_DAT_NACK:
I2Cx->CONSET = I2C_I2CONSET_AA;
I2Cx->CONCLR = I2C_I2CONCLR_SIC;
// enable time out
time_en = 1;
timeout = 0;
break;
// Other status must be captured
default:
I2Cx->CONCLR = I2C_I2CONCLR_SIC;
goto s_error;
}
}
else if (time_en)
{
if (timeout++ > I2C_SLAVE_TIME_OUT)
{
// it's really a stop condition, goto end stage
goto s_end_stage;
}
}
}
s_end_stage:
/* Clear AA bit to disable ACK on I2C bus */
I2Cx->CONCLR = I2C_I2CONCLR_AAC;
// Check if there's no error during operation
// Update status
TransferCfg->status = CodeStatus | I2C_SETUP_STATUS_DONE;
return SUCCESS;
s_error:
/* Clear AA bit to disable ACK on I2C bus */
I2Cx->CONCLR = I2C_I2CONCLR_AAC;
// Update status
TransferCfg->status = CodeStatus;
return ERROR;
}
else if (Opt == I2C_TRANSFER_INTERRUPT)
{
// Setup tx_rx data, callback and interrupt handler
i2cdat[i2cId].txrx_setup = (uint32_t) TransferCfg;
// Set direction phase, read first
i2cdat[i2cId].dir = 1;
// Enable AA
I2Cx->CONSET = I2C_I2CONSET_AA;
I2Cx->CONCLR = I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC;
I2C_IntCmd(i2cId, 1);
return (SUCCESS);
}
return ERROR;
}
/*********************************************************************//**
* @brief Set Own slave address in I2C peripheral corresponding to
* parameter specified in OwnSlaveAddrConfigStruct.
* @param[in] I2Cx I2C peripheral selected, should be
* - LPC_I2C0
* - LPC_I2C1
* - LPC_I2C2
* @param[in] OwnSlaveAddrConfigStruct Pointer to a I2C_OWNSLAVEADDR_CFG_Type
* structure that contains the configuration information for the
* specified I2C slave address.
* @return None
**********************************************************************/
void I2C_SetOwnSlaveAddr(uint8_t i2cId, I2C_OWNSLAVEADDR_CFG_Type *OwnSlaveAddrConfigStruct)
{
LPC_I2C_TypeDef* I2Cx = I2C_GetPointer(i2cId);
uint32_t tmp;
tmp = (((uint32_t)(OwnSlaveAddrConfigStruct->SlaveAddr_7bit << 1)) \
| ((OwnSlaveAddrConfigStruct->GeneralCallState == ENABLE) ? 0x01 : 0x00))& I2C_I2ADR_BITMASK;
switch (OwnSlaveAddrConfigStruct->SlaveAddrChannel)
{
case 0:
I2Cx->ADR0 = tmp;
I2Cx->MASK0 = I2C_I2MASK_MASK((uint32_t) \
(OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
break;
case 1:
I2Cx->ADR1 = tmp;
I2Cx->MASK1 = I2C_I2MASK_MASK((uint32_t) \
(OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
break;
case 2:
I2Cx->ADR2 = tmp;
I2Cx->MASK2 = I2C_I2MASK_MASK((uint32_t) \
(OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
break;
case 3:
I2Cx->ADR3 = tmp;
I2Cx->MASK3 = I2C_I2MASK_MASK((uint32_t) \
(OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
break;
}
}
/*********************************************************************//**
* @brief Configures functionality in I2C monitor mode
* @param[in] I2Cx I2C peripheral selected, should be
* - LPC_I2C0
* - LPC_I2C1
* - LPC_I2C2
* @param[in] MonitorCfgType Monitor Configuration type, should be:
* - I2C_MONITOR_CFG_SCL_OUTPUT: I2C module can 'stretch'
* the clock line (hold it low) until it has had time to
* respond to an I2C interrupt.
* - I2C_MONITOR_CFG_MATCHALL: When this bit is set to '1'
* and the I2C is in monitor mode, an interrupt will be
* generated on ANY address received.
* @param[in] NewState New State of this function, should be:
* - ENABLE: Enable this function.
* - DISABLE: Disable this function.
* @return None
**********************************************************************/
void I2C_MonitorModeConfig(uint8_t i2cId, uint32_t MonitorCfgType, FunctionalState NewState)
{
LPC_I2C_TypeDef* I2Cx = I2C_GetPointer(i2cId);
if (NewState == ENABLE)
{
I2Cx->MMCTRL |= MonitorCfgType;
}
else
{
I2Cx->MMCTRL &= (~MonitorCfgType) & I2C_I2MMCTRL_BITMASK;
}
}
/*********************************************************************//**
* @brief Enable/Disable I2C monitor mode
* @param[in] I2Cx I2C peripheral selected, should be
* - LPC_I2C0
* - LPC_I2C1
* - LPC_I2C2
* @param[in] NewState New State of this function, should be:
* - ENABLE: Enable monitor mode.
* - DISABLE: Disable monitor mode.
* @return None
**********************************************************************/
void I2C_MonitorModeCmd(uint8_t i2cId, FunctionalState NewState)
{
LPC_I2C_TypeDef* I2Cx = I2C_GetPointer(i2cId);
if (NewState == ENABLE)
{
I2Cx->MMCTRL |= I2C_I2MMCTRL_MM_ENA;
I2Cx->CONSET = I2C_I2CONSET_AA;
I2Cx->CONCLR = I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC;
}
else
{
I2Cx->MMCTRL &= (~I2C_I2MMCTRL_MM_ENA) & I2C_I2MMCTRL_BITMASK;
I2Cx->CONCLR = I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC | I2C_I2CONCLR_AAC;
}
I2C_MonitorBufferIndex = 0;
}
/*********************************************************************//**
* @brief Get data from I2C data buffer in monitor mode.
* @param[in] I2Cx I2C peripheral selected, should be
* - LPC_I2C0
* - LPC_I2C1
* - LPC_I2C2
* @return None
* Note: In monitor mode, the I2C module may lose the ability to stretch
* the clock (stall the bus) if the ENA_SCL bit is not set. This means that
* the processor will have a limited amount of time to read the contents of
* the data received on the bus. If the processor reads the DAT shift
* register, as it ordinarily would, it could have only one bit-time to
* respond to the interrupt before the received data is overwritten by
* new data.
**********************************************************************/
uint8_t I2C_MonitorGetDatabuffer(uint8_t i2cId)
{
LPC_I2C_TypeDef* I2Cx = I2C_GetPointer(i2cId);
return ((uint8_t)(I2Cx->DATA_BUFFER));
}
/*********************************************************************//**
* @brief Get data from I2C data buffer in monitor mode.
* @param[in] I2Cx I2C peripheral selected, should be
* - LPC_I2C0
* - LPC_I2C1
* - LPC_I2C2
* @return None
* Note: In monitor mode, the I2C module may lose the ability to stretch
* the clock (stall the bus) if the ENA_SCL bit is not set. This means that
* the processor will have a limited amount of time to read the contents of
* the data received on the bus. If the processor reads the DAT shift
* register, as it ordinarily would, it could have only one bit-time to
* respond to the interrupt before the received data is overwritten by
* new data.
**********************************************************************/
BOOL_8 I2C_MonitorHandler(uint8_t i2cId, uint8_t *buffer, uint32_t size)
{
LPC_I2C_TypeDef* I2Cx = I2C_GetPointer(i2cId);
BOOL_8 ret=FALSE;
I2Cx->CONCLR = I2C_I2CONCLR_SIC;
buffer[I2C_MonitorBufferIndex] = (uint8_t)(I2Cx->DATA_BUFFER);
I2C_MonitorBufferIndex++;
if(I2C_MonitorBufferIndex >= size)
{
ret = TRUE;
}
return ret;
}
/*********************************************************************//**
* @brief Get status of Master Transfer
* @param[in] I2Cx I2C peripheral selected, should be:
* - LPC_I2C0
* - LPC_I2C1
* - LPC_I2C2
* @return Master transfer status, could be:
* - TRUE master transfer completed
* - FALSE master transfer have not completed yet
**********************************************************************/
uint32_t I2C_MasterTransferComplete(uint8_t i2cId)
{
uint32_t retval;
retval = I2C_MasterComplete[i2cId];
I2C_MasterComplete[i2cId] = FALSE;
return retval;
}
/*********************************************************************//**
* @brief Get status of Slave Transfer
* @param[in] I2Cx I2C peripheral selected, should be:
* - LPC_I2C0
* - LPC_I2C1
* - LPC_I2C2
* @return Complete status, could be: TRUE/FALSE
**********************************************************************/
uint32_t I2C_SlaveTransferComplete(uint8_t i2cId)
{
uint32_t retval;
retval = I2C_SlaveComplete[i2cId];
I2C_SlaveComplete[i2cId] = FALSE;
return retval;
}
/**
* @}
*/
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */
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