lpc177x_8x_can.h

LPC1788的USBHOST的FATFS移植

/**********************************************************************
* $Id$		lpc177x_8x_can.h			2011-06-02
*//**
* @file		lpc177x_8x_can.h
* @brief	Contains all macro definitions and function prototypes
*			support for CAN firmware library on LPC177x_8x
* @version	1.0
* @date		02. June. 2011
* @author	NXP MCU SW Application Team
* 
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/

/* Peripheral group ----------------------------------------------------------- */
/** @defgroup CAN CAN (Controller Area Network)
 * @ingroup LPC177x_8xCMSIS_FwLib_Drivers
 * @{
 */

#ifndef __LPC177X_8X_CAN_H_
#define __LPC177X_8X_CAN_H_

/* Includes ------------------------------------------------------------------- */
#include "LPC177x_8x.h"

#include "lpc_types.h"

#ifdef __cplusplus
extern "C"
{
#endif

/* Public Types --------------------------------------------------------------- */
/** @defgroup CAN_Public_Macros CAN Public Macros
 * @{
 */

/** Controller ID for CAN1 */
#define CAN1_CTRL				((uint8_t)(0))

/** Controller ID for CAN2 */
#define CAN2_CTRL				((uint8_t)(1))

/** Message(s) Acceptance is enabled */
#define MSG_ENABLE				((uint8_t)(0))

/** Message(s) Acceptance is disabled */
#define MSG_DISABLE				((uint8_t)(1))


/**
 * @}
 */

/* Private Macros ------------------------------------------------------------- */
/** @defgroup CAN_Private_Macros CAN Private Macros
 * @{
 */

/* --------------------- BIT DEFINITIONS -------------------------------------- */
/*********************************************************************//**
 * Macro defines for CAN Mode Register
 **********************************************************************/
/** CAN Reset mode */
#define CAN_MOD_RM			((uint32_t)(1<<0))

/** CAN Listen Only Mode */
#define CAN_MOD_LOM			((uint32_t)(1<<1))

/** CAN Self Test mode */
#define CAN_MOD_STM			((uint32_t)(1<<2))

/** CAN Transmit Priority mode */
#define CAN_MOD_TPM			((uint32_t)(1<<3))

/** CAN Sleep mode */
#define CAN_MOD_SM			((uint32_t)(1<<4))

/** CAN Receive Polarity mode */
#define CAN_MOD_RPM			((uint32_t)(1<<5))

/** CAN Test mode */
#define CAN_MOD_TM			((uint32_t)(1<<7))

/*********************************************************************//**
 * Macro defines for CAN Command Register
 **********************************************************************/
/** CAN Transmission Request */
#define CAN_CMR_TR			((uint32_t)(1))

/** CAN Abort Transmission */
#define CAN_CMR_AT			((uint32_t)(1<<1))

/** CAN Release Receive Buffer */
#define CAN_CMR_RRB			((uint32_t)(1<<2))

/** CAN Clear Data Overrun */
#define CAN_CMR_CDO			((uint32_t)(1<<3))

/** CAN Self Reception Request */
#define CAN_CMR_SRR			((uint32_t)(1<<4))

/** CAN Select Tx Buffer 1 */
#define CAN_CMR_STB1		((uint32_t)(1<<5))

/** CAN Select Tx Buffer 2 */
#define CAN_CMR_STB2		((uint32_t)(1<<6))

/** CAN Select Tx Buffer 3 */
#define CAN_CMR_STB3		((uint32_t)(1<<7))

/*********************************************************************//**
 * Macro defines for CAN Global Status Register
 **********************************************************************/
/** CAN Receive Buffer Status */
#define CAN_GSR_RBS			((uint32_t)(1))

/** CAN Data Overrun Status */
#define CAN_GSR_DOS			((uint32_t)(1<<1))

/** CAN Transmit Buffer Status */
#define CAN_GSR_TBS			((uint32_t)(1<<2))

/** CAN Transmit Complete Status */
#define CAN_GSR_TCS			((uint32_t)(1<<3))

/** CAN Receive Status */
#define CAN_GSR_RS			((uint32_t)(1<<4))

/** CAN Transmit Status */
#define CAN_GSR_TS			((uint32_t)(1<<5))

/** CAN Error Status */
#define CAN_GSR_ES			((uint32_t)(1<<6))

/** CAN Bus Status */
#define CAN_GSR_BS			((uint32_t)(1<<7))

/** CAN Current value of the Rx Error Counter */
#define CAN_GSR_RXERR(n)	((uint32_t)((n&0xFF)<<16))

/** CAN Current value of the Tx Error Counter */
#define CAN_GSR_TXERR(n)	((uint32_t)(n&0xFF)<<24))

/*********************************************************************//**
 * Macro defines for CAN Interrupt and Capture Register
 **********************************************************************/
/** CAN Receive Interrupt */
#define CAN_ICR_RI			((uint32_t)(1))

/** CAN Transmit Interrupt 1 */
#define CAN_ICR_TI1			((uint32_t)(1<<1))

/** CAN Error Warning Interrupt */
#define CAN_ICR_EI			((uint32_t)(1<<2))

/** CAN Data Overrun Interrupt */
#define CAN_ICR_DOI			((uint32_t)(1<<3))

/** CAN Wake-Up Interrupt */
#define CAN_ICR_WUI			((uint32_t)(1<<4))

/** CAN Error Passive Interrupt */
#define CAN_ICR_EPI			((uint32_t)(1<<5))

/** CAN Arbitration Lost Interrupt */
#define CAN_ICR_ALI			((uint32_t)(1<<6))

/** CAN Bus Error Interrupt */
#define CAN_ICR_BEI			((uint32_t)(1<<7))

/** CAN ID Ready Interrupt */
#define CAN_ICR_IDI			((uint32_t)(1<<8))

/** CAN Transmit Interrupt 2 */
#define CAN_ICR_TI2			((uint32_t)(1<<9))

/** CAN Transmit Interrupt 3 */
#define CAN_ICR_TI3			((uint32_t)(1<<10))

/** CAN Error Code Capture */
#define CAN_ICR_ERRBIT(n)	((uint32_t)((n&0x1F)<<16))

/** CAN Error Direction */
#define CAN_ICR_ERRDIR		((uint32_t)(1<<21))

/** CAN Error Capture */
#define CAN_ICR_ERRC(n)		((uint32_t)((n&0x3)<<22))

/** CAN Arbitration Lost Capture */
#define CAN_ICR_ALCBIT(n)		((uint32_t)((n&0xFF)<<24))

/*********************************************************************//**
 * Macro defines for CAN Interrupt Enable Register
 **********************************************************************/
/** CAN Receive Interrupt Enable */
#define CAN_IER_RIE			((uint32_t)(1))

/** CAN Transmit Interrupt Enable for buffer 1 */
#define CAN_IER_TIE1		((uint32_t)(1<<1))

/** CAN Error Warning Interrupt Enable */
#define CAN_IER_EIE			((uint32_t)(1<<2))

/** CAN Data Overrun Interrupt Enable */
#define CAN_IER_DOIE		((uint32_t)(1<<3))

/** CAN Wake-Up Interrupt Enable */
#define CAN_IER_WUIE		((uint32_t)(1<<4))

/** CAN Error Passive Interrupt Enable */
#define CAN_IER_EPIE		((uint32_t)(1<<5))

/** CAN Arbitration Lost Interrupt Enable */
#define CAN_IER_ALIE		((uint32_t)(1<<6))

/** CAN Bus Error Interrupt Enable */
#define CAN_IER_BEIE		((uint32_t)(1<<7))

/** CAN ID Ready Interrupt Enable */
#define CAN_IER_IDIE		((uint32_t)(1<<8))

/** CAN Transmit Enable Interrupt for Buffer 2 */
#define CAN_IER_TIE2		((uint32_t)(1<<9))

/** CAN Transmit Enable Interrupt for Buffer 3 */
#define CAN_IER_TIE3		((uint32_t)(1<<10))

/*********************************************************************//**
 * Macro defines for CAN Bus Timing Register
 **********************************************************************/
/** CAN Baudrate Prescaler */
#define CAN_BTR_BRP(n)		((uint32_t)(n&0x3FF))

/** CAN Synchronization Jump Width */
#define CAN_BTR_SJM(n)		((uint32_t)((n&0x3)<<14))

/** CAN Time Segment 1 */
#define CAN_BTR_TESG1(n)	((uint32_t)(n&0xF)<<16))

/** CAN Time Segment 2 */
#define CAN_BTR_TESG2(n)	((uint32_t)(n&0xF)<<20))

/** CAN Sampling */
#define CAN_BTR_SAM(n)		((uint32_t)(1<<23))

/*********************************************************************//**
 * Macro defines for CAN Error Warning Limit Register
 **********************************************************************/
/** CAN Error Warning Limit */
#define CAN_EWL_EWL(n)		((uint32_t)(n&0xFF))

/*********************************************************************//**
 * Macro defines for CAN Status Register
 **********************************************************************/
/** CAN Receive Buffer Status */
#define CAN_SR_RBS		((uint32_t)(1))

/** CAN Data Overrun Status */
#define CAN_SR_DOS		((uint32_t)(1<<1))

/** CAN Transmit Buffer Status 1 */
#define CAN_SR_TBS1		((uint32_t)(1<<2))

/** CAN Transmission Complete Status of Buffer 1 */
#define CAN_SR_TCS1		((uint32_t)(1<<3))

/** CAN Receive Status */
#define CAN_SR_RS		((uint32_t)(1<<4))

/** CAN Transmit Status 1 */
#define CAN_SR_TS1		((uint32_t)(1<<5))

/** CAN Error Status */
#define CAN_SR_ES		((uint32_t)(1<<6))

/** CAN Bus Status */
#define CAN_SR_BS		((uint32_t)(1<<7))

/** CAN Transmit Buffer Status 2 */
#define CAN_SR_TBS2		((uint32_t)(1<<10))

/** CAN Transmission Complete Status of Buffer 2 */
#define CAN_SR_TCS2		((uint32_t)(1<<11))

/** CAN Transmit Status 2 */
#define CAN_SR_TS2		((uint32_t)(1<<13))

/** CAN Transmit Buffer Status 2 */
#define CAN_SR_TBS3		((uint32_t)(1<<18))

/** CAN Transmission Complete Status of Buffer 2 */
#define CAN_SR_TCS3		((uint32_t)(1<<19))

/** CAN Transmit Status 2 */
#define CAN_SR_TS3		((uint32_t)(1<<21))

/*********************************************************************//**
 * Macro defines for CAN Receive Frame Status Register
 **********************************************************************/
/** CAN ID Index */
#define CAN_RFS_ID_INDEX(n)	((uint32_t)(n&0x3FF))

/** CAN Bypass */
#define CAN_RFS_BP			((uint32_t)(1<<10))

/** CAN Data Length Code */
#define CAN_RFS_DLC(n)		((uint32_t)((n&0xF)<<16)

/** CAN Remote Transmission Request */
#define CAN_RFS_RTR			((uint32_t)(1<<30))

/** CAN control 11 bit or 29 bit Identifier */
#define CAN_RFS_FF			((uint32_t)(1<<31))

/*********************************************************************//**
 * Macro defines for CAN Receive Identifier Register
 **********************************************************************/
/** CAN 11 bit Identifier */
#define CAN_RID_ID_11(n)		((uint32_t)(n&0x7FF))

/** CAN 29 bit Identifier */
#define CAN_RID_ID_29(n)		((uint32_t)(n&0x1FFFFFFF))