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📄 sys.lst

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##############################################################################
#                                                                            #
# IAR M16C/60 C-Compiler V1.31B/WIN                                          #
#                                                                            #
#       Compile time  =  10/Apr/2000  22:46:15                               #
#       Memory model  =  near                                                #
#       Source file   =  d:\tolentino\sw_lcd_m16c\mini_emul\sys.c            #
#       List file     =  d:\tolentino\sw_lcd_m16c\mini_emul\ice\list\sys.lst #
#       Object file   =  d:\tolentino\sw_lcd_m16c\mini_emul\ice\obj\sys.r34  #
#       Command line  =  -md -OD:\tolentino\Sw_lcd_M16c\Mini_emul\ice\Obj\   #
#                        -e -K -C -W16 -gA -RCODE -r0                        #
#                        -LD:\tolentino\Sw_lcd_M16c\Mini_emul\ice\List\ -q   #
#                        -t8 -ID:\SW\EW23\M16C\inc\                          #
#                        D:\tolentino\Sw_lcd_M16c\Mini_emul\sys.c            #
#                                                                            #
#                           Copyright 1999 IAR Systems. All rights reserved. #
##############################################################################

   \                     	NAME	sys(16)
   \                     	RSEG	CODE(1)
   \                     	PUBLIC	port9_set
   \                     	PUBLIC	processor_mode_set
   \                     	PUBLIC	protection_clr_port9
   \                     	PUBLIC	protection_clr_processor_mode
   \                     	PUBLIC	protection_clr_system_clock
   \                     	PUBLIC	protection_set_port9
   \                     	PUBLIC	protection_set_processor_mode
   \                     	PUBLIC	protection_set_system_clock
   \                     	PUBLIC	software_reset
   \                     	PUBLIC	stop_mode
   \                     	PUBLIC	system_clock_low_power
   \                     	PUBLIC	system_clock_set
   \                     	PUBLIC	watchdog
   \                     	EXTERN	?CLM16C_1_31_L00
   \                     	RSEG	CODE
   \                     protection_set_system_clock:
      1          /**************************************************************************/
      2          /**MITSUBISHI**MITSUBISHI**MITSUBISHI**MITSUBISHI**MITSUBISHI**MITSUBISHI**/
      3          /**************************************************************************/
      4          /**************************************************************************/
      5          /*  DISCLAIMER:                                                           */
      6          /*  We (MITSUBISHI ELECTRIC B.V.) do not warrant that the Software is     */
      7          /*  free from claims by a third party of copyright, patent, trademark,    */
      8          /*  trade secret or any other intellectual property infringement.         */
      9          /*                                                                        */
     10          /*  Under no circumstances are we liable for any of the following:        */
     11          /*                                                                        */
     12          /*  1. third-party claims against you for losses or damages;              */
     13          /*  2. loss of, or damage to, your records or data; or                    */
     14          /*  3. economic consequential damages (including lost profits or          */
     15          /*     savings) or incidental damages, even if we are informed of         */
     16          /*     their possibility.                                                 */
     17          /*                                                                        */
     18          /*  We do not warrant uninterrupted or error free operation of the        */
     19          /*  Software. We have no obligation to provide service, defect            */
     20          /*  correction, or any maintenance for the Software. We have no           */
     21          /*  obligation to supply any Software updates or enhancements to you      */
     22          /*  even if such are or later become available.                           */
     23          /*                                                                        */
     24          /*  IF YOU DOWNLOAD OR USE THIS SOFTWARE YOU AGREE TO THESE TERMS.        */
     25          /*                                                                        */
     26          /*  THERE ARE NO WARRANTIES, EXPRESS OR IMPLIED, INCLUDING THE            */
     27          /*  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A               */
     28          /*  PARTICULAR PURPOSE.                                                   */
     29          /**************************************************************************/
     30          /**************************************************************************/
     31          /*                                                                        */
     32          /*       System Initialization and Service-Routines for the M3060         */
     33          /*                                                                        */
     34          /*       Name         :      SYS.C                                        */
     35          /*       Date/Author  :      29.04.1997/GA                                */
     36          /*       Change       :                                                   */
     37          /*               (Date)  (Author)  (Description)                          */
     38          /*                                                                        */
     39          /**************************************************************************/
     40          
     41          #define public extern
     42          #include    "sfr_3061.h"
     43          #undef public
     44          
     45          #define public 
     46          #include    "sys.h"
     47          #undef public
     48          
     49          
     50          /**************************************************************************/
     51          /*                                                                        */
     52          /*       Protection - system clock control register write inhibite        */
     53          /*                                                                        */
     54          /*       Name         :     protection_set_system_clock                   */
     55          /*       Date/Author  :     02.05.1997/GA                                 */
     56          /*       Parameter    :                                                   */
     57          /*       Return       :                                                   */
     58          /*                                                                        */
     59          /**************************************************************************/
     60          void near protection_set_system_clock (void)
     61          {   
     62              PRCR &= ~0x01;          // ---- ---0
   \   000000   97FE0A00             AND.B   #254,10
     63                                      //         +- Inhibite write to system clock
     64                                      //            control registers 0 and 1    
     65                                      //            0: Write inhibited
     66                                      //            1: Write enabled
     67          }
   \   000004   F3                   RTS     
   \                     protection_clr_system_clock:
     68          
     69          /**************************************************************************/
     70          /*                                                                        */
     71          /*       Protection - system clock control register write enable          */
     72          /*                                                                        */
     73          /*       Name         :     protection_clr_system_clock                   */
     74          /*       Date/Author  :     02.05.1997/GA                                 */
     75          /*       Parameter    :                                                   */
     76          /*       Return       :                                                   */
     77          /*                                                                        */
     78          /**************************************************************************/
     79          void near protection_clr_system_clock (void)
     80          {   
     81              PRCR |= 0x01;           // ---- ---1
   \   000005   9F010A00             OR.B    #1,10
     82                                      //         +- Enable write to system clock
     83                                      //            control registers 0 and 1    
     84                                      //            0: Write inhibited
     85                                      //            1: Write enabled
     86          }
   \   000009   F3                   RTS     
   \                     protection_set_processor_mode:
     87          
     88          /**************************************************************************/
     89          /*                                                                        */
     90          /*       Protection - processor mode register write inhibite              */
     91          /*                                                                        */
     92          /*       Name         :     protection_set_processor_mode                 */
     93          /*       Date/Author  :     29.04.1997/GA                                 */
     94          /*       Parameter    :                                                   */
     95          /*       Return       :                                                   */
     96          /*                                                                        */
     97          /**************************************************************************/
     98          void near protection_set_processor_mode (void)
     99          {   
    100              PRCR &= ~0x02;          // ---- --0-
   \   00000A   97FD0A00             AND.B   #253,10
    101                                      //        +-- Inhibite write to processor mode
    102                                      //            registers 0 and 1    
    103                                      //            0: Write inhibited
    104                                      //            1: Write enabled
    105          }
   \   00000E   F3                   RTS     
   \                     protection_clr_processor_mode:
    106          
    107          /**************************************************************************/
    108          /*                                                                        */
    109          /*       Protection - system clock control register write enable          */
    110          /*                                                                        */
    111          /*       Name         :     protection_clr_processor_mode                 */
    112          /*       Date/Author  :     29.04.1997/GA                                 */
    113          /*       Parameter    :                                                   */
    114          /*       Return       :                                                   */
    115          /*                                                                        */
    116          /**************************************************************************/
    117          void near protection_clr_processor_mode (void)
    118          {   
    119              PRCR |= 0x02;           // ---- --1-
   \   00000F   9F020A00             OR.B    #2,10
    120                                      //        +-- Enable write to processor mode     
    121                                      //            registers 0 and 1    
    122                                      //            0: Write inhibited
    123                                      //            1: Write enabled
    124          }
   \   000013   F3                   RTS     
   \                     protection_set_port9:
    125          
    126          /**************************************************************************/
    127          /*                                                                        */
    128          /*       Protection - Port9 direction register write inhibite             */
    129          /*                                                                        */
    130          /*       Name         :     protection_set_system_clock                   */
    131          /*       Date/Author  :     02.05.1997/GA                                 */
    132          /*       Parameter    :                                                   */
    133          /*       Return       :                                                   */
    134          /*                                                                        */
    135          /**************************************************************************/
    136          void near protection_set_port9 (void)
    137          {   

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