extra.s

coldfire5307的bootloader 将程序写入flash

IMMaddr:	equ	0x10000000
SDRAMaddr:	equ	0x00000000
SDRAMsize:	equ	0x00800000	;;8M
SRAMaddr:	equ	0x00800000
SRAMsize:	equ	(4 * 1024)	;;4K
_VECTOR_TABLE	equ	0x00000000
PADAT		EQU	IMMaddr+0x248






;// Setup Uart1 interrupt: Level 6, autovector
;// Set the vector in vector table

                SECTION .text
	        XDEF	_Load_Vect
	       .align 0x10
_Load_Vect:     MOVEA.L #0,A0                       ;level 5  Pointer to the vector table
                MOVE.L  #0x1d,D0                    ; vector number is #0x1d  ,offset is 0x78
                LSL.L   #2,D0                       ; Adjust for the vector size
                ADDA.L  D0,A0                       ; Add in offset to vector base
	        MOVE.L  #_INT_Uart1_Interrupt, D0
	        MOVE.L  D0,(A0)
	        
	        MOVEA.L #0,A0                       ;level 3  Pointer to the vector table
                MOVE.L  #0x1b,D0                    ; vector number is #0x1b  ,offset is 0x6c
                LSL.L   #2,D0                       ; Adjust for the vector size
                ADDA.L  D0,A0                       ; Add in offset to vector base
	        MOVE.L  #_INT_Mbus_Interrupt, D0
	        MOVE.L  D0,(A0)
	        
	        MOVEA.L #0,A0                       ;leval 7 Pointer to the vector table
                MOVE.L  #0x1f,D0                    ; vector number is #0x1f  ,offset is 0x6c
                LSL.L   #2,D0                       ; Adjust for the vector size
                ADDA.L  D0,A0                       ; Add in offset to vector base
	        MOVE.L  #_INT__Interrupt_Level7, D0
	        MOVE.L  D0,(A0)
	        
	         
	        MOVEA.L #0,A0                       ; leval 6 Pointer to the vector table
                MOVE.L  #0x1e,D0                    ; vector number is #0x1e  ,offset is 0x6c
                LSL.L   #2,D0                       ; Adjust for the vector size
                ADDA.L  D0,A0                       ; Add in offset to vector base
	        MOVE.L  #_INT__Interrupt_Level6, D0
	        MOVE.L  D0,(A0)
	        
	         
	        MOVEA.L #0,A0                       ; leval 4 Pointer to the vector table
                MOVE.L  #0x1c,D0                    ; vector number is #0x1c  ,offset is 0x6c
                LSL.L   #2,D0                       ; Adjust for the vector size
                ADDA.L  D0,A0                       ; Add in offset to vector base
	        MOVE.L  #_INT__Interrupt_Level4, D0
	        MOVE.L  D0,(A0)
	        
	         
	        MOVEA.L #0,A0                       ; leval 2 Pointer to the vector table
                MOVE.L  #0x1a,D0                    ; vector number is #0x1c  ,offset is 0x6c
                LSL.L   #2,D0                       ; Adjust for the vector size
                ADDA.L  D0,A0                       ; Add in offset to vector base
	        MOVE.L  #_INT__Interrupt_Level2, D0
	        MOVE.L  D0,(A0)
	        
	        
	        
	         
	        MOVEA.L #0,A0                       ; leval 1 Pointer to the vector table
                MOVE.L  #0x19,D0                    ; vector number is #0x1c  ,offset is 0x6c
                LSL.L   #2,D0                       ; Adjust for the vector size
                ADDA.L  D0,A0                       ; Add in offset to vector base
	        MOVE.L  #_INT__Interrupt_Level1, D0
	        MOVE.L  D0,(A0)
	        
	        
	        MOVEA.L #0,A0                       ; 
                MOVE.L  #0x10,D0                    ;  software dog
                LSL.L   #2,D0                       ; 
                ADDA.L  D0,A0                       ; 
	        MOVE.L  #_INT__Interrupt_Level15, D0
	        MOVE.L  D0,(A0)
	        
	        
	        
	        
	        
	        rts
	        
; Store it in the vector table
;	        MOVE.L  #0x8C,D0              ; 
;		MOVE.B  D0,(MBAR_ADDR+ICR_U1) ; Setup Uart1 interrupt for lev 3, pri 0
;		MOVE.W  (0x10000036),D0       ; Get current interrupt lockout status IMR
;		ANDI.L  #0x2FFF,D0            ; Clear Uart1 bit
;		MOVE.W  D0,(0x10000036)       ; Enable Uart1 interrupt
				
		
		
;/* Define the interrupt vector table for the 52xx family.  Note that this
;   vector table (or a copy of it) resides at address 0. In situations
;   where co-existence with a target monitor is required, this vector table
;   is typically not completely loaded.  The template interrupt vectors are
;   defined at the bottom of this file.  */
;
        SECTION .vectors
        .align 0x10
        XDEF    _INT_Vectors
_INT_Vectors:
	DC.L    STKTOP-4                    ; Initial stack value       0
	DC.L    start                       ; System entry location     1
	DC.L    _INT_Bus_Error              ; Bus Error                 2
        DC.L    _INT_Address_Error          ; Address Error             3
        DC.L    _INT_Illegal_Instruction    ; Illegal Instruction       4
        DC.L    _INT_Zero_Divide            ; Divide by zero            5
        DC.L    _INT_Chk_Chk2               ; CHK and CHK2 instructions 6
        DC.L    _INT_TrapV                  ; TRAPV instruction         7
        DC.L    _INT_Privilege              ; Privilege violation       8
        DC.L    _INT_Trace                  ; Trace                     9
        DC.L    _INT_Emul_A                 ; Emulate A                 10
        DC.L    _INT_Emul_B                 ; Emulate B                 11
        DC.L    _INT_Hdw_Breakpoint         ; Hardware breakpoint       12
        DC.L    _INT_Coprocessor_Violate    ; Coprocessor violation     13
        DC.L    _INT_Format_Error           ; Format error              14
        DC.L    _INT_Uninitialized_Int      ; Uninitialized interrupt   15
        DC.L    _INT_Reserved_0             ; Reserved 0                16
        DC.L    _INT_Reserved_1             ; Reserved 1                17
        DC.L    _INT_Reserved_2             ; Reserved 2                18
        DC.L    _INT_Reserved_3             ; Reserved 3                19
        DC.L    _INT_Reserved_4             ; Reserved 4                20
        DC.L    _INT_Reserved_5             ; Reserved 5                21
        DC.L    _INT_Reserved_6             ; Reserved 6                22
        DC.L    _INT_Reserved_7             ; Reserved 7                23
        DC.L    _INT_Spurious               ; Spurious interrupt        24
        
        DC.L    _INT_Level_1_Auto	    ;25	
        DC.L    _INT_Level_2_Auto		
        DC.L    _INT_Level_3_Auto
        DC.L    _INT_Level_4_Auto
        DC.L    _INT_Level_5_Auto
        DC.L    _INT_Level_6_Auto
        DC.L    _INT_Uart1_Interrupt        ;use 7
        

	
        DC.L    _INT_Trap_0                 ; Trap 0                    32
        DC.L    _INT_Trap_1                 ; Trap 1                    33
        DC.L    _INT_Trap_2                 ; Trap 2                    34
        DC.L    _INT_Trap_3                 ; Trap 3                    35
        DC.L    _INT_Trap_4                 ; Trap 4                    36
        DC.L    _INT_Trap_5                 ; Trap 5                    37
        DC.L    _INT_Trap_6                 ; Trap 6                    38
        DC.L    _INT_Trap_7                 ; Trap 7                    39
        DC.L    _INT_Trap_8                 ; Trap 8                    40
        DC.L    _INT_Trap_9                 ; Trap 9                    41
        DC.L    _INT_Trap_10                ; Trap 10                   42
        DC.L    _INT_Trap_11                ; Trap 11                   43
        DC.L    _INT_Trap_12                ; Trap 12                   44
        DC.L    _INT_Trap_13                ; Trap 13                   45
        DC.L    _INT_Trap_14                ; Trap 14                   46
        DC.L    _INT_Trap_15                ; Trap 15                   47
        DC.L    _INT_Cop_Reserved_0         ; Coprocessor Reserved 0    48
        DC.L    _INT_Cop_Reserved_1         ; Coprocessor Reserved 1    49
        DC.L    _INT_Cop_Reserved_2         ; Coprocessor Reserved 2    50
        DC.L    _INT_Cop_Reserved_3         ; Coprocessor Reserved 3    51
        DC.L    _INT_Cop_Reserved_4         ; Coprocessor Reserved 4    52
        DC.L    _INT_Cop_Reserved_5         ; Coprocessor Reserved 5    53
        DC.L    _INT_Cop_Reserved_6         ; Coprocessor Reserved 6    54
        DC.L    _INT_Cop_Reserved_7         ; Coprocessor Reserved 7    55
        DC.L    _INT_Cop_Reserved_8         ; Coprocessor Reserved 8    56
        DC.L    _INT_Cop_Reserved_9         ; Coprocessor Reserved 9    57
        DC.L    _INT_Cop_Reserved_10        ; Coprocessor Reserved 10   58
        DC.L    _INT_Reserved_8             ; Reserved 8                59
        DC.L    _INT_Reserved_9             ; Reserved 9                60
        DC.L    _INT_Reserved_10            ; Reserved 10               61
        DC.L    _INT_Reserved_11            ; Reserved 11               62
        DC.L    _INT_Reserved_12            ; Reserved 12               63
        DC.L    _INT_User_0                 ; User Interrupt 0          64
        DC.L    _INT_User_1                 ; User Interrupt 1          65
        DC.L    _INT_User_2                 ; User Interrupt 2          66
        DC.L    _INT_User_3                 ; User Interrupt 3          67
        DC.L    _INT_User_4                 ; User Interrupt 4          68
        DC.L    _INT_User_5                 ; User Interrupt 5          69
        DC.L    _INT_User_6                 ; User Interrupt 6          70
        DC.L    _INT_User_7                 ; User Interrupt 7          71
        DC.L    _INT_User_8                 ; User Interrupt 8          72
        DC.L    _INT_User_9                 ; User Interrupt 9          73
        DC.L    _INT_User_10                ; User Interrupt 10         74
        DC.L    _INT_User_11                ; User Interrupt 11         75
        DC.L    _INT_User_12                ; User Interrupt 12         76
        DC.L    _INT_User_13                ; User Interrupt 13         77
        DC.L    _INT_User_14                ; User Interrupt 14         78
        DC.L    _INT_User_15                ; User Interrupt 15         79
        DC.L    _INT_User_16                ; User Interrupt 16         80
        DC.L    _INT_User_17                ; User Interrupt 17         81
        DC.L    _INT_User_18                ; User Interrupt 18         82
        DC.L    _INT_User_19                ; User Interrupt 19         83
        DC.L    _INT_User_20                ; User Interrupt 20         84
        DC.L    _INT_User_21                ; User Interrupt 21         85
        DC.L    _INT_User_22                ; User Interrupt 22         86
        DC.L    _INT_User_23                ; User Interrupt 23         87
        DC.L    _INT_User_24                ; User Interrupt 24         88
        DC.L    _INT_User_25                ; User Interrupt 25         89
        DC.L    _INT_User_26                ; User Interrupt 26         90
        DC.L    _INT_User_27                ; User Interrupt 27         91
        DC.L    _INT_User_28                ; User Interrupt 28         92
        DC.L    _INT_User_29                ; User Interrupt 29         93
        DC.L    _INT_User_30                ; User Interrupt 30         94
        DC.L    _INT_User_31                ; User Interrupt 31         95
        DC.L    _INT_User_32                ; User Interrupt 32         96
        DC.L    _INT_User_33                ; User Interrupt 33         97
        DC.L    _INT_User_34                ; User Interrupt 34         98
        DC.L    _INT_User_35                ; User Interrupt 35         99
        DC.L    _INT_User_36                ; User Interrupt 36         100
        DC.L    _INT_User_37                ; User Interrupt 37         101
        DC.L    _INT_User_38                ; User Interrupt 38         102
        DC.L    _INT_User_39                ; User Interrupt 39         103
        DC.L    _INT_User_40                ; User Interrupt 40         104
        DC.L    _INT_User_41                ; User Interrupt 41         105
        DC.L    _INT_User_42                ; User Interrupt 42         106
        DC.L    _INT_User_43                ; User Interrupt 43         107
        DC.L    _INT_User_44                ; User Interrupt 44         108
        DC.L    _INT_User_45                ; User Interrupt 45         109
        DC.L    _INT_User_46                ; User Interrupt 46         110
        DC.L    _INT_User_47                ; User Interrupt 47         111
        DC.L    _INT_User_48                ; User Interrupt 48         112
        DC.L    _INT_User_49                ; User Interrupt 49         113
        DC.L    _INT_User_50                ; User Interrupt 50         114
        DC.L    _INT_User_51                ; User Interrupt 51         115
        DC.L    _INT_User_52                ; User Interrupt 52         116
        DC.L    _INT_User_53                ; User Interrupt 53         117
        DC.L    _INT_User_54                ; User Interrupt 54         118
        DC.L    _INT_User_55                ; User Interrupt 55         119
        DC.L    _INT_User_56                ; User Interrupt 56         120
        DC.L    _INT_User_57                ; User Interrupt 57         121
        DC.L    _INT_User_58                ; User Interrupt 58         122
        DC.L    _INT_User_59                ; User Interrupt 59         123
        DC.L    _INT_User_60                ; User Interrupt 60         124
        DC.L    _INT_User_61                ; User Interrupt 61         125
        DC.L    _INT_User_62                ; User Interrupt 62         126
        DC.L    _INT_User_63                ; User Interrupt 63         127
        DC.L    _INT_User_64                ; User Interrupt 64         128
        DC.L    _INT_User_65                ; User Interrupt 65         129
        DC.L    _INT_User_66                ; User Interrupt 66         130
        DC.L    _INT_User_67                ; User Interrupt 67         131
        DC.L    _INT_User_68                ; User Interrupt 68         132
        DC.L    _INT_User_69                ; User Interrupt 69         133
        DC.L    _INT_User_70                ; User Interrupt 70         134
        DC.L    _INT_User_71                ; User Interrupt 71         135
        DC.L    _INT_User_72                ; User Interrupt 72         136
        DC.L    _INT_User_73                ; User Interrupt 73         137
        DC.L    _INT_User_74                ; User Interrupt 74         138
        DC.L    _INT_User_75                ; User Interrupt 75         139
        DC.L    _INT_User_76                ; User Interrupt 76         140
        DC.L    _INT_User_77                ; User Interrupt 77         141
        DC.L    _INT_User_78                ; User Interrupt 78         142
        DC.L    _INT_User_79                ; User Interrupt 79         143
        DC.L    _INT_User_80                ; User Interrupt 80         144
        DC.L    _INT_User_81                ; User Interrupt 81         145
        DC.L    _INT_User_82                ; User Interrupt 82         146