f243_c.h

电机无速度传感器矢量控制在ＤＳＰ２４０７下的实现程序

/***********************************************************************
; File Name:	f243_c.h
;
; Description:	F243 C Languange Header file containing all peripheral register 
;               declarations as well as other useful definitions.
;
; Revision:     1.00
;
;**********************************************************************/


/*
-----------------------------------------------------------------------
; On Chip Periperal Register Definitions (All registers mapped into data 
; space unless otherwise noted)
;----------------------------------------------------------------------
*/

/*
;C2xx Core Registers
;~~~~~~~~~~~~~~~~~~~~
IMR		.set	0004h			;Interrupt Mask Register
GREG	.set	0005h			;Global memory allocation Register
IFR		.set	0006h			;Interrupt Flag Register
*/
#define	IMR		(volatile unsigned int *)0x0004
#define	GREG	(volatile unsigned int *)0x0005
#define	IFR		(volatile unsigned int *)0x0006

/*外设中断申请寄存器0*/
#define PIRQR0  (volatile unsigned int *)0x7010
/*外设中断申请寄存器1*/
#define PIRQR1  (volatile unsigned int *)0x7011
/*外设中断回应寄存器0*/
#define PIACKR0 (volatile unsigned int *)0x7014
/*外设中断回应寄存器1*/
#define PIACKR1 (volatile unsigned int *)0x7015
/*
;System Module Registers
;~~~~~~~~~~~~~~~~~~~~~~~
SCSR		.set	07018h		;System Module Control and Status Register
*/
#define	SCSR	(volatile unsigned int *)0x7018
/*
;Watch-Dog(WD) / Real Time Int(RTI) / Phase Lock Loop(PLL) Registers
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
WDCNTR 		.set	07023h		;WD Counter Register
WDKEY		.set	07025h		;WD Key Register
WDCR		.set	07029h		;WD Control Register
*/
#define	WDCNTR	(volatile unsigned int *)0x7023
#define	WDKEY	(volatile unsigned int *)0x7025
#define	WDCR	(volatile unsigned int *)0x7029
/*
;Analog-to-Digital Converter(ADC) registers
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
ADCTRL1		.set	07032h		;ADC Control Register 1
ADCTRL2		.set	07034h		;ADC Control Register 2
ADCFIFO1	.set	07036h		;ADC Data Register FIFO1
ADCFIFO2	.set	07038h		;ADC Data Register FIFO2
*/
#define	ADCTRL1		(volatile unsigned int *)0x7032
#define	ADCTRL2		(volatile unsigned int *)0x7034
#define	ADCFIFO1	(volatile unsigned int *)0x7036
#define	ADCFIFO2	(volatile unsigned int *)0x7038

/*
;Serial Peripheral Interface (SPI) Registers
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
SPICCR	.set	07040h		;SPI Configuration Control Register
SPICTL	.set	07041h		;SPI Operation Control Register
SPISTS	.set	07042h		;SPI Status Register
SPIBRR	.set	07044h		;SPI Baud Rate Register
SPIEMU 	.set	07046h		;SPI Emulation buffer Register
SPIBUF 	.set	07047h		;SPI Serial Input Buffer Register
SPIDAT 	.set	07049h		;SPI Serial Data Register
SPIPRI 	.set	0704Fh		;SPI Priority control Register
*/
#define	SPICCR		(volatile unsigned int *)0x7040
#define	SPICTL		(volatile unsigned int *)0x7041
#define	SPISTS		(volatile unsigned int *)0x7042
#define	SPIBRR		(volatile unsigned int *)0x7044
#define	SPIEMU		(volatile unsigned int *)0x7046
#define	SPIBUF		(volatile unsigned int *)0x7047
#define	SPIDAT		(volatile unsigned int *)0x7049
#define	SPIPRI		(volatile unsigned int *)0x704F
/*
;Serial Communications Interface (SCI) Registers
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
SCICCR		.set	07050h		;SCI Communication Control Register
SCICTL1		.set	07051h		;SCI Control Register 1
SCIHBAUD	.set	07052h		;SCI Baud Select register, high bits
SCILBAUD	.set	07053h		;SCI Baud Select register, high bits
SCICTL2		.set	07054h		;SCI Control Register 2
SCIRXST		.set	07055h		;SCI Receive Status Register
SCIRXEMU	.set	07056h		;SCI Emulation data buffer Register
SCIRXBUF	.set	07057h		;SCI Receiver data buffer Register
SCITXBUF	.set	07059h		;SCI Transmit data buffer Register
SCIPRI 		.set	0705Fh		;SCI Priority Control Register
*/
#define	SCICCR		(volatile unsigned int *)0x7050
#define	SCICTL1		(volatile unsigned int *)0x7051
#define	SCIHBAUD	(volatile unsigned int *)0x7052
#define	SCILBAUD	(volatile unsigned int *)0x7053
#define	SCICTL2		(volatile unsigned int *)0x7054
#define	SCIRXST		(volatile unsigned int *)0x7055
#define	SCIRXEMU	(volatile unsigned int *)0x7056
#define	SCIRXBUF	(volatile unsigned int *)0x7057
#define	SCITXBUF	(volatile unsigned int *)0x7059
#define	SCIPRI		(volatile unsigned int *)0x705F

/*
;CAN Controller Module Registers
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
MDER		.set	07100h		;Mailbox Direction/Enable Register
TCR			.set	07101h		;Transmission Control Register
RCR			.set	07102h		;Receive Control Register
MCR			.set	07103h      ;Master Control Register 
BCR2		.set	07104h		;Bit Configuration Register 2
BCR1		.set	07105h		;Bit Configuration Register 1 
ESR			.set	07106h		;Error Status Register 
GSR			.set	07107h		;Global Status Register 
CEC			.set	07108h		;CAN Error Counter Registers 
CAN_IFR		.set	07109h		;Interrupt Flag Register 
CAN_IMR		.set	0710Ah		;Global Interrupt Mask Register 
LAM0_H		.set	0710Bh		;Local Acceptance Mask Mailbox 0 and 1 
LAM0_L		.set	0710Ch		;Local Acceptance Mask Mailbox 0 and 1 
LAM1_H		.set	0710Dh		;Local Acceptance Mask Mailbox 2 and 3
LAM1_L		.set	0710Eh		;Local Acceptance Mask Mailbox 2 and 3 
MSGID0L		.set	07200h		;CAN Message ID for Mailbox 0 (lower 16 bits)
MSGID0H		.set	07201h		;CAN Message ID for Mailbox 0 (upper 16 bits)
MSGCTRL0	.set	07202h		;CAN Message Control Field 0 
MBX0A		.set	07204h		;CAN 2 of 8 Bytes of Mailbox 0 
MBX0B		.set	07205h		;CAN 2 of 8 Bytes of Mailbox 0 
MBX0C		.set	07206h		;CAN 2 of 8 Bytes of Mailbox 0 
MBX0D		.set	07207h		;CAN 2 of 8 Bytes of Mailbox 0 
MSGID1L		.set	07208h		;CAN Message ID for Mailbox 1 (lower 16 bits)
MSGID1H		.set	07209h		;CAN Message ID for Mailbox 1 (upper 16 bits)
MSGCTRL1	.set	0720Ah		;CAN Message Control Field 1 
MBX1A		.set	0720Ch		;CAN 2 of 8 Bytes of Mailbox 1 
MBX1B		.set	0720Dh		;CAN 2 of 8 Bytes of Mailbox 1 
MBX1C		.set	0720Eh		;CAN 2 of 8 Bytes of Mailbox 1 
MBX1D		.set	0720Fh		;CAN 2 of 8 Bytes of Mailbox 1 
MSGID2L		.set	07210h		;CAN Message ID for Mailbox 2 (lower 16 bits)
MSGID2H		.set	07211h		;CAN Message ID for Mailbox 2 (upper 16 bits)
MSGCTRL2	.set	07212h		;CAN Message Control Field 2 
MBX2A		.set	07214h		;CAN 2 of 8 Bytes of Mailbox 2 
MBX2B		.set	07215h		;CAN 2 of 8 Bytes of Mailbox 2 
MBX2C		.set	07216h		;CAN 2 of 8 Bytes of Mailbox 2 
MBX2D		.set	07217h		;CAN 2 of 8 Bytes of Mailbox 2 
MSGID3L		.set	07218h		;CAN Message ID for Mailbox 3 (lower 16 bits)
MSGID3H		.set	07219h		;CAN Message ID for Mailbox 3 (upper 16 bits)
MSGCTRL3	.set	0721Ah		;CAN Message Control Field 3 
MBX3A		.set	0721Ch		;CAN 2 of 8 Bytes of Mailbox 3 
MBX3B		.set	0721Dh		;CAN 2 of 8 Bytes of Mailbox 3 
MBX3C		.set	0721Eh		;CAN 2 of 8 Bytes of Mailbox 3 
MBX3D		.set	0721Fh		;CAN 2 of 8 Bytes of Mailbox 3 
MSGID4L		.set	07220h		;CAN Message ID for Mailbox 4 (lower 16 bits)
MSGID4H		.set	07221h		;CAN Message ID for Mailbox 4 (upper 16 bits)
MSGCTRL4	.set	07222h		;CAN Message Control Field 4 
MBX4A		.set	07224h		;CAN 2 of 8 Bytes of Mailbox 4 
MBX4B		.set	07225h		;CAN 2 of 8 Bytes of Mailbox 4 
MBX4C		.set	07226h		;CAN 2 of 8 Bytes of Mailbox 4 
MBX4D		.set	07227h		;CAN 2 of 8 Bytes of Mailbox 4 
MSGID5L		.set	07228h		;CAN Message ID for Mailbox 5 (lower 16 bits)
MSGID5H		.set	07229h		;CAN Message ID for Mailbox 5 (upper 16 bits)
MSGCTRL5	.set	0722Ah		;CAN Message Control Field 5 
MBX5A		.set	0722Ch		;CAN 2 of 8 Bytes of Mailbox 5 
MBX5B		.set	0722Dh		;CAN 2 of 8 Bytes of Mailbox 5 
MBX5C		.set	0722Eh		;CAN 2 of 8 Bytes of Mailbox 5 
MBX5D		.set	0722Fh		;CAN 2 of 8 Bytes of Mailbox 5 
MDER		.set	07100h		;Mailbox Direction/Enable Register
TCR			.set	07101h		;Transmission Control Register
RCR			.set	07102h		;Receive Control Register
MCR			.set	07103h      ;Master Control Register 
BCR2		.set	07104h		;Bit Configuration Register 2 
BCR1		.set	07105h		;Bit Configuration Register 1 
ESR			.set	07106h		;Error Status Register 
GSR			.set	07107h		;Global Status Register 
CEC			.set	07108h		;CAN Error Counter Registers 
CAN_IFR		.set	07109h		;Interrupt Flag Register      
CAN_IMR		.set	0710Ah		;Global Interrupt Mask Register 
LAM0_H		.set	0710Bh		;Local Acceptance Mask Mailbox 0 and 1 
LAM0_L		.set	0710Ch		;Local Acceptance Mask Mailbox 0 and 1 
LAM1_H		.set	0710Dh		;Local Acceptance Mask Mailbox 2 and 3
LAM1_L		.set	0710Eh		;Local Acceptance Mask Mailbox 2 and 3 
MSGID0L		.set	07200h		;CAN Message ID for Mailbox 0 (lower 16 bits)
MSGID0H		.set	07201h		;CAN Message ID for Mailbox 0 (upper 16 bits)
MSGCTRL0	.set	07202h		;CAN Message Control Field 0  
MBX0A		.set	07204h		;CAN 2 of 8 Bytes of Mailbox 0 
MBX0B		.set	07205h		;CAN 2 of 8 Bytes of Mailbox 0 
MBX0C		.set	07206h		;CAN 2 of 8 Bytes of Mailbox 0 
MBX0D		.set	07207h		;CAN 2 of 8 Bytes of Mailbox 0 
MSGID1L		.set	07208h		;CAN Message ID for Mailbox 1 (lower 16 bits)
MSGID1H		.set	07209h		;CAN Message ID for Mailbox 1 (upper 16 bits)
MSGCTRL1	.set	0720Ah		;CAN Message Control Field 1  
MBX1A		.set	0720Ch		;CAN 2 of 8 Bytes of Mailbox 1 
MBX1B		.set	0720Dh		;CAN 2 of 8 Bytes of Mailbox 1 
MBX1C		.set	0720Eh		;CAN 2 of 8 Bytes of Mailbox 1 
MBX1D		.set	0720Fh		;CAN 2 of 8 Bytes of Mailbox 1 
MSGID2L		.set	07210h		;CAN Message ID for Mailbox 2 (lower 16 bits)
MSGID2H		.set	07211h		;CAN Message ID for Mailbox 2 (upper 16 bits)
MSGCTRL2	.set	07212h		;CAN Message Control Field 2  
MBX2A		.set	07214h		;CAN 2 of 8 Bytes of Mailbox 2 
MBX2B		.set	07215h		;CAN 2 of 8 Bytes of Mailbox 2 
MBX2C		.set	07216h		;CAN 2 of 8 Bytes of Mailbox 2 
MBX2D		.set	07217h		;CAN 2 of 8 Bytes of Mailbox 2 
MSGID3L		.set	07218h		;CAN Message ID for Mailbox 3 (lower 16 bits)
MSGID3H		.set	07219h		;CAN Message ID for Mailbox 3 (upper 16 bits)
MSGCTRL3	.set	0721Ah		;CAN Message Control Field 3  
MBX3A		.set	0721Ch		;CAN 2 of 8 Bytes of Mailbox 3 
MBX3B		.set	0721Dh		;CAN 2 of 8 Bytes of Mailbox 3 
MBX3C		.set	0721Eh		;CAN 2 of 8 Bytes of Mailbox 3 
MBX3D		.set	0721Fh		;CAN 2 of 8 Bytes of Mailbox 3 
MSGID4L		.set	07220h		;CAN Message ID for Mailbox 4 (lower 16 bits)
MSGID4H		.set	07221h		;CAN Message ID for Mailbox 4 (upper 16 bits)
MSGCTRL4	.set	07222h		;CAN Message Control Field 4  
MBX4A		.set	07224h		;CAN 2 of 8 Bytes of Mailbox 4 
MBX4B		.set	07225h		;CAN 2 of 8 Bytes of Mailbox 4 
MBX4C		.set	07226h		;CAN 2 of 8 Bytes of Mailbox 4 
MBX4D		.set	07227h		;CAN 2 of 8 Bytes of Mailbox 4 
MSGID5L		.set	07228h		;CAN Message ID for Mailbox 5 (lower 16 bits)
MSGID5H		.set	07229h		;CAN Message ID for Mailbox 5 (upper 16 bits)
MSGCTRL5	.set	0722Ah		;CAN Message Control Field 5  
MBX5A		.set	0722Ch		;CAN 2 of 8 Bytes of Mailbox 5 
MBX5B		.set	0722Dh		;CAN 2 of 8 Bytes of Mailbox 5 
MBX5C		.set	0722Eh		;CAN 2 of 8 Bytes of Mailbox 5 
MBX5D		.set	0722Fh		;CAN 2 of 8 Bytes of Mailbox 5 
*/
#define MDER		(volatile unsigned int *)0x7100	
#define TCR			(volatile unsigned int *)0x7101		
#define RCR			(volatile unsigned int *)0x7102	
#define MCR			(volatile unsigned int *)0x7103     
#define BCR2		(volatile unsigned int *)0x7104		
#define BCR1		(volatile unsigned int *)0x7105		
#define ESR			(volatile unsigned int *)0x7106		
#define GSR			(volatile unsigned int *)0x7107		
#define CEC			(volatile unsigned int *)0x7108	
#define CAN_IFR		(volatile unsigned int *)0x7109		
#define CAN_IMR		(volatile unsigned int *)0x710A		
#define LAM0_H		(volatile unsigned int *)0x710B		
#define LAM0_L		(volatile unsigned int *)0x710C	
#define LAM1_H		(volatile unsigned int *)0x710D	
#define LAM1_L		(volatile unsigned int *)0x710E	
#define MSGID0L		(volatile unsigned int *)0x7200
#define MSGID0H		(volatile unsigned int *)0x7201
#define MSGCTRL0	(volatile unsigned int *)0x7202	
#define MBX0A		(volatile unsigned int *)0x7204	
#define MBX0B		(volatile unsigned int *)0x7205	
#define MBX0C		(volatile unsigned int *)0x7206	
#define MBX0D		(volatile unsigned int *)0x7207	
#define MSGID1L		(volatile unsigned int *)0x7208	
#define MSGID1H		(volatile unsigned int *)0x7209	
#define MSGCTRL1	(volatile unsigned int *)0x720A	
#define MBX1A		(volatile unsigned int *)0x720C	
#define MBX1B		(volatile unsigned int *)0x720D	
#define MBX1C		(volatile unsigned int *)0x720E	
#define MBX1D		(volatile unsigned int *)0x720F	
#define MSGID2L		(volatile unsigned int *)0x7210	
#define MSGID2H		(volatile unsigned int *)0x7211	
#define MSGCTRL2	(volatile unsigned int *)0x7212	
#define MBX2A		(volatile unsigned int *)0x7214	
#define MBX2B		(volatile unsigned int *)0x7215	
#define MBX2C		(volatile unsigned int *)0x7216	
#define MBX2D		(volatile unsigned int *)0x7217	
#define MSGID3L		(volatile unsigned int *)0x7218	
#define MSGID3H		(volatile unsigned int *)0x7219	
#define MSGCTRL3	(volatile unsigned int *)0x721A	
#define MBX3A		(volatile unsigned int *)0x721C