📄 pic16lf1847.h
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unsigned LATB2 : 1;
unsigned LATB3 : 1;
unsigned LATB4 : 1;
unsigned LATB5 : 1;
unsigned LATB6 : 1;
unsigned LATB7 : 1;
};
} LATBbits @ 0x10D;
#endif
// Register: CM1CON0
volatile unsigned char CM1CON0 @ 0x111;
// bit and bitfield definitions
// Comparator Output Synchronous Mode bit
volatile bit C1SYNC @ ((unsigned)&CM1CON0*8)+0;
// Comparator Hysteresis Enable bit
volatile bit C1HYS @ ((unsigned)&CM1CON0*8)+1;
// Comparator Speed/Power Select bit
volatile bit C1SP @ ((unsigned)&CM1CON0*8)+2;
// Comparator Output Polarity Select bit
volatile bit C1POL @ ((unsigned)&CM1CON0*8)+4;
// Comparator Output Enable bit
volatile bit C1OE @ ((unsigned)&CM1CON0*8)+5;
// Comparator Output bit
volatile bit C1OUT @ ((unsigned)&CM1CON0*8)+6;
// Comparator Enable bit
volatile bit C1ON @ ((unsigned)&CM1CON0*8)+7;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned C1SYNC : 1;
unsigned C1HYS : 1;
unsigned C1SP : 1;
unsigned : 1;
unsigned C1POL : 1;
unsigned C1OE : 1;
unsigned C1OUT : 1;
unsigned C1ON : 1;
};
} CM1CON0bits @ 0x111;
#endif
// Register: CM1CON1
volatile unsigned char CM1CON1 @ 0x112;
// bit and bitfield definitions
// Comparator Negative Input Channel Select bits
volatile bit C1NCH0 @ ((unsigned)&CM1CON1*8)+0;
// Comparator Negative Input Channel Select bits
volatile bit C1NCH1 @ ((unsigned)&CM1CON1*8)+1;
// Comparator Positive Input Channel Select bits
volatile bit C1PCH0 @ ((unsigned)&CM1CON1*8)+4;
// Comparator Positive Input Channel Select bits
volatile bit C1PCH1 @ ((unsigned)&CM1CON1*8)+5;
// Comparator Interrupt on Negative going edge Enable bits
volatile bit C1INTN @ ((unsigned)&CM1CON1*8)+6;
// Comparator Interrupt on Positive going edge Enable bits
volatile bit C1INTP @ ((unsigned)&CM1CON1*8)+7;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned C1NCH0 : 1;
unsigned C1NCH1 : 1;
unsigned : 2;
unsigned C1PCH0 : 1;
unsigned C1PCH1 : 1;
unsigned C1INTN : 1;
unsigned C1INTP : 1;
};
struct {
unsigned C1NCH : 2;
unsigned : 2;
unsigned C1PCH : 2;
};
} CM1CON1bits @ 0x112;
#endif
// Register: CM2CON0
volatile unsigned char CM2CON0 @ 0x113;
// bit and bitfield definitions
volatile bit C2SYNC @ ((unsigned)&CM2CON0*8)+0;
volatile bit C2HYS @ ((unsigned)&CM2CON0*8)+1;
volatile bit C2SP @ ((unsigned)&CM2CON0*8)+2;
volatile bit C2POL @ ((unsigned)&CM2CON0*8)+4;
volatile bit C2OE @ ((unsigned)&CM2CON0*8)+5;
volatile bit C2OUT @ ((unsigned)&CM2CON0*8)+6;
volatile bit C2ON @ ((unsigned)&CM2CON0*8)+7;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned C2SYNC : 1;
unsigned C2HYS : 1;
unsigned C2SP : 1;
unsigned : 1;
unsigned C2POL : 1;
unsigned C2OE : 1;
unsigned C2OUT : 1;
unsigned C2ON : 1;
};
} CM2CON0bits @ 0x113;
#endif
// Register: CM2CON1
volatile unsigned char CM2CON1 @ 0x114;
// bit and bitfield definitions
// Comparator Negative Input Channel Select bits
volatile bit C2NCH0 @ ((unsigned)&CM2CON1*8)+0;
// Comparator Negative Input Channel Select bits
volatile bit C2NCH1 @ ((unsigned)&CM2CON1*8)+1;
// Comparator Positive Input Channel Select bits
volatile bit C2PCH0 @ ((unsigned)&CM2CON1*8)+4;
// Comparator Positive Input Channel Select bits
volatile bit C2PCH1 @ ((unsigned)&CM2CON1*8)+5;
// Comparator Interrupt on Negative going edge Enable bits
volatile bit C2INTN @ ((unsigned)&CM2CON1*8)+6;
// Comparator Interrupt on Positive going edge Enable bits
volatile bit C2INTP @ ((unsigned)&CM2CON1*8)+7;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned C2NCH0 : 1;
unsigned C2NCH1 : 1;
unsigned : 2;
unsigned C2PCH0 : 1;
unsigned C2PCH1 : 1;
unsigned C2INTN : 1;
unsigned C2INTP : 1;
};
struct {
unsigned C2NCH : 2;
unsigned : 2;
unsigned C2PCH : 2;
};
} CM2CON1bits @ 0x114;
#endif
// Register: CMOUT
// Comparator Output Register
volatile unsigned char CMOUT @ 0x115;
// bit and bitfield definitions
volatile bit MC1OUT @ ((unsigned)&CMOUT*8)+0;
volatile bit MC2OUT @ ((unsigned)&CMOUT*8)+1;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned MC1OUT : 1;
unsigned MC2OUT : 1;
};
} CMOUTbits @ 0x115;
#endif
// Register: BORCON
// Brown-out Reset Control Register
volatile unsigned char BORCON @ 0x116;
// bit and bitfield definitions
// Brown-out Reset Circuit Ready Status bit
volatile bit BORRDY @ ((unsigned)&BORCON*8)+0;
// Software Brown Out Reset Enable bit
volatile bit SBOREN @ ((unsigned)&BORCON*8)+7;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned BORRDY : 1;
unsigned : 6;
unsigned SBOREN : 1;
};
} BORCONbits @ 0x116;
#endif
// Register: FVRCON
// Fixed Voltage Reference Control Register
volatile unsigned char FVRCON @ 0x117;
// bit and bitfield definitions
// A/D Converter Fixed Voltage Reference Selection
volatile bit ADFVR0 @ ((unsigned)&FVRCON*8)+0;
// A/D Converter Fixed Voltage Reference Selection
volatile bit ADFVR1 @ ((unsigned)&FVRCON*8)+1;
// Comparator and D/A Converter Fixed Voltage Reference Selection
volatile bit CDAFVR0 @ ((unsigned)&FVRCON*8)+2;
// Comparator and D/A Converter Fixed Voltage Reference Selection
volatile bit CDAFVR1 @ ((unsigned)&FVRCON*8)+3;
// Fixed Voltage Reference Ready Flag
volatile bit FVRRDY @ ((unsigned)&FVRCON*8)+6;
// Fixed Voltage Reference Enable
volatile bit FVREN @ ((unsigned)&FVRCON*8)+7;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned ADFVR0 : 1;
unsigned ADFVR1 : 1;
unsigned CDAFVR0 : 1;
unsigned CDAFVR1 : 1;
unsigned : 1;
unsigned : 1;
unsigned FVRRDY : 1;
unsigned FVREN : 1;
};
struct {
unsigned ADFVR : 2;
unsigned CDAFVR : 2;
};
} FVRCONbits @ 0x117;
#endif
// Register: DACCON0
// Voltage Reference Control Register 0
volatile unsigned char DACCON0 @ 0x118;
// bit and bitfield definitions
// DAC1 Negative Source Select bits
volatile bit DACNSS @ ((unsigned)&DACCON0*8)+0;
// DAC1 Positive Source Select bits
volatile bit DACPSS0 @ ((unsigned)&DACCON0*8)+2;
// DAC1 Positive Source Select bits
volatile bit DACPSS1 @ ((unsigned)&DACCON0*8)+3;
// DAC1 Voltage Output Enable bit
volatile bit DACOE @ ((unsigned)&DACCON0*8)+5;
// DAC 1 Low Power Voltage State Select bit
volatile bit DACLPS @ ((unsigned)&DACCON0*8)+6;
// DAC 1 Enable bit
volatile bit DACEN @ ((unsigned)&DACCON0*8)+7;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned DACNSS : 1;
unsigned : 1;
unsigned DACPSS0 : 1;
unsigned DACPSS1 : 1;
unsigned : 1;
unsigned DACOE : 1;
unsigned DACLPS : 1;
unsigned DACEN : 1;
};
struct {
unsigned : 2;
unsigned DACPSS : 2;
};
} DACCON0bits @ 0x118;
#endif
// Register: DACCON1
// Voltage Reference Control Register 1
volatile unsigned char DACCON1 @ 0x119;
// bit and bitfield definitions
// DAC1 Voltage Output Select bits
volatile bit DACR0 @ ((unsigned)&DACCON1*8)+0;
// DAC1 Voltage Output Select bits
volatile bit DACR1 @ ((unsigned)&DACCON1*8)+1;
// DAC1 Voltage Output Select bits
volatile bit DACR2 @ ((unsigned)&DACCON1*8)+2;
// DAC1 Voltage Output Select bits
volatile bit DACR3 @ ((unsigned)&DACCON1*8)+3;
// DAC1 Voltage Output Select bits
volatile bit DACR4 @ ((unsigned)&DACCON1*8)+4;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned DACR0 : 1;
unsigned DACR1 : 1;
unsigned DACR2 : 1;
unsigned DACR3 : 1;
unsigned DACR4 : 1;
unsigned : 1;
};
struct {
unsigned DACR : 5;
};
} DACCON1bits @ 0x119;
#endif
// Register: SRCON0
// SR Latch Control Register 0
volatile unsigned char SRCON0 @ 0x11A;
// bit and bitfield definitions
// Pulse Reset Input of the SR Latch
volatile bit SRPR @ ((unsigned)&SRCON0*8)+0;
// Pulse Set Input of the SR Latch
volatile bit SRPS @ ((unsigned)&SRCON0*8)+1;
// SR Latch Q Output Enable bit
volatile bit SRNQEN @ ((unsigned)&SRCON0*8)+2;
// SR Latch Q Output Enable bit
volatile bit SRQEN @ ((unsigned)&SRCON0*8)+3;
// SR Latch Clock divider bits
volatile bit SRCLK0 @ ((unsigned)&SRCON0*8)+4;
// SR Latch Clock divider bits
volatile bit SRCLK1 @ ((unsigned)&SRCON0*8)+5;
// SR Latch Clock divider bits
volatile bit SRCLK2 @ ((unsigned)&SRCON0*8)+6;
// SR Latch Enable bit
volatile bit SRLEN @ ((unsigned)&SRCON0*8)+7;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned SRPR : 1;
unsigned SRPS : 1;
unsigned SRNQEN : 1;
unsigned SRQEN : 1;
unsigned SRCLK0 : 1;
unsigned SRCLK1 : 1;
unsigned SRCLK2 : 1;
unsigned SRLEN : 1;
};
struct {
unsigned : 4;
unsigned SRCLK : 3;
};
} SRCON0bits @ 0x11A;
#endif
// Register: SRCON1
// SR Latch Control Register 1
volatile unsigned char SRCON1 @ 0x11B;
// bit and bitfield definitions
// SR Latch C1 Reset Enable bit
volatile bit SRRC1E @ ((unsigned)&SRCON1*8)+0;
// SR Latch C2 Reset Enable bit
volatile bit SRRC2E @ ((unsigned)&SRCON1*8)+1;
// SR Latch Reset Clock Enable bit
volatile bit SRRCKE @ ((unsigned)&SRCON1*8)+2;
// SR Latch Peripheral Reset Enable bit
volatile bit SRRPE @ ((unsigned)&SRCON1*8)+3;
// SR Latch C1 Set Enable bit
volatile bit SRSC1E @ ((unsigned)&SRCON1*8)+4;
// SR Latch C2 Set Enable bit
volatile bit SRSC2E @ ((unsigned)&SRCON1*8)+5;
// SR Latch Set Clock Enable bit
volatile bit SRSCKE @ ((unsigned)&SRCON1*8)+6;
// SR Latch Peripheral Set Enable bit
volatile bit SRSPE @ ((unsigned)&SRCON1*8)+7;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned SRRC1E : 1;
unsigned SRRC2E : 1;
unsigned SRRCKE : 1;
unsigned SRRPE : 1;
unsigned SRSC1E : 1;
unsigned SRSC2E : 1;
unsigned SRSCKE : 1;
unsigned SRSPE : 1;
};
} SRCON1bits @ 0x11B;
#endif
// Register: APFCON0
// Alternate Pin Function Control Register
volatile unsigned char APFCON0 @ 0x11D;
// bit and bitfield definitions
// CCP2 Input/Output Pin Selection
volatile bit CCP1SEL @ ((unsigned)&APFCON0*8)+0;
// SS Input Pin Selection
volatile bit P1CSEL @ ((unsigned)&APFCON0*8)+1;
// Comparator 2 Output Pin Selection
volatile bit P1DSEL @ ((unsigned)&APFCON0*8)+2;
// SR Latch nQ Output Pin Selection
volatile bit CCP2SEL @ ((unsigned)&APFCON0*8)+3;
// CCP2 PWM B Output Pin Selection
volatile bit P2BSEL @ ((unsigned)&APFCON0*8)+4;
// Timer1 Gate Input Pin Selection
volatile bit SS1SEL @ ((unsigned)&APFCON0*8)+5;
// CCP3 Input/Output Pin Selection
volatile bit SDO1SEL @ ((unsigned)&APFCON0*8)+6;
volatile bit RXDTSEL @ ((unsigned)&APFCON0*8)+7;
#ifndef _LIB_BUILD
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