pic12lf1822.h

picc

volatile unsigned char           TMR1H               @ 0x017;
// bit and bitfield definitions

// Register: TMR1
volatile unsigned int            TMR1                @ 0x016;

// Register: T1CON
volatile unsigned char           T1CON               @ 0x018;
// bit and bitfield definitions
volatile bit TMR1ON              @ ((unsigned)&T1CON*8)+0;
volatile bit nT1SYNC             @ ((unsigned)&T1CON*8)+2;
volatile bit T1OSCEN             @ ((unsigned)&T1CON*8)+3;
volatile bit T1CKPS0             @ ((unsigned)&T1CON*8)+4;
volatile bit T1CKPS1             @ ((unsigned)&T1CON*8)+5;
volatile bit TMR1CS0             @ ((unsigned)&T1CON*8)+6;
volatile bit TMR1CS1             @ ((unsigned)&T1CON*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned TMR1ON              : 1;
        volatile unsigned                     : 1;
        volatile unsigned nT1SYNC             : 1;
        volatile unsigned T1OSCEN             : 1;
        volatile unsigned T1CKPS0             : 1;
        volatile unsigned T1CKPS1             : 1;
        volatile unsigned TMR1CS0             : 1;
        volatile unsigned TMR1CS1             : 1;
    };
    struct {
        volatile unsigned : 4;
        volatile unsigned T1CKPS              : 2;
        volatile unsigned TMR1CS              : 2;
    };
} T1CONbits @ 0x018;
#endif

// Register: T1GCON
volatile unsigned char           T1GCON              @ 0x019;
// bit and bitfield definitions
volatile bit T1GSS0              @ ((unsigned)&T1GCON*8)+0;
volatile bit T1GSS1              @ ((unsigned)&T1GCON*8)+1;
volatile bit T1GVAL              @ ((unsigned)&T1GCON*8)+2;
volatile bit T1GGO               @ ((unsigned)&T1GCON*8)+3;
volatile bit T1GSPM              @ ((unsigned)&T1GCON*8)+4;
volatile bit T1GTM               @ ((unsigned)&T1GCON*8)+5;
volatile bit T1GPOL              @ ((unsigned)&T1GCON*8)+6;
volatile bit TMR1GE              @ ((unsigned)&T1GCON*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned T1GSS0              : 1;
        volatile unsigned T1GSS1              : 1;
        volatile unsigned T1GVAL              : 1;
        volatile unsigned T1GGO               : 1;
        volatile unsigned T1GSPM              : 1;
        volatile unsigned T1GTM               : 1;
        volatile unsigned T1GPOL              : 1;
        volatile unsigned TMR1GE              : 1;
    };
    struct {
        volatile unsigned T1GSS               : 2;
    };
} T1GCONbits @ 0x019;
#endif

// Register: TMR2
volatile unsigned char           TMR2                @ 0x01A;
// bit and bitfield definitions

// Register: PR2
volatile unsigned char           PR2                 @ 0x01B;
// bit and bitfield definitions

// Register: T2CON
volatile unsigned char           T2CON               @ 0x01C;
// bit and bitfield definitions
volatile bit T2CKPS0             @ ((unsigned)&T2CON*8)+0;
volatile bit T2CKPS1             @ ((unsigned)&T2CON*8)+1;
volatile bit TMR2ON              @ ((unsigned)&T2CON*8)+2;
volatile bit T2OUTPS0            @ ((unsigned)&T2CON*8)+3;
volatile bit T2OUTPS1            @ ((unsigned)&T2CON*8)+4;
volatile bit T2OUTPS2            @ ((unsigned)&T2CON*8)+5;
volatile bit T2OUTPS3            @ ((unsigned)&T2CON*8)+6;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned T2CKPS0             : 1;
        volatile unsigned T2CKPS1             : 1;
        volatile unsigned TMR2ON              : 1;
        volatile unsigned T2OUTPS0            : 1;
        volatile unsigned T2OUTPS1            : 1;
        volatile unsigned T2OUTPS2            : 1;
        volatile unsigned T2OUTPS3            : 1;
    };
    struct {
        volatile unsigned T2CKPS              : 2;
        volatile unsigned                     : 1;
        volatile unsigned T2OUTPS             : 4;
    };
} T2CONbits @ 0x01C;
#endif

// Register: CPSCON0
volatile unsigned char           CPSCON0             @ 0x01E;
// bit and bitfield definitions
volatile bit T0XCS               @ ((unsigned)&CPSCON0*8)+0;
volatile bit CPSOUT              @ ((unsigned)&CPSCON0*8)+1;
volatile bit CPSRNG0             @ ((unsigned)&CPSCON0*8)+2;
volatile bit CPSRNG1             @ ((unsigned)&CPSCON0*8)+3;
volatile bit CPSON               @ ((unsigned)&CPSCON0*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned T0XCS               : 1;
        volatile unsigned CPSOUT              : 1;
        volatile unsigned CPSRNG0             : 1;
        volatile unsigned CPSRNG1             : 1;
        volatile unsigned                     : 3;
        volatile unsigned CPSON               : 1;
    };
    struct {
        volatile unsigned : 2;
        volatile unsigned CPSRNG              : 2;
    };
} CPSCON0bits @ 0x01E;
#endif

// Register: CPSCON1
volatile unsigned char           CPSCON1             @ 0x01F;
// bit and bitfield definitions
volatile bit CPSCH0              @ ((unsigned)&CPSCON1*8)+0;
volatile bit CPSCH1              @ ((unsigned)&CPSCON1*8)+1;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned CPSCH0              : 1;
        volatile unsigned CPSCH1              : 1;
        volatile unsigned                     : 1;
        volatile unsigned : 1;
    };
    struct {
        volatile unsigned CPSCH               : 3;
        volatile unsigned : 1;
    };
} CPSCON1bits @ 0x01F;
#endif

//
// Special function register definitions: Bank 1
//

// Register: TRISA
// PORTA Data Direction Control Register
volatile unsigned char           TRISA               @ 0x08C;
// bit and bitfield definitions
volatile bit TRISA0              @ ((unsigned)&TRISA*8)+0;
volatile bit TRISA1              @ ((unsigned)&TRISA*8)+1;
volatile bit TRISA2              @ ((unsigned)&TRISA*8)+2;
volatile bit TRISA3              @ ((unsigned)&TRISA*8)+3;
volatile bit TRISA4              @ ((unsigned)&TRISA*8)+4;
volatile bit TRISA5              @ ((unsigned)&TRISA*8)+5;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned TRISA0              : 1;
        volatile unsigned TRISA1              : 1;
        volatile unsigned TRISA2              : 1;
        volatile unsigned TRISA3              : 1;
        volatile unsigned TRISA4              : 1;
        volatile unsigned TRISA5              : 1;
        volatile unsigned                     : 1;
        volatile unsigned : 1;
    };
    struct {
        volatile unsigned TRISA               : 6;
        volatile unsigned : 2;
    };
} TRISAbits @ 0x08C;
#endif

// Register: PIE1
// Peripheral Interrupt Enable Register 1
volatile unsigned char           PIE1                @ 0x091;
// bit and bitfield definitions
// TMR1 Overflow Interrupt Enable bit
volatile bit TMR1IE              @ ((unsigned)&PIE1*8)+0;
// TMR2 to PR2 Match Interrupt Enable bit
volatile bit TMR2IE              @ ((unsigned)&PIE1*8)+1;
// CCP1 Interrupt Enable bit
volatile bit CCP1IE              @ ((unsigned)&PIE1*8)+2;
// Master Synchronous Serial Port (MSSP) Interrupt Enable bit
volatile bit SSP1IE              @ ((unsigned)&PIE1*8)+3;
// EUSART Transmit Interrupt Enable bit
volatile bit TXIE                @ ((unsigned)&PIE1*8)+4;
// EUSART Receive Interrupt Enable bit
volatile bit RCIE                @ ((unsigned)&PIE1*8)+5;
// A/D Converter Interrupt Enable bit
volatile bit ADIE                @ ((unsigned)&PIE1*8)+6;
// Timer1 Gate Interrupt Enable bit
volatile bit TMR1GIE             @ ((unsigned)&PIE1*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned TMR1IE              : 1;
        volatile unsigned TMR2IE              : 1;
        volatile unsigned CCP1IE              : 1;
        volatile unsigned SSP1IE              : 1;
        volatile unsigned TXIE                : 1;
        volatile unsigned RCIE                : 1;
        volatile unsigned ADIE                : 1;
        volatile unsigned TMR1GIE             : 1;
    };
} PIE1bits @ 0x091;
#endif

// Register: PIE2
// Peripheral Interrupt Enable Register 2
volatile unsigned char           PIE2                @ 0x092;
// bit and bitfield definitions
// MSSP Bus Collision Interrupt Interrupt Enable bit
volatile bit BCL1IE              @ ((unsigned)&PIE2*8)+3;
// EEPROM Write Completion Interrupt Enable bit
volatile bit EEIE                @ ((unsigned)&PIE2*8)+4;
// Comparator C1 Interrupt Enable bit
volatile bit C1IE                @ ((unsigned)&PIE2*8)+5;
// CCP2 Interrupt Enable bit
volatile bit OSFIE               @ ((unsigned)&PIE2*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned                     : 1;
        volatile unsigned : 1;
        volatile unsigned : 1;
        volatile unsigned BCL1IE              : 1;
        volatile unsigned EEIE                : 1;
        volatile unsigned C1IE                : 1;
        volatile unsigned : 1;
        volatile unsigned OSFIE               : 1;
    };
} PIE2bits @ 0x092;
#endif

// Register: OPTION_REG
// Option Register
volatile unsigned char           OPTION_REG          @ 0x095;
// bit and bitfield definitions
// Prescaler Rate Select bits
volatile bit PS0                 @ ((unsigned)&OPTION_REG*8)+0;
// Prescaler Rate Select bits
volatile bit PS1                 @ ((unsigned)&OPTION_REG*8)+1;
// Prescaler Rate Select bits
volatile bit PS2                 @ ((unsigned)&OPTION_REG*8)+2;
// Prescaler Active bit
volatile bit PSA                 @ ((unsigned)&OPTION_REG*8)+3;
// TMR0 Source Edge Select bit
volatile bit T0SE                @ ((unsigned)&OPTION_REG*8)+4;
// TMR0 Clock Source Select bit
volatile bit T0CS                @ ((unsigned)&OPTION_REG*8)+5;
// Interrupt Edge Select bit
volatile bit INTEDG              @ ((unsigned)&OPTION_REG*8)+6;
// Weak Pull-up Enable bit
volatile bit nWPUEN              @ ((unsigned)&OPTION_REG*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned PS0                 : 1;
        volatile unsigned PS1                 : 1;
        volatile unsigned PS2                 : 1;
        volatile unsigned PSA                 : 1;
        volatile unsigned T0SE                : 1;
        volatile unsigned T0CS                : 1;
        volatile unsigned INTEDG              : 1;
        volatile unsigned nWPUEN              : 1;
    };
    struct {
        volatile unsigned PS                  : 3;
    };
} OPTION_REGbits @ 0x095;
#endif

// Register: PCON
// Power Control Register
volatile unsigned char           PCON                @ 0x096;
// bit and bitfield definitions
// Brown-out Reset Status bit
volatile bit nBOR                @ ((unsigned)&PCON*8)+0;
// Power-on Reset Status bit
volatile bit nPOR                @ ((unsigned)&PCON*8)+1;
// RESET Instruction Flag bit
volatile bit nRI                 @ ((unsigned)&PCON*8)+2;
// MCLR Reset Flag bit
volatile bit nRMCLR              @ ((unsigned)&PCON*8)+3;
// Stack Underflow Flag bit
volatile bit STKUNF              @ ((unsigned)&PCON*8)+6;
// Stack Overflow Flag bit
volatile bit STKOVF              @ ((unsigned)&PCON*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned nBOR                : 1;
        volatile unsigned nPOR                : 1;
        volatile unsigned nRI                 : 1;
        volatile unsigned nRMCLR              : 1;
        volatile unsigned                     : 1;
        volatile unsigned : 1;
        volatile unsigned STKUNF              : 1;
        volatile unsigned STKOVF              : 1;
    };
} PCONbits @ 0x096;
#endif

// Register: WDTCON
// Watchdog Timer Control Register
volatile unsigned char           WDTCON              @ 0x097;
// bit and bitfield definitions
// Software Enable/Disable for Watch Dog Timer bit
volatile bit SWDTEN              @ ((unsigned)&WDTCON*8)+0;
// Watchdog Timer Period Select bits
volatile bit WDTPS0              @ ((unsigned)&WDTCON*8)+1;
// Watchdog Timer Period Select bits
volatile bit WDTPS1              @ ((unsigned)&WDTCON*8)+2;
// Watchdog Timer Period Select bits
volatile bit WDTPS2              @ ((unsigned)&WDTCON*8)+3;
// Watchdog Timer Period Select bits
volatile bit WDTPS3              @ ((unsigned)&WDTCON*8)+4;
// Watchdog Timer Period Select bits
volatile bit WDTPS4              @ ((unsigned)&WDTCON*8)+5;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned SWDTEN              : 1;
        volatile unsigned WDTPS0              : 1;
        volatile unsigned WDTPS1              : 1;
        volatile unsigned WDTPS2              : 1;
        volatile unsigned WDTPS3              : 1;
        volatile unsigned WDTPS4              : 1;
    };
    struct {
        volatile unsigned                     : 1;
        volatile unsigned WDTPS               : 5;
    };
} WDTCONbits @ 0x097;
#endif

// Register: OSCTUNE
// Oscillator Tuning Register
volatile unsigned char           OSCTUNE             @ 0x098;