as16f946.h

picc

; HI-TECH Software PICC Assembler header file.
; Definitions based on C header file: pic16f946.h.

; NOTE: PICC assembler option -P is required to preprocess assembler sources. 

; Special Function Register definitions
INDF		equ	0000h
TMR0		equ	0001h
PCL		equ	0002h
STATUS		equ	0003h
FSR		equ	0004h
PORTA		equ	0005h
PORTB		equ	0006h
PORTC		equ	0007h
PORTD		equ	0008h
PORTE		equ	0009h
PCLATH		equ	000Ah
INTCON		equ	000Bh
PIR1		equ	000Ch
PIR2		equ	000Dh
TMR1L		equ	000Eh
TMR1H		equ	000Fh
T1CON		equ	0010h
TMR2		equ	0011h
T2CON		equ	0012h
SSPBUF		equ	0013h
SSPCON		equ	0014h
CCPR1L		equ	0015h
CCPR1H		equ	0016h
CCP1CON		equ	0017h
RCSTA		equ	0018h
TXREG		equ	0019h
RCREG		equ	001Ah
CCPR2L		equ	001Bh
CCPR2H		equ	001Ch
CCP2CON		equ	001Dh
ADRESH		equ	001Eh
ADCON0		equ	001Fh
OPTION_REG		equ	0081h
TRIS_REGA		equ	0085h
TRIS_REGB		equ	0086h
TRIS_REGC		equ	0087h
TRIS_REGD		equ	0088h
TRIS_REGE		equ	0089h
PIE1		equ	008Ch
PIE2		equ	008Dh
PCON		equ	008Eh
OSCCON		equ	008Fh
OSCTUNE		equ	0090h
ANSEL		equ	0091h
PR2		equ	0092h
SSPADD		equ	0093h
SSPSTAT		equ	0094h
WPUB		equ	0095h
IOCB		equ	0096h
CMCON1		equ	0097h
TXSTA		equ	0098h
SPBRG		equ	0099h
CMCON0		equ	009Ch
VRCON		equ	009Dh
ADRESL		equ	009Eh
ADCON1		equ	009Fh
WDTCON		equ	0105h
LCDCON		equ	0107h
LCDPS		equ	0108h
LVDCON		equ	0109h
EEDATL		equ	010Ch
EEDATA		equ	010Ch
EEADRL		equ	010Dh
EEADR		equ	010Dh
EEDATH		equ	010Eh
EEADRH		equ	010Fh
LCDDATA0	equ	0110h
LCDDATA1	equ	0111h
LCDDATA2	equ	0112h
LCDDATA3	equ	0113h
LCDDATA4	equ	0114h
LCDDATA5	equ	0115h
LCDDATA6	equ	0116h
LCDDATA7	equ	0117h
LCDDATA8	equ	0118h
LCDDATA9	equ	0119h
LCDDATA10	equ	011Ah
LCDDATA11	equ	011Bh
LCDSE0		equ	011Ch
LCDSE1		equ	011Dh
LCDSE2		equ	011Eh
TRIS_REGF		equ	0185h
TRIS_REGG		equ	0187h
PORTF		equ	0188h
PORTG		equ	0189h
EECON1		equ	018Ch
EECON2		equ	018Dh
LCDDATA12	equ	0190h
LCDDATA13	equ	0191h
LCDDATA14	equ	0192h
LCDDATA15	equ	0193h
LCDDATA16	equ	0194h
LCDDATA17	equ	0195h
LCDDATA18	equ	0196h
LCDDATA19	equ	0197h
LCDDATA20	equ	0198h
LCDDATA21	equ	0199h
LCDDATA22	equ	019Ah
LCDDATA23	equ	019Bh
LCDSE3		equ	019Ch
LCDSE4		equ	019Dh
LCDSE5		equ	019Eh

; Bit variables associates within SFRs
#define CARRY	STATUS,0
#define DC	STATUS,1
#define ZERO	STATUS,2
#define PD	STATUS,3
#define TO	STATUS,4
#define RP0	STATUS,5
#define RP1	STATUS,6
#define IRP	STATUS,7
#define RA0	PORTA,0
#define RA1	PORTA,1
#define RA2	PORTA,2
#define RA3	PORTA,3
#define RA4	PORTA,4
#define RA5	PORTA,5
#define RA6	PORTA,6
#define RA7	PORTA,7
#define RB0	PORTB,0
#define RB1	PORTB,1
#define RB2	PORTB,2
#define RB3	PORTB,3
#define RB4	PORTB,4
#define RB5	PORTB,5
#define RB6	PORTB,6
#define RB7	PORTB,7
#define RC0	PORTC,0
#define RC1	PORTC,1
#define RC2	PORTC,2
#define RC3	PORTC,3
#define RC4	PORTC,4
#define RC5	PORTC,5
#define RC6	PORTC,6
#define RC7	PORTC,7
#define RD0	PORTD,0
#define RD1	PORTD,1
#define RD2	PORTD,2
#define RD3	PORTD,3
#define RD4	PORTD,4
#define RD5	PORTD,5
#define RD6	PORTD,6
#define RD7	PORTD,7
#define RE0	PORTE,0
#define RE1	PORTE,1
#define RE2	PORTE,2
#define RE3	PORTE,3
#define RE4	PORTE,4
#define RE5	PORTE,5
#define RE6	PORTE,6
#define RE7	PORTE,7
#define RBIF	INTCON,0
#define RABIF	INTCON,0
#define INTF	INTCON,1
#define T0IF	INTCON,2
#define RBIE	INTCON,3
#define RABIE	INTCON,3
#define INTE	INTCON,4
#define T0IE	INTCON,5
#define PEIE	INTCON,6
#define GIE	INTCON,7
#define TMR1IF	PIR1,0
#define TMR2IF	PIR1,1
#define CCP1IF	PIR1,2
#define SSPIF	PIR1,3
#define TXIF	PIR1,4
#define RCIF	PIR1,5
#define ADIF	PIR1,6
#define EEIF	PIR1,7
#define CCP2IF	PIR2,0
#define LVDIF	PIR2,2
#define LCDIF	PIR2,4
#define C1IF	PIR2,5
#define C2IF	PIR2,6
#define OSFIF	PIR2,7
#define TMR1ON	T1CON,0
#define TMR1CS	T1CON,1
#define T1SYNC	T1CON,2
#define T1OSCEN	T1CON,3
#define T1CKPS0	T1CON,4
#define T1CKPS1	T1CON,5
#define T1GE	T1CON,6
#define T1GINV	T1CON,7
#define T2CKPS0	T2CON,0
#define T2CKPS1	T2CON,1
#define TMR2ON	T2CON,2
#define TOUTPS0	T2CON,3
#define TOUTPS1	T2CON,4
#define TOUTPS2	T2CON,5
#define TOUTPS3	T2CON,6
#define SSPM0	SSPCON,0
#define SSPM1	SSPCON,1
#define SSPM2	SSPCON,2
#define SSPM3	SSPCON,3
#define CKP	SSPCON,4
#define SSPEN	SSPCON,5
#define SSPOV	SSPCON,6
#define WCOL	SSPCON,7
#define CCP1M0	CCP1CON,0
#define CCP1M1	CCP1CON,1
#define CCP1M2	CCP1CON,2
#define CCP1M3	CCP1CON,3
#define CCP1Y	CCP1CON,4
#define CCP1X	CCP1CON,5
#define RX9D	RCSTA,0
#define OERR	RCSTA,1
#define FERR	RCSTA,2
#define ADDEN	RCSTA,3
#define CREN	RCSTA,4
#define SREN	RCSTA,5
#define RX9	RCSTA,6
#define SPEN	RCSTA,7
#define CCP2M0	CCP2CON,0
#define CCP2M1	CCP2CON,1
#define CCP2M2	CCP2CON,2
#define CCP2M3	CCP2CON,3
#define CCP2Y	CCP2CON,4
#define CCP2X	CCP2CON,5
#define ADON	ADCON0,0
#define GODONE	ADCON0,1
#define CHS0	ADCON0,2
#define CHS1	ADCON0,3
#define CHS2	ADCON0,4
#define VCFG0	ADCON0,5
#define VCFG1	ADCON0,6
#define ADFM	ADCON0,7
#define PS0	OPTION_REG,0
#define PS1	OPTION_REG,1
#define PS2	OPTION_REG,2
#define PSA	OPTION_REG,3
#define T0SE	OPTION_REG,4
#define T0CS	OPTION_REG,5
#define INTEDG	OPTION_REG,6
#define RBPU	OPTION_REG,7
#define RABPU	OPTION_REG,7
#define TRIS_REGA0	TRIS_REGA,0
#define TRIS_REGA1	TRIS_REGA,1
#define TRIS_REGA2	TRIS_REGA,2
#define TRIS_REGA3	TRIS_REGA,3
#define TRIS_REGA4	TRIS_REGA,4
#define TRIS_REGA5	TRIS_REGA,5
#define TRIS_REGA6	TRIS_REGA,6
#define TRIS_REGA7	TRIS_REGA,7
#define TRIS_REGB0	TRIS_REGB,0
#define TRIS_REGB1	TRIS_REGB,1
#define TRIS_REGB2	TRIS_REGB,2
#define TRIS_REGB3	TRIS_REGB,3
#define TRIS_REGB4	TRIS_REGB,4
#define TRIS_REGB5	TRIS_REGB,5
#define TRIS_REGB6	TRIS_REGB,6
#define TRIS_REGB7	TRIS_REGB,7
#define TRIS_REGC0	TRIS_REGC,0
#define TRIS_REGC1	TRIS_REGC,1
#define TRIS_REGC2	TRIS_REGC,2
#define TRIS_REGC3	TRIS_REGC,3
#define TRIS_REGC4	TRIS_REGC,4
#define TRIS_REGC5	TRIS_REGC,5
#define TRIS_REGC6	TRIS_REGC,6
#define TRIS_REGC7	TRIS_REGC,7
#define TRIS_REGD0	TRIS_REGD,0
#define TRIS_REGD1	TRIS_REGD,1
#define TRIS_REGD2	TRIS_REGD,2
#define TRIS_REGD3	TRIS_REGD,3
#define TRIS_REGD4	TRIS_REGD,4
#define TRIS_REGD5	TRIS_REGD,5
#define TRIS_REGD6	TRIS_REGD,6
#define TRIS_REGD7	TRIS_REGD,7
#define TRIS_REGE0	TRIS_REGE,0
#define TRIS_REGE1	TRIS_REGE,1
#define TRIS_REGE2	TRIS_REGE,2
#define TRIS_REGE3	TRIS_REGE,3
#define TRIS_REGE4	TRIS_REGE,4
#define TRIS_REGE5	TRIS_REGE,5
#define TRIS_REGE6	TRIS_REGE,6
#define TRIS_REGE7	TRIS_REGE,7
#define TMR1IE	PIE1,0
#define TMR2IE	PIE1,1
#define CCP1IE	PIE1,2
#define SSPIE	PIE1,3
#define TXIE	PIE1,4
#define RCIE	PIE1,5
#define ADIE	PIE1,6
#define EEIE	PIE1,7
#define CCP2IE	PIE2,0
#define LVDIE	PIE2,2
#define LCDIE	PIE2,4
#define C1IE	PIE2,5
#define C2IE	PIE2,6
#define OSFIE	PIE2,7
#define BOR	PCON,0
#define POR	PCON,1
#define SBOREN	PCON,4
#define SCS	OSCCON,0
#define LTS	OSCCON,1
#define HTS	OSCCON,2
#define OSTS	OSCCON,3
#define IRCF0	OSCCON,4
#define IRCF1	OSCCON,5
#define IRCF2	OSCCON,6
#define TUN0	OSCTUNE,0
#define TUN1	OSCTUNE,1
#define TUN2	OSCTUNE,2
#define TUN3	OSCTUNE,3
#define TUN4	OSCTUNE,4
#define ANS0	ANSEL,0
#define ANS1	ANSEL,1
#define ANS2	ANSEL,2
#define ANS3	ANSEL,3
#define ANS4	ANSEL,4
#define ANS5	ANSEL,5
#define ANS6	ANSEL,6
#define ANS7	ANSEL,7
#define BF	SSPSTAT,0
#define UA	SSPSTAT,1