📄 pic12lf1840.h
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//
// Special function register definitions: Bank 4
//
// Register: WPUA
volatile unsigned char WPUA @ 0x20C;
// bit and bitfield definitions
volatile bit WPUA0 @ ((unsigned)&WPUA*8)+0;
volatile bit WPUA1 @ ((unsigned)&WPUA*8)+1;
volatile bit WPUA2 @ ((unsigned)&WPUA*8)+2;
volatile bit WPUA3 @ ((unsigned)&WPUA*8)+3;
volatile bit WPUA4 @ ((unsigned)&WPUA*8)+4;
volatile bit WPUA5 @ ((unsigned)&WPUA*8)+5;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned WPUA0 : 1;
unsigned WPUA1 : 1;
unsigned WPUA2 : 1;
unsigned WPUA3 : 1;
unsigned WPUA4 : 1;
unsigned WPUA5 : 1;
};
struct {
unsigned WPUA : 6;
unsigned : 2;
};
} WPUAbits @ 0x20C;
#endif
// Register: SSP1BUF
volatile unsigned char SSP1BUF @ 0x211;
volatile unsigned char SSPBUF @ 0x211;
// bit and bitfield definitions
// Register: SSP1ADD
volatile unsigned char SSP1ADD @ 0x212;
volatile unsigned char SSPADD @ 0x212;
// bit and bitfield definitions
// Register: SSP1MSK
volatile unsigned char SSP1MSK @ 0x213;
volatile unsigned char SSPMSK @ 0x213;
// bit and bitfield definitions
// Register: SSP1STAT
volatile unsigned char SSP1STAT @ 0x214;
volatile unsigned char SSPSTAT @ 0x214;
// bit and bitfield definitions
volatile bit BF @ ((unsigned)&SSP1STAT*8)+0;
volatile bit UA @ ((unsigned)&SSP1STAT*8)+1;
volatile bit R_nW @ ((unsigned)&SSP1STAT*8)+2;
volatile bit S @ ((unsigned)&SSP1STAT*8)+3;
volatile bit P @ ((unsigned)&SSP1STAT*8)+4;
volatile bit D_nA @ ((unsigned)&SSP1STAT*8)+5;
volatile bit CKE @ ((unsigned)&SSP1STAT*8)+6;
volatile bit SMP @ ((unsigned)&SSP1STAT*8)+7;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned BF : 1;
unsigned UA : 1;
unsigned R_nW : 1;
unsigned S : 1;
unsigned P : 1;
unsigned D_nA : 1;
unsigned CKE : 1;
unsigned SMP : 1;
};
} SSP1STATbits @ 0x214;
#endif
// Register: SSP1CON1
volatile unsigned char SSP1CON1 @ 0x215;
volatile unsigned char SSPCON1 @ 0x215;
volatile unsigned char SSPCON @ 0x215;
// bit and bitfield definitions
volatile bit SSPM0 @ ((unsigned)&SSP1CON1*8)+0;
volatile bit SSPM1 @ ((unsigned)&SSP1CON1*8)+1;
volatile bit SSPM2 @ ((unsigned)&SSP1CON1*8)+2;
volatile bit SSPM3 @ ((unsigned)&SSP1CON1*8)+3;
volatile bit CKP @ ((unsigned)&SSP1CON1*8)+4;
volatile bit SSPEN @ ((unsigned)&SSP1CON1*8)+5;
volatile bit SSPOV @ ((unsigned)&SSP1CON1*8)+6;
volatile bit WCOL @ ((unsigned)&SSP1CON1*8)+7;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned SSPM0 : 1;
unsigned SSPM1 : 1;
unsigned SSPM2 : 1;
unsigned SSPM3 : 1;
unsigned CKP : 1;
unsigned SSPEN : 1;
unsigned SSPOV : 1;
unsigned WCOL : 1;
};
struct {
unsigned SSPM : 4;
};
} SSP1CON1bits @ 0x215;
#endif
// Register: SSP1CON2
volatile unsigned char SSP1CON2 @ 0x216;
volatile unsigned char SSPCON2 @ 0x216;
// bit and bitfield definitions
volatile bit SEN @ ((unsigned)&SSP1CON2*8)+0;
volatile bit RSEN @ ((unsigned)&SSP1CON2*8)+1;
volatile bit PEN @ ((unsigned)&SSP1CON2*8)+2;
volatile bit RCEN @ ((unsigned)&SSP1CON2*8)+3;
volatile bit ACKEN @ ((unsigned)&SSP1CON2*8)+4;
volatile bit ACKDT @ ((unsigned)&SSP1CON2*8)+5;
volatile bit ACKSTAT @ ((unsigned)&SSP1CON2*8)+6;
volatile bit GCEN @ ((unsigned)&SSP1CON2*8)+7;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned SEN : 1;
unsigned RSEN : 1;
unsigned PEN : 1;
unsigned RCEN : 1;
unsigned ACKEN : 1;
unsigned ACKDT : 1;
unsigned ACKSTAT : 1;
unsigned GCEN : 1;
};
} SSP1CON2bits @ 0x216;
#endif
// Register: SSP1CON3
volatile unsigned char SSP1CON3 @ 0x217;
volatile unsigned char SSPCON3 @ 0x217;
// bit and bitfield definitions
volatile bit DHEN @ ((unsigned)&SSP1CON3*8)+0;
volatile bit AHEN @ ((unsigned)&SSP1CON3*8)+1;
volatile bit SBCDE @ ((unsigned)&SSP1CON3*8)+2;
volatile bit SDAHT @ ((unsigned)&SSP1CON3*8)+3;
volatile bit BOEN @ ((unsigned)&SSP1CON3*8)+4;
volatile bit SCIE @ ((unsigned)&SSP1CON3*8)+5;
volatile bit PCIE @ ((unsigned)&SSP1CON3*8)+6;
volatile bit ACKTIM @ ((unsigned)&SSP1CON3*8)+7;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned DHEN : 1;
unsigned AHEN : 1;
unsigned SBCDE : 1;
unsigned SDAHT : 1;
unsigned BOEN : 1;
unsigned SCIE : 1;
unsigned PCIE : 1;
unsigned ACKTIM : 1;
};
} SSP1CON3bits @ 0x217;
#endif
//
// Special function register definitions: Bank 5
//
// Register: CCPR1L
volatile unsigned char CCPR1L @ 0x291;
// bit and bitfield definitions
// Register: CCPR1H
volatile unsigned char CCPR1H @ 0x292;
// bit and bitfield definitions
// Register: CCP1CON
volatile unsigned char CCP1CON @ 0x293;
// bit and bitfield definitions
volatile bit CCP1M0 @ ((unsigned)&CCP1CON*8)+0;
volatile bit CCP1M1 @ ((unsigned)&CCP1CON*8)+1;
volatile bit CCP1M2 @ ((unsigned)&CCP1CON*8)+2;
volatile bit CCP1M3 @ ((unsigned)&CCP1CON*8)+3;
volatile bit DC1B0 @ ((unsigned)&CCP1CON*8)+4;
volatile bit DC1B1 @ ((unsigned)&CCP1CON*8)+5;
volatile bit P1M0 @ ((unsigned)&CCP1CON*8)+6;
volatile bit P1M1 @ ((unsigned)&CCP1CON*8)+7;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned CCP1M0 : 1;
unsigned CCP1M1 : 1;
unsigned CCP1M2 : 1;
unsigned CCP1M3 : 1;
unsigned DC1B0 : 1;
unsigned DC1B1 : 1;
unsigned P1M0 : 1;
unsigned P1M1 : 1;
};
struct {
unsigned CCP1M : 4;
unsigned DC1B : 2;
unsigned P1M : 2;
};
} CCP1CONbits @ 0x293;
#endif
// Register: PWM1CON
volatile unsigned char PWM1CON @ 0x294;
// bit and bitfield definitions
volatile bit P1DC0 @ ((unsigned)&PWM1CON*8)+0;
volatile bit P1DC1 @ ((unsigned)&PWM1CON*8)+1;
volatile bit P1DC2 @ ((unsigned)&PWM1CON*8)+2;
volatile bit P1DC3 @ ((unsigned)&PWM1CON*8)+3;
volatile bit P1DC4 @ ((unsigned)&PWM1CON*8)+4;
volatile bit P1DC5 @ ((unsigned)&PWM1CON*8)+5;
volatile bit P1DC6 @ ((unsigned)&PWM1CON*8)+6;
volatile bit P1RSEN @ ((unsigned)&PWM1CON*8)+7;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned P1DC0 : 1;
unsigned P1DC1 : 1;
unsigned P1DC2 : 1;
unsigned P1DC3 : 1;
unsigned P1DC4 : 1;
unsigned P1DC5 : 1;
unsigned P1DC6 : 1;
unsigned P1RSEN : 1;
};
struct {
unsigned P1DC : 7;
};
} PWM1CONbits @ 0x294;
#endif
// Register: CCP1AS
volatile unsigned char CCP1AS @ 0x295;
volatile unsigned char ECCP1AS @ 0x295;
// bit and bitfield definitions
volatile bit PSS1BD0 @ ((unsigned)&CCP1AS*8)+0;
volatile bit PSS1BD1 @ ((unsigned)&CCP1AS*8)+1;
volatile bit PSS1AC0 @ ((unsigned)&CCP1AS*8)+2;
volatile bit PSS1AC1 @ ((unsigned)&CCP1AS*8)+3;
volatile bit CCP1AS0 @ ((unsigned)&CCP1AS*8)+4;
volatile bit CCP1AS1 @ ((unsigned)&CCP1AS*8)+5;
volatile bit CCP1AS2 @ ((unsigned)&CCP1AS*8)+6;
volatile bit CCP1ASE @ ((unsigned)&CCP1AS*8)+7;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned PSS1BD0 : 1;
unsigned PSS1BD1 : 1;
unsigned PSS1AC0 : 1;
unsigned PSS1AC1 : 1;
unsigned CCP1AS0 : 1;
unsigned CCP1AS1 : 1;
unsigned CCP1AS2 : 1;
unsigned CCP1ASE : 1;
};
struct {
unsigned PSS1BD : 2;
unsigned PSS1AC : 2;
unsigned CCP1AS : 3;
};
} CCP1ASbits @ 0x295;
#endif
// Register: PSTR1CON
volatile unsigned char PSTR1CON @ 0x296;
// bit and bitfield definitions
volatile bit STR1A @ ((unsigned)&PSTR1CON*8)+0;
volatile bit STR1B @ ((unsigned)&PSTR1CON*8)+1;
volatile bit STR1C @ ((unsigned)&PSTR1CON*8)+2;
volatile bit STR1D @ ((unsigned)&PSTR1CON*8)+3;
volatile bit STR1SYNC @ ((unsigned)&PSTR1CON*8)+4;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned STR1A : 1;
unsigned STR1B : 1;
unsigned STR1C : 1;
unsigned STR1D : 1;
unsigned STR1SYNC : 1;
};
} PSTR1CONbits @ 0x296;
#endif
//
// Special function register definitions: Bank 7
//
// Register: IOCAP
// Interrupt-On-Change Positive Edge Register
volatile unsigned char IOCAP @ 0x391;
// bit and bitfield definitions
volatile bit IOCAP0 @ ((unsigned)&IOCAP*8)+0;
volatile bit IOCAP1 @ ((unsigned)&IOCAP*8)+1;
volatile bit IOCAP2 @ ((unsigned)&IOCAP*8)+2;
volatile bit IOCAP3 @ ((unsigned)&IOCAP*8)+3;
volatile bit IOCAP4 @ ((unsigned)&IOCAP*8)+4;
volatile bit IOCAP5 @ ((unsigned)&IOCAP*8)+5;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned IOCAP0 : 1;
unsigned IOCAP1 : 1;
unsigned IOCAP2 : 1;
unsigned IOCAP3 : 1;
unsigned IOCAP4 : 1;
unsigned IOCAP5 : 1;
unsigned : 1;
unsigned : 1;
};
struct {
unsigned IOCAP : 6;
unsigned : 2;
};
} IOCAPbits @ 0x391;
#endif
// Register: IOCAN
// Interrupt-On-Change Negative Edge Register
volatile unsigned char IOCAN @ 0x392;
// bit and bitfield definitions
volatile bit IOCAN0 @ ((unsigned)&IOCAN*8)+0;
volatile bit IOCAN1 @ ((unsigned)&IOCAN*8)+1;
volatile bit IOCAN2 @ ((unsigned)&IOCAN*8)+2;
volatile bit IOCAN3 @ ((unsigned)&IOCAN*8)+3;
volatile bit IOCAN4 @ ((unsigned)&IOCAN*8)+4;
volatile bit IOCAN5 @ ((unsigned)&IOCAN*8)+5;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned IOCAN0 : 1;
unsigned IOCAN1 : 1;
unsigned IOCAN2 : 1;
unsigned IOCAN3 : 1;
unsigned IOCAN4 : 1;
unsigned IOCAN5 : 1;
unsigned : 1;
unsigned : 1;
};
struct {
unsigned IOCAN : 6;
unsigned : 2;
};
} IOCANbits @ 0x392;
#endif
// Register: IOCAF
// Interrupt-On-Change Flag Register
volatile unsigned char IOCAF @ 0x393;
// bit and bitfield definitions
volatile bit IOCAF0 @ ((unsigned)&IOCAF*8)+0;
volatile bit IOCAF1 @ ((unsigned)&IOCAF*8)+1;
volatile bit IOCAF2 @ ((unsigned)&IOCAF*8)+2;
volatile bit IOCAF3 @ ((unsigned)&IOCAF*8)+3;
volatile bit IOCAF4 @ ((unsigned)&IOCAF*8)+4;
volatile bit IOCAF5 @ ((unsigned)&IOCAF*8)+5;
#ifndef _LIB_BUILD
volatile union {
struct {
unsigned IOCAF0 : 1;
unsigned IOCAF1 : 1;
unsigned IOCAF2 : 1;
unsigned IOCAF3 : ⌨️ 快捷键说明
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