pic16f505.h

picc

//
// Register Declarations for Microchip 16F505 Processor
//
//
// This header file was automatically generated by:
//
//	inc2h.pl V1.6
//
//	Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
//
//	SDCC is licensed under the GNU Public license (GPL) v2.  Note that
//	this license covers the code to the compiler and other executables,
//	but explicitly does not cover any code or objects generated by sdcc.
//	We have not yet decided on a license for the run time libraries, but
//	it will not put any requirements on code linked against it. See:
// 
//	http://www.gnu.org/copyleft/gpl/html
//
//	See http://sdcc.sourceforge.net/ for the latest information on sdcc.
//
// 
#ifndef P16F505_H
#define P16F505_H

//
// Register addresses.
//
#define INDF_ADDR	0x0000
#define TMR0_ADDR	0x0001
#define PCL_ADDR	0x0002
#define STATUS_ADDR	0x0003
#define FSR_ADDR	0x0004
#define OSCCAL_ADDR	0x0005
#define PORTB_ADDR	0x0006
#define PORTC_ADDR	0x0007
#define OPTION_REG_ADDR	0x0081

//
// Memory organization.
//

#pragma memmap INDF_ADDR INDF_ADDR SFR 0x000	// INDF
#pragma memmap TMR0_ADDR TMR0_ADDR SFR 0x000	// TMR0
#pragma memmap PCL_ADDR PCL_ADDR SFR 0x000	// PCL
#pragma memmap STATUS_ADDR STATUS_ADDR SFR 0x000	// STATUS
#pragma memmap FSR_ADDR FSR_ADDR SFR 0x000	// FSR
#pragma memmap OSCCAL_ADDR OSCCAL_ADDR SFR 0x000	// OSCCAL
#pragma memmap PORTB_ADDR PORTB_ADDR SFR 0x000	// PORTB
#pragma memmap PORTC_ADDR PORTC_ADDR SFR 0x000	// PORTC
#pragma memmap OPTION_REG_ADDR OPTION_REG_ADDR SFR 0x000	// OPTION_REG


// 	LIST
// P16F505.INC  Standard Header File, Version 1.10    Microchip Technology, Inc.
// 	NOLIST

// This header file defines configurations, registers, and other useful bits of
// information for the PIC16F505 microcontroller.  These names are taken to match 
// the data sheets as closely as possible.  

// Note that the processor must be selected before this file is 
// included.  The processor may be selected the following ways:

//       1. Command line switch:
//               C:\ MPASM MYFILE.ASM /P16F505
//       2. LIST directive in the source file
//               LIST   P=16F505
//       3. Processor Type entry in the MPASM full-screen interface

//==========================================================================
//
//	   Revision History
//
//==========================================================================

//Rev:   Date:    Reason:

//1.00   12/09/03  Initial Release
//1.01	04/14/04  Update for EC osc mode


//==========================================================================
//
//       Verify Processor
//
//==========================================================================

//        IFNDEF __16F505
//            MESSG "Processor-header file mismatch.  Verify selected processor."
//         ENDIF

//==========================================================================
//
//       Register Definitions
//
//==========================================================================

#define W                    0x0000
#define F                    0x0001

//----- Register Files -----------------------------------------------------

extern __data __at (INDF_ADDR) volatile char      INDF;
extern __sfr  __at (TMR0_ADDR)                    TMR0;
extern __data __at (PCL_ADDR) volatile char       PCL;
extern __sfr  __at (STATUS_ADDR)                  STATUS;
extern __sfr  __at (FSR_ADDR)                     FSR;
extern __sfr  __at (OSCCAL_ADDR)                  OSCCAL;
extern __sfr  __at (PORTB_ADDR)                   PORTB;
extern __sfr  __at (PORTC_ADDR)                   PORTC;
extern __sfr  __at (OPTION_REG_ADDR)              OPTION_REG; // not verified

//----- STATUS Bits --------------------------------------------------------


//----- OPTION Bits --------------------------------------------------------


//----- OSCCAL Bits --------------------------------------------------------


//==========================================================================
//
//       RAM Definition
//
//==========================================================================

//         __MAXRAM H'7F'

//==========================================================================
//
//       Configuration Bits
//
//==========================================================================

#define _MCLRE_ON            0x0FFF
#define _MCLRE_OFF           0x0FDF
#define _CP_ON               0x002F
#define _CP_OFF              0x0FFF
#define _WDT_ON              0x0FFF
#define _WDT_OFF             0x0FF7
#define _LP_OSC              0x0FF8
#define _XT_OSC              0x0FF9
#define _HS_OSC              0x0FFA
#define _EC_RB4EN            0x0FFB	
#define _IntRC_OSC_RB4EN     0x0FFC
#define _IntRC_OSC_CLKOUTEN  0x0FFD
#define _ExtRC_OSC_RB4EN     0x0FFE
#define _ExtRC_OSC_CLKOUTEN  0x0FFF

// 	LIST

// ----- OPTION_REG bits --------------------
typedef union {
  struct {
    unsigned char PS0:1;
    unsigned char PS1:1;
    unsigned char PS2:1;
    unsigned char PSA:1;
    unsigned char T0SE:1;
    unsigned char T0CS:1;
    unsigned char NOT_RBPU:1;
    unsigned char NOT_RBWU:1;
  };
} __OPTION_REG_bits_t;
extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;

#define PS0                  OPTION_REG_bits.PS0
#define PS1                  OPTION_REG_bits.PS1
#define PS2                  OPTION_REG_bits.PS2
#define PSA                  OPTION_REG_bits.PSA
#define T0SE                 OPTION_REG_bits.T0SE
#define T0CS                 OPTION_REG_bits.T0CS
#define NOT_RBPU             OPTION_REG_bits.NOT_RBPU
#define NOT_RBWU             OPTION_REG_bits.NOT_RBWU

// ----- OSCCAL bits --------------------
typedef union {
  struct {
    unsigned char :1;
    unsigned char CAL0:1;
    unsigned char CAL1:1;
    unsigned char CAL2:1;
    unsigned char CAL3:1;
    unsigned char CAL4:1;
    unsigned char CAL5:1;
    unsigned char CAL6:1;
  };
} __OSCCAL_bits_t;
extern volatile __OSCCAL_bits_t __at(OSCCAL_ADDR) OSCCAL_bits;

#define CAL0                 OSCCAL_bits.CAL0
#define CAL1                 OSCCAL_bits.CAL1
#define CAL2                 OSCCAL_bits.CAL2
#define CAL3                 OSCCAL_bits.CAL3
#define CAL4                 OSCCAL_bits.CAL4
#define CAL5                 OSCCAL_bits.CAL5
#define CAL6                 OSCCAL_bits.CAL6

// ----- STATUS bits --------------------
typedef union {
  struct {
    unsigned char C:1;
    unsigned char DC:1;
    unsigned char Z:1;
    unsigned char NOT_PD:1;
    unsigned char NOT_TO:1;
    unsigned char PA0:1;
    unsigned char :1;
    unsigned char RBWUF:1;
  };
} __STATUS_bits_t;
extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;

#define C                    STATUS_bits.C
#define DC                   STATUS_bits.DC
#define Z                    STATUS_bits.Z
#define NOT_PD               STATUS_bits.NOT_PD
#define NOT_TO               STATUS_bits.NOT_TO
#define PA0                  STATUS_bits.PA0
#define RBWUF                STATUS_bits.RBWUF

#endif