cas16f707.h

picc

; HI-TECH Software PICC Assembler header file.
; Definitions based on C header file: pic16f707.h.

; NOTE: PICC assembler option -P is required to preprocess assembler sources. 

; Special Function Register definitions
INDF		equ	0000h
TMR0		equ	0001h
PCL		equ	0002h
STATUS		equ	0003h
FSR		equ	0004h
PORTA		equ	0005h
PORTB		equ	0006h
PORTC		equ	0007h
PORTD		equ	0008h
PORTE		equ	0009h
PCLATH		equ	000Ah
INTCON		equ	000Bh
PIR1		equ	000Ch
PIR2		equ	000Dh
TMR1L		equ	000Eh
TMR1H		equ	000Fh
T1CON		equ	0010h
TMR2		equ	0011h
T2CON		equ	0012h
SSPBUF		equ	0013h
SSPCON		equ	0014h
CCPR1L		equ	0015h
CCPR1H		equ	0016h
CCP1CON		equ	0017h
RCSTA		equ	0018h
TXREG		equ	0019h
RCREG		equ	001Ah
CCPR2L		equ	001Bh
CCPR2H		equ	001Ch
CCP2CON		equ	001Dh
ADRES		equ	001Eh
ADCON0		equ	001Fh
OPTION_REG_REG	equ	0081h
TRIS_REGA		equ	0085h
TRIS_REGB		equ	0086h
TRIS_REGC		equ	0087h
TRIS_REGD		equ	0088h
TRIS_REGE		equ	0089h
PIE1		equ	008Ch
PIE2		equ	008Dh
PCON		equ	008Eh
T1GCON		equ	008Fh
OSCCON		equ	0090h
OSCTUNE		equ	0091h
PR2		equ	0092h
SSPADD		equ	0093h
SSPSTAT		equ	0094h
WPUB		equ	0095h
IOCB		equ	0096h
T3CON		equ	0097h
TXSTA		equ	0098h
SPBRG		equ	0099h
TMR3L		equ	009Ah
TMR3H		equ	009Bh
APFCON		equ	009Ch
FVRCON		equ	009Dh
T3GCON		equ	009Eh
ADCON1		equ	009Fh
TACON		equ	0105h
CPSBCON0	equ	0106h
CPSBCON1	equ	0107h
CPSACON0	equ	0108h
CPSACON1	equ	0109h
PMDATL		equ	010Ch
PMADRL		equ	010Dh
PMDATH		equ	010Eh
PMADRH		equ	010Fh
TMRA		equ	0110h
TBCON		equ	0111h
TMRB		equ	0112h
DACCON0		equ	0113h
DACCON1		equ	0114h
ANSELA		equ	0185h
ANSELB		equ	0186h
ANSELC		equ	0187h
ANSELD		equ	0188h
ANSELE		equ	0189h
PMCON1		equ	018Ch

; Bit variables associates within SFRs
#define CARRY_bit	STATUS,0
#define DC_bit	STATUS,1
#define ZERO_bit	STATUS,2
#define nPD_bit	STATUS,3
#define nTO_bit	STATUS,4
#define IRP_bit	STATUS,7
#define RP0_bit	STATUS,5
#define RP1_bit	STATUS,6
#define RA0_bit	PORTA,0
#define RA1_bit	PORTA,1
#define RA2_bit	PORTA,2
#define RA3_bit	PORTA,3
#define RA4_bit	PORTA,4
#define RA5_bit	PORTA,5
#define RA6_bit	PORTA,6
#define RA7_bit	PORTA,7
#define RB0_bit	PORTB,0
#define RB1_bit	PORTB,1
#define RB2_bit	PORTB,2
#define RB3_bit	PORTB,3
#define RB4_bit	PORTB,4
#define RB5_bit	PORTB,5
#define RB6_bit	PORTB,6
#define RB7_bit	PORTB,7
#define RC0_bit	PORTC,0
#define RC1_bit	PORTC,1
#define RC2_bit	PORTC,2
#define RC3_bit	PORTC,3
#define RC4_bit	PORTC,4
#define RC5_bit	PORTC,5
#define RC6_bit	PORTC,6
#define RC7_bit	PORTC,7
#define RD0_bit	PORTD,0
#define RD1_bit	PORTD,1
#define RD2_bit	PORTD,2
#define RD3_bit	PORTD,3
#define RD4_bit	PORTD,4
#define RD5_bit	PORTD,5
#define RD6_bit	PORTD,6
#define RD7_bit	PORTD,7
#define RE0_bit	PORTE,0
#define RE1_bit	PORTE,1
#define RE2_bit	PORTE,2
#define RE3_bit	PORTE,3
#define RBIF_bit	INTCON,0
#define INTF_bit	INTCON,1
#define TMR0IF_bit	INTCON,2
#define RBIE_bit	INTCON,3
#define INTE_bit	INTCON,4
#define TMR0IE_bit	INTCON,5
#define PEIE_bit	INTCON,6
#define GIE_bit	INTCON,7
#define TMR1IF_bit	PIR1,0
#define TMR2IF_bit	PIR1,1
#define CCP1IF_bit	PIR1,2
#define SSPIF_bit	PIR1,3
#define TXIF_bit	PIR1,4
#define RCIF_bit	PIR1,5
#define ADIF_bit	PIR1,6
#define TMR1GIF_bit	PIR1,7
#define CCP2IF_bit	PIR2,0
#define TMRAIF_bit	PIR2,4
#define TMRBIF_bit	PIR2,5
#define TMR3IF_bit	PIR2,6
#define TMR3GIF_bit	PIR2,7
#define TMR1ON_bit	T1CON,0
#define T1SYNC_bit	T1CON,2
#define T1OSCEN_bit	T1CON,3
#define T1CKPS0_bit	T1CON,4
#define T1CKPS1_bit	T1CON,5
#define TMRCS0_bit	T1CON,6
#define TMRCS1_bit	T1CON,7
#define TMR2ON_bit	T2CON,2
#define T2CKPS0_bit	T2CON,0
#define T2CKPS1_bit	T2CON,1
#define TOUTPS0_bit	T2CON,3
#define TOUTPS1_bit	T2CON,4
#define TOUTPS2_bit	T2CON,5
#define TOUTPS3_bit	T2CON,6
#define CKP_bit	SSPCON,4
#define SSPEN_bit	SSPCON,5
#define SSPOV_bit	SSPCON,6
#define WCOL_bit	SSPCON,7
#define SSPM0_bit	SSPCON,0
#define SSPM1_bit	SSPCON,1
#define SSPM2_bit	SSPCON,2
#define SSPM3_bit	SSPCON,3
#define CCP1M0_bit	CCP1CON,0
#define CCP1M1_bit	CCP1CON,1
#define CCP1M2_bit	CCP1CON,2
#define CCP1M3_bit	CCP1CON,3
#define DC1B0_bit	CCP1CON,4
#define DC1B1_bit	CCP1CON,5
#define RX9D_bit	RCSTA,0
#define OERR_bit	RCSTA,1
#define FERR_bit	RCSTA,2
#define ADDEN_bit	RCSTA,3
#define CREN_bit	RCSTA,4
#define SREN_bit	RCSTA,5
#define RX9_bit	RCSTA,6
#define SPEN_bit	RCSTA,7
#define CCP2M0_bit	CCP2CON,0
#define CCP2M1_bit	CCP2CON,1
#define CCP2M2_bit	CCP2CON,2
#define CCP2M3_bit	CCP2CON,3
#define DC2B0_bit	CCP2CON,4
#define DC2B1_bit	CCP2CON,5
#define CHS0_bit	ADCON0,2
#define CHS1_bit	ADCON0,3
#define CHS2_bit	ADCON0,4
#define CHS3_bit	ADCON0,5
#define PSA_bit	OPTION_REG_REG,3
#define T0SE_bit	OPTION_REG_REG,4
#define T0CS_bit	OPTION_REG_REG,5
#define INTEDG_bit	OPTION_REG_REG,6
#define nRBPU_bit	OPTION_REG_REG,7
#define PS0_bit	OPTION_REG_REG,0
#define PS1_bit	OPTION_REG_REG,1
#define PS2_bit	OPTION_REG_REG,2
#define TRIS_REGA0_bit	TRIS_REGA,0
#define TRIS_REGA1_bit	TRIS_REGA,1
#define TRIS_REGA2_bit	TRIS_REGA,2
#define TRIS_REGA3_bit	TRIS_REGA,3
#define TRIS_REGA4_bit	TRIS_REGA,4
#define TRIS_REGA5_bit	TRIS_REGA,5
#define TRIS_REGA6_bit	TRIS_REGA,6
#define TRIS_REGA7_bit	TRIS_REGA,7
#define TRIS_REGB0_bit	TRIS_REGB,0
#define TRIS_REGB1_bit	TRIS_REGB,1
#define TRIS_REGB2_bit	TRIS_REGB,2
#define TRIS_REGB3_bit	TRIS_REGB,3
#define TRIS_REGB4_bit	TRIS_REGB,4
#define TRIS_REGB5_bit	TRIS_REGB,5
#define TRIS_REGB6_bit	TRIS_REGB,6
#define TRIS_REGB7_bit	TRIS_REGB,7
#define TRIS_REGC0_bit	TRIS_REGC,0
#define TRIS_REGC1_bit	TRIS_REGC,1
#define TRIS_REGC2_bit	TRIS_REGC,2
#define TRIS_REGC3_bit	TRIS_REGC,3
#define TRIS_REGC4_bit	TRIS_REGC,4
#define TRIS_REGC5_bit	TRIS_REGC,5
#define TRIS_REGC6_bit	TRIS_REGC,6
#define TRIS_REGC7_bit	TRIS_REGC,7
#define TRIS_REGD0_bit	TRIS_REGD,0
#define TRIS_REGD1_bit	TRIS_REGD,1
#define TRIS_REGD2_bit	TRIS_REGD,2
#define TRIS_REGD3_bit	TRIS_REGD,3
#define TRIS_REGD4_bit	TRIS_REGD,4
#define TRIS_REGD5_bit	TRIS_REGD,5
#define TRIS_REGD6_bit	TRIS_REGD,6
#define TRIS_REGD7_bit	TRIS_REGD,7
#define TRIS_REGE0_bit	TRIS_REGE,0
#define TRIS_REGE1_bit	TRIS_REGE,1
#define TRIS_REGE2_bit	TRIS_REGE,2
#define TRIS_REGE3_bit	TRIS_REGE,3
#define TMR1IE_bit	PIE1,0
#define TMR2IE_bit	PIE1,1
#define CCP1IE_bit	PIE1,2
#define SSPIE_bit	PIE1,3
#define TXIE_bit	PIE1,4
#define RCIE_bit	PIE1,5
#define ADIE_bit	PIE1,6
#define TMR1GIE_bit	PIE1,7
#define CCP2IE_bit	PIE2,0
#define TMRAIE_bit	PIE2,4
#define TMRBIE_bit	PIE2,5
#define TMR3IE_bit	PIE2,6
#define TMR3GIE_bit	PIE2,7
#define nBOR_bit	PCON,0
#define nPOR_bit	PCON,1
#define T1GSPM_bit	T1GCON,4
#define T1G1SE_bit	T1GCON,4
#define T1GSS0_bit	T1GCON,0
#define T1GSS1_bit	T1GCON,1
#define ICSS_bit	OSCCON,2
#define ICSL_bit	OSCCON,3
#define IRCF0_bit	OSCCON,4
#define IRCF1_bit	OSCCON,5
#define TMR3ON_bit	T3CON,0
#define T3SYNC_bit	T3CON,2
#define T3CKPS0_bit	T3CON,4
#define T3CKPS1_bit	T3CON,5
#define TMR3CS0_bit	T3CON,6
#define TMR2CS1_bit	T3CON,7
#define TX9D_bit	TXSTA,0
#define TRMT_bit	TXSTA,1
#define BRGH_bit	TXSTA,2
#define SYNC_bit	TXSTA,4
#define TXEN_bit	TXSTA,5
#define TX9_bit	TXSTA,6
#define CSRC_bit	TXSTA,7
#define CCP2SEL_bit	APFCON,0
#define SSSEL_bit	APFCON,1
#define TSRNG_bit	FVRCON,4
#define TSEN_bit	FVRCON,5
#define FVREN_bit	FVRCON,6
#define FVRRDY_bit	FVRCON,7
#define ADFVR0_bit	FVRCON,0
#define ADFVR1_bit	FVRCON,1
#define CDAFVR0_bit	FVRCON,2
#define CDAFVR1_bit	FVRCON,3
#define T3GSPM_bit	T3GCON,4
#define T3G3SE_bit	T3GCON,4
#define T3GSS0_bit	T3GCON,0
#define T3GSS1_bit	T3GCON,1
#define ADREF0_bit	ADCON1,0
#define ADREF1_bit	ADCON1,1
#define ADCS0_bit	ADCON1,4
#define ADCS1_bit	ADCON1,5
#define ADCS2_bit	ADCON1,6
#define TAPSA_bit	TACON,3
#define TASE_bit	TACON,4
#define TACS_bit	TACON,5
#define TMRAON_bit	TACON,7
#define TAPS0_bit	TACON,0
#define TAPS1_bit	TACON,1
#define TAPS2_bit	TACON,2
#define TBXCS_bit	CPSBCON0,0
#define CPBSOUT_bit	CPSBCON0,1
#define CPSBRM_bit	CPSBCON0,6
#define CPSBON_bit	CPSBCON0,7
#define CPSBRNG0_bit	CPSBCON0,2
#define CPSBRNG1_bit	CPSBCON0,3
#define CPSBCH0_bit	CPSBCON1,0
#define CPSBCH1_bit	CPSBCON1,1
#define CPSBCH2_bit	CPSBCON1,2
#define CPSBCH3_bit	CPSBCON1,3
#define TAXCS_bit	CPSACON0,0
#define CPSAOUT_bit	CPSACON0,1
#define CPSARM_bit	CPSACON0,6
#define CPSAON_bit	CPSACON0,7
#define CPSARNG0_bit	CPSACON0,2
#define CPSARNG1_bit	CPSACON0,3
#define CPSACH0_bit	CPSACON1,0
#define CPSACH1_bit	CPSACON1,1
#define CPSACH2_bit	CPSACON1,2
#define CPSACH3_bit	CPSACON1,3
#define TBPSA_bit	TBCON,3
#define TBSE_bit	TBCON,4
#define TBCS_bit	TBCON,5
#define TMRBON_bit	TBCON,7
#define TBPS0_bit	TBCON,0
#define TBPS1_bit	TBCON,1
#define TBPS2_bit	TBCON,2
#define DACOE_bit	DACCON0,5
#define DACLPS_bit	DACCON0,6
#define DACEN_bit	DACCON0,7
#define DACPSS0_bit	DACCON0,2
#define DACPSS1_bit	DACCON0,3
#define DACR0_bit	DACCON1,0
#define DACR1_bit	DACCON1,1
#define DACR2_bit	DACCON1,2
#define DACR3_bit	DACCON1,3
#define DACR4_bit	DACCON1,4
#define ANSA0_bit	ANSELA,0
#define ANSA1_bit	ANSELA,1
#define ANSA2_bit	ANSELA,2
#define ANSA3_bit	ANSELA,3
#define ANSA4_bit	ANSELA,4
#define ANSA5_bit	ANSELA,5
#define ANSA6_bit	ANSELA,6
#define ANSA7_bit	ANSELA,7
#define ANSB0_bit	ANSELB,0
#define ANSB1_bit	ANSELB,1
#define ANSB2_bit	ANSELB,2
#define ANSB3_bit	ANSELB,3
#define ANSB4_bit	ANSELB,4
#define ANSB5_bit	ANSELB,5
#define ANSB6_bit	ANSELB,6
#define ANSB7_bit	ANSELB,7
#define ANSC0_bit	ANSELC,0
#define ANSC1_bit	ANSELC,1
#define ANSC2_bit	ANSELC,2
#define ANSC5_bit	ANSELC,5
#define ANSC6_bit	ANSELC,6
#define ANSC7_bit	ANSELC,7
#define ANSD0_bit	ANSELD,0
#define ANSD1_bit	ANSELD,1
#define ANSD2_bit	ANSELD,2
#define ANSD3_bit	ANSELD,3
#define ANSD4_bit	ANSELD,4
#define ANSD5_bit	ANSELD,5
#define ANSD6_bit	ANSELD,6
#define ANSD7_bit	ANSELD,7
#define ANSE0_bit	ANSELE,0
#define ANSE1_bit	ANSELE,1
#define ANSE2_bit	ANSELE,2
#define RD_bit	PMCON1,0