as12f617.h

picc

; HI-TECH Software PICC Assembler header file.
; Definitions based on C header file: pic12f617.h.

; NOTE: PICC assembler option -P is required to preprocess assembler sources. 

; Special Function Register definitions
INDF		equ	0000h
TMR0		equ	0001h
PCL		equ	0002h
STATUS		equ	0003h
FSR		equ	0004h
GPIO		equ	0005h
PORTA		equ	0005h
PCLATH		equ	000Ah
INTCON		equ	000Bh
PIR1		equ	000Ch
TMR1L		equ	000Eh
TMR1H		equ	000Fh
T1CON		equ	0010h
TMR2		equ	0011h
T2CON		equ	0012h
CCPR1L		equ	0013h
CCPR1H		equ	0014h
CCP1CON		equ	0015h
PWM1CON		equ	0016h
ECCPAS		equ	0017h
VRCON		equ	0019h
CMCON0		equ	001Ah
CMCON1		equ	001Ch
ADRESH		equ	001Eh
ADCON0		equ	001Fh
OPTION_REG_REG	equ	0081h
TRIS_REGIO		equ	0085h
TRIS_REGA		equ	0085h
PIE1		equ	008Ch
PCON		equ	008Eh
OSCTUNE		equ	0090h
PR2		equ	0092h
APFCON		equ	0093h
WPU		equ	0095h
IOC		equ	0096h
PMCON1		equ	0098h
PMCON2		equ	0099h
PMADRL		equ	009Ah
PMADRH		equ	009Bh
PMDATL		equ	009Ch
PMDATH		equ	009Dh
ADRESL		equ	009Eh
ANSEL		equ	009Fh

; Bit variables associates within SFRs
#define CARRY	STATUS,0
#define DC	STATUS,1
#define ZERO	STATUS,2
#define nPD	STATUS,3
#define nTO	STATUS,4
#define IRP	STATUS,7
#define GP0	GPIO,0
#define GP1	GPIO,1
#define GP2	GPIO,2
#define GP3	GPIO,3
#define GP4	GPIO,4
#define GP5	GPIO,5
#define RA0	GPIO,0
#define RA1	GPIO,1
#define RA2	GPIO,2
#define RA3	GPIO,3
#define RA4	GPIO,4
#define RA5	GPIO,5
#define GPIF	INTCON,0
#define INTF	INTCON,1
#define TMR0IF	INTCON,2
#define GPIE	INTCON,3
#define INTE	INTCON,4
#define TMR0IE	INTCON,5
#define PEIE	INTCON,6
#define GIE	INTCON,7
#define TMR1IF	PIR1,0
#define TMR2IF	PIR1,1
#define C1IF	PIR1,3
#define ECCPIF	PIR1,5
#define ADIF	PIR1,6
#define TMR1ON	T1CON,0
#define TMR1CS	T1CON,1
#define nT1SYNC	T1CON,2
#define T1OSCEN	T1CON,3
#define TMR1GE	T1CON,6
#define T1GINV	T1CON,7
#define TMR2ON	T2CON,2
#define P1M	CCP1CON,7
#define PRSEN	PWM1CON,7
#define ECCPASE	ECCPAS,7
#define FBREN	VRCON,4
#define VRR	VRCON,5
#define C1VREN	VRCON,7
#define C1CH	CMCON0,0
#define C1R	CMCON0,2
#define C1POL	CMCON0,4
#define C1OE	CMCON0,5
#define C1OUT	CMCON0,6
#define C1ON	CMCON0,7
#define C1SYNC	CMCON1,0
#define T1GSS	CMCON1,1
#define C1HYS	CMCON1,3
#define T1ACS	CMCON1,4
#define ADON	ADCON0,0
#define GO_nDONE	ADCON0,1
#define VCFG	ADCON0,6
#define ADFM	ADCON0,7
#define PSA	OPTION_REG_REG,3
#define T0SE	OPTION_REG_REG,4
#define T0CS	OPTION_REG_REG,5
#define INTEDG	OPTION_REG_REG,6
#define nGPPU	OPTION_REG_REG,7
#define TRIS_REGIO0	TRIS_REGIO,0
#define TRIS_REGIO1	TRIS_REGIO,1
#define TRIS_REGIO2	TRIS_REGIO,2
#define TRIS_REGIO3	TRIS_REGIO,3
#define TRIS_REGIO4	TRIS_REGIO,4
#define TRIS_REGIO5	TRIS_REGIO,5
#define TRIS_REGA0	TRIS_REGIO,0
#define TRIS_REGA1	TRIS_REGIO,1
#define TRIS_REGA2	TRIS_REGIO,2
#define TRIS_REGA3	TRIS_REGIO,3
#define TRIS_REGA4	TRIS_REGIO,4
#define TRIS_REGA5	TRIS_REGIO,5
#define TMR1IE	PIE1,0
#define TMR2IE	PIE1,1
#define C1IE	PIE1,3
#define ECCPIE	PIE1,5
#define ADIE	PIE1,6
#define nBOR	PCON,0
#define nPOR	PCON,1
#define P1ASEL	APFCON,0
#define P1BSEL	APFCON,1
#define T1GSEL	APFCON,4
#define WPUA0	WPU,0
#define WPUA1	WPU,1
#define WPUA2	WPU,2
#define WPUA4	WPU,4
#define WPUA5	WPU,5
#define IOC0	IOC,0
#define IOC1	IOC,1
#define IOC2	IOC,2
#define IOC3	IOC,3
#define IOC4	IOC,4
#define IOC5	IOC,5
#define RD	PMCON1,0
#define WR	PMCON1,1
#define WREN	PMCON1,2
#define PMADRH0	PMADRH,0
#define PMADRH1	PMADRH,1
#define PMADRH2	PMADRH,2