cas12f617.h

picc

; HI-TECH Software PICC Assembler header file.
; Definitions based on C header file: pic12f617.h.

; NOTE: PICC assembler option -P is required to preprocess assembler sources. 

; Special Function Register definitions
INDF		equ	0000h
TMR0		equ	0001h
PCL		equ	0002h
STATUS		equ	0003h
FSR		equ	0004h
GPIO		equ	0005h
PORTA		equ	0005h
PCLATH		equ	000Ah
INTCON		equ	000Bh
PIR1		equ	000Ch
TMR1L		equ	000Eh
TMR1H		equ	000Fh
T1CON		equ	0010h
TMR2		equ	0011h
T2CON		equ	0012h
CCPR1L		equ	0013h
CCPR1H		equ	0014h
CCP1CON		equ	0015h
PWM1CON		equ	0016h
ECCPAS		equ	0017h
VRCON		equ	0019h
CMCON0		equ	001Ah
CMCON1		equ	001Ch
ADRESH		equ	001Eh
ADCON0		equ	001Fh
OPTION_REG_REG	equ	0081h
TRIS_REGIO		equ	0085h
TRIS_REGA		equ	0085h
PIE1		equ	008Ch
PCON		equ	008Eh
OSCTUNE		equ	0090h
PR2		equ	0092h
APFCON		equ	0093h
WPU		equ	0095h
IOC		equ	0096h
PMCON1		equ	0098h
PMCON2		equ	0099h
PMADRL		equ	009Ah
PMADRH		equ	009Bh
PMDATL		equ	009Ch
PMDATH		equ	009Dh
ADRESL		equ	009Eh
ANSEL		equ	009Fh

; Bit variables associates within SFRs
#define CARRY_bit	STATUS,0
#define DC_bit	STATUS,1
#define ZERO_bit	STATUS,2
#define nPD_bit	STATUS,3
#define nTO_bit	STATUS,4
#define IRP_bit	STATUS,7
#define GP0_bit	GPIO,0
#define GP1_bit	GPIO,1
#define GP2_bit	GPIO,2
#define GP3_bit	GPIO,3
#define GP4_bit	GPIO,4
#define GP5_bit	GPIO,5
#define RA0_bit	GPIO,0
#define RA1_bit	GPIO,1
#define RA2_bit	GPIO,2
#define RA3_bit	GPIO,3
#define RA4_bit	GPIO,4
#define RA5_bit	GPIO,5
#define GPIF_bit	INTCON,0
#define INTF_bit	INTCON,1
#define TMR0IF_bit	INTCON,2
#define GPIE_bit	INTCON,3
#define INTE_bit	INTCON,4
#define TMR0IE_bit	INTCON,5
#define PEIE_bit	INTCON,6
#define GIE_bit	INTCON,7
#define TMR1IF_bit	PIR1,0
#define TMR2IF_bit	PIR1,1
#define C1IF_bit	PIR1,3
#define ECCPIF_bit	PIR1,5
#define ADIF_bit	PIR1,6
#define TMR1ON_bit	T1CON,0
#define TMR1CS_bit	T1CON,1
#define nT1SYNC_bit	T1CON,2
#define T1OSCEN_bit	T1CON,3
#define TMR1GE_bit	T1CON,6
#define T1GINV_bit	T1CON,7
#define TMR2ON_bit	T2CON,2
#define P1M_bit	CCP1CON,7
#define PRSEN_bit	PWM1CON,7
#define ECCPASE_bit	ECCPAS,7
#define FBREN_bit	VRCON,4
#define VRR_bit	VRCON,5
#define C1VREN_bit	VRCON,7
#define C1CH_bit	CMCON0,0
#define C1R_bit	CMCON0,2
#define C1POL_bit	CMCON0,4
#define C1OE_bit	CMCON0,5
#define C1OUT_bit	CMCON0,6
#define C1ON_bit	CMCON0,7
#define C1SYNC_bit	CMCON1,0
#define T1GSS_bit	CMCON1,1
#define C1HYS_bit	CMCON1,3
#define T1ACS_bit	CMCON1,4
#define ADON_bit	ADCON0,0
#define GO_nDONE_bit	ADCON0,1
#define VCFG_bit	ADCON0,6
#define ADFM_bit	ADCON0,7
#define PSA_bit	OPTION_REG_REG,3
#define T0SE_bit	OPTION_REG_REG,4
#define T0CS_bit	OPTION_REG_REG,5
#define INTEDG_bit	OPTION_REG_REG,6
#define nGPPU_bit	OPTION_REG_REG,7
#define TRIS_REGIO0_bit	TRIS_REGIO,0
#define TRIS_REGIO1_bit	TRIS_REGIO,1
#define TRIS_REGIO2_bit	TRIS_REGIO,2
#define TRIS_REGIO3_bit	TRIS_REGIO,3
#define TRIS_REGIO4_bit	TRIS_REGIO,4
#define TRIS_REGIO5_bit	TRIS_REGIO,5
#define TRIS_REGA0_bit	TRIS_REGIO,0
#define TRIS_REGA1_bit	TRIS_REGIO,1
#define TRIS_REGA2_bit	TRIS_REGIO,2
#define TRIS_REGA3_bit	TRIS_REGIO,3
#define TRIS_REGA4_bit	TRIS_REGIO,4
#define TRIS_REGA5_bit	TRIS_REGIO,5
#define TMR1IE_bit	PIE1,0
#define TMR2IE_bit	PIE1,1
#define C1IE_bit	PIE1,3
#define ECCPIE_bit	PIE1,5
#define ADIE_bit	PIE1,6
#define nBOR_bit	PCON,0
#define nPOR_bit	PCON,1
#define P1ASEL_bit	APFCON,0
#define P1BSEL_bit	APFCON,1
#define T1GSEL_bit	APFCON,4
#define WPUA0_bit	WPU,0
#define WPUA1_bit	WPU,1
#define WPUA2_bit	WPU,2
#define WPUA4_bit	WPU,4
#define WPUA5_bit	WPU,5
#define IOC0_bit	IOC,0
#define IOC1_bit	IOC,1
#define IOC2_bit	IOC,2
#define IOC3_bit	IOC,3
#define IOC4_bit	IOC,4
#define IOC5_bit	IOC,5
#define RD_bit	PMCON1,0
#define WR_bit	PMCON1,1
#define WREN_bit	PMCON1,2
#define PMADRH0_bit	PMADRH,0
#define PMADRH1_bit	PMADRH,1
#define PMADRH2_bit	PMADRH,2