pic16lf1947.h

picc

volatile bit TUN2                @ ((unsigned)&OSCTUNE*8)+2;
// Frequency Tuning bits
volatile bit TUN3                @ ((unsigned)&OSCTUNE*8)+3;
// Frequency Tuning bits
volatile bit TUN4                @ ((unsigned)&OSCTUNE*8)+4;
// Frequency Tuning bits
volatile bit TUN5                @ ((unsigned)&OSCTUNE*8)+5;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned TUN0                : 1;
        volatile unsigned TUN1                : 1;
        volatile unsigned TUN2                : 1;
        volatile unsigned TUN3                : 1;
        volatile unsigned TUN4                : 1;
        volatile unsigned TUN5                : 1;
    };
    struct {
        volatile unsigned TUN                 : 6;
    };
} OSCTUNEbits @ 0x098;
#endif

// Register: OSCCON
// Oscillator Control Register
volatile unsigned char           OSCCON              @ 0x099;
// bit and bitfield definitions
// System clock select bit
volatile bit SCS0                @ ((unsigned)&OSCCON*8)+0;
// System clock select bit
volatile bit SCS1                @ ((unsigned)&OSCCON*8)+1;
// Internal Oscillator Frequency Select bits
volatile bit IRCF0               @ ((unsigned)&OSCCON*8)+3;
// Internal Oscillator Frequency Select bits
volatile bit IRCF1               @ ((unsigned)&OSCCON*8)+4;
// Internal Oscillator Frequency Select bits
volatile bit IRCF2               @ ((unsigned)&OSCCON*8)+5;
// Internal Oscillator Frequency Select bits
volatile bit IRCF3               @ ((unsigned)&OSCCON*8)+6;
// Software PLL Enable bit
volatile bit SPLLEN              @ ((unsigned)&OSCCON*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned SCS0                : 1;
        volatile unsigned SCS1                : 1;
        volatile unsigned                     : 1;
        volatile unsigned IRCF0               : 1;
        volatile unsigned IRCF1               : 1;
        volatile unsigned IRCF2               : 1;
        volatile unsigned IRCF3               : 1;
        volatile unsigned SPLLEN              : 1;
    };
    struct {
        volatile unsigned SCS                 : 2;
        volatile unsigned : 1;
        volatile unsigned IRCF                : 4;
    };
} OSCCONbits @ 0x099;
#endif

// Register: OSCSTAT
// Oscillator Status Register
volatile unsigned char           OSCSTAT             @ 0x09A;
// bit and bitfield definitions
// Low Freqency Internal Oscillator Ready bit
volatile bit HFIOFS              @ ((unsigned)&OSCSTAT*8)+0;
// Low Freqency Internal Oscillator Ready bit
volatile bit LFIOFR              @ ((unsigned)&OSCSTAT*8)+1;
// Medium Freqency Internal Oscillator Ready bit
volatile bit MFIOFR              @ ((unsigned)&OSCSTAT*8)+2;
// High Freqency Internal Oscillator Status Locked bit
volatile bit HFIOFL              @ ((unsigned)&OSCSTAT*8)+3;
// High Freqency Internal Oscillator Ready bit
volatile bit HFIOFR              @ ((unsigned)&OSCSTAT*8)+4;
// Oscillator Start-up Time-out Status bit
volatile bit OSTS                @ ((unsigned)&OSCSTAT*8)+5;
// 4x PLL Ready bit
volatile bit PLLR                @ ((unsigned)&OSCSTAT*8)+6;
// Timer1 Oscillator Ready bit
volatile bit T1OSCR              @ ((unsigned)&OSCSTAT*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned HFIOFS              : 1;
        volatile unsigned LFIOFR              : 1;
        volatile unsigned MFIOFR              : 1;
        volatile unsigned HFIOFL              : 1;
        volatile unsigned HFIOFR              : 1;
        volatile unsigned OSTS                : 1;
        volatile unsigned PLLR                : 1;
        volatile unsigned T1OSCR              : 1;
    };
} OSCSTATbits @ 0x09A;
#endif
// bit and bitfield definitions

// Register: ADRESL
// A/D Result Register LSB
volatile unsigned char           ADRESL              @ 0x09B;
// bit and bitfield definitions

// Register: ADRESH
// A/D Result Register MSB
volatile unsigned char           ADRESH              @ 0x09C;
// bit and bitfield definitions

// Register: ADRES
volatile unsigned int            ADRES               @ 0x09B;

// Register: ADCON0
// Analog-to-Digital Control Register 0
volatile unsigned char           ADCON0              @ 0x09D;
// bit and bitfield definitions
// A/D Module Enable bit
volatile bit ADON                @ ((unsigned)&ADCON0*8)+0;
// A/D Conversion Status bit
volatile bit GO_nDONE            @ ((unsigned)&ADCON0*8)+1;
// Analog Channel Select bits
volatile bit CHS0                @ ((unsigned)&ADCON0*8)+2;
// Analog Channel Select bits
volatile bit CHS1                @ ((unsigned)&ADCON0*8)+3;
// Analog Channel Select bits
volatile bit CHS2                @ ((unsigned)&ADCON0*8)+4;
// Analog Channel Select bits
volatile bit CHS3                @ ((unsigned)&ADCON0*8)+5;
// Analog Channel Select bits
volatile bit CHS4                @ ((unsigned)&ADCON0*8)+6;
// A/D Conversion Status bit
volatile bit ADGO                @ ((unsigned)&ADCON0*8)+1;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned ADON                : 1;
        volatile unsigned GO_nDONE            : 1;
        volatile unsigned CHS0                : 1;
        volatile unsigned CHS1                : 1;
        volatile unsigned CHS2                : 1;
        volatile unsigned CHS3                : 1;
        volatile unsigned CHS4                : 1;
        volatile unsigned                     : 1;
    };
    struct {
        volatile unsigned : 1;
        volatile unsigned ADGO                : 1;
        volatile unsigned CHS                 : 5;
    };
} ADCON0bits @ 0x09D;
#endif

// Register: ADCON1
// Analog-to-Digital Control Register 1
volatile unsigned char           ADCON1              @ 0x09E;
// bit and bitfield definitions
// A/D Positive Voltage Reference Configuration
volatile bit ADPREF0             @ ((unsigned)&ADCON1*8)+0;
// A/D Positive Voltage Reference Configuration
volatile bit ADPREF1             @ ((unsigned)&ADCON1*8)+1;
// A/D Negative Voltage Reference Configuration
volatile bit ADNREF              @ ((unsigned)&ADCON1*8)+2;
// A/D Conversion Clock Select bits
volatile bit ADCS0               @ ((unsigned)&ADCON1*8)+4;
// A/D Conversion Clock Select bits
volatile bit ADCS1               @ ((unsigned)&ADCON1*8)+5;
// A/D Conversion Clock Select bits
volatile bit ADCS2               @ ((unsigned)&ADCON1*8)+6;
// A/D Result Format Select bit
volatile bit ADFM                @ ((unsigned)&ADCON1*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned ADPREF0             : 1;
        volatile unsigned ADPREF1             : 1;
        volatile unsigned ADNREF              : 1;
        volatile unsigned                     : 1;
        volatile unsigned ADCS0               : 1;
        volatile unsigned ADCS1               : 1;
        volatile unsigned ADCS2               : 1;
        volatile unsigned ADFM                : 1;
    };
    struct {
        volatile unsigned ADPREF              : 2;
        volatile unsigned : 2;
        volatile unsigned ADCS                : 3;
    };
} ADCON1bits @ 0x09E;
#endif

//
// Special function register definitions: Bank 2
//

// Register: LATA
volatile unsigned char           LATA                @ 0x10C;
// bit and bitfield definitions
volatile bit LATA0               @ ((unsigned)&LATA*8)+0;
volatile bit LATA1               @ ((unsigned)&LATA*8)+1;
volatile bit LATA2               @ ((unsigned)&LATA*8)+2;
volatile bit LATA3               @ ((unsigned)&LATA*8)+3;
volatile bit LATA4               @ ((unsigned)&LATA*8)+4;
volatile bit LATA5               @ ((unsigned)&LATA*8)+5;
volatile bit LATA6               @ ((unsigned)&LATA*8)+6;
volatile bit LATA7               @ ((unsigned)&LATA*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned LATA0               : 1;
        volatile unsigned LATA1               : 1;
        volatile unsigned LATA2               : 1;
        volatile unsigned LATA3               : 1;
        volatile unsigned LATA4               : 1;
        volatile unsigned LATA5               : 1;
        volatile unsigned LATA6               : 1;
        volatile unsigned LATA7               : 1;
    };
} LATAbits @ 0x10C;
#endif

// Register: LATB
volatile unsigned char           LATB                @ 0x10D;
// bit and bitfield definitions
volatile bit LATB0               @ ((unsigned)&LATB*8)+0;
volatile bit LATB1               @ ((unsigned)&LATB*8)+1;
volatile bit LATB2               @ ((unsigned)&LATB*8)+2;
volatile bit LATB3               @ ((unsigned)&LATB*8)+3;
volatile bit LATB4               @ ((unsigned)&LATB*8)+4;
volatile bit LATB5               @ ((unsigned)&LATB*8)+5;
volatile bit LATB6               @ ((unsigned)&LATB*8)+6;
volatile bit LATB7               @ ((unsigned)&LATB*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned LATB0               : 1;
        volatile unsigned LATB1               : 1;
        volatile unsigned LATB2               : 1;
        volatile unsigned LATB3               : 1;
        volatile unsigned LATB4               : 1;
        volatile unsigned LATB5               : 1;
        volatile unsigned LATB6               : 1;
        volatile unsigned LATB7               : 1;
    };
} LATBbits @ 0x10D;
#endif

// Register: LATC
volatile unsigned char           LATC                @ 0x10E;
// bit and bitfield definitions
volatile bit LATC0               @ ((unsigned)&LATC*8)+0;
volatile bit LATC1               @ ((unsigned)&LATC*8)+1;
volatile bit LATC2               @ ((unsigned)&LATC*8)+2;
volatile bit LATC3               @ ((unsigned)&LATC*8)+3;
volatile bit LATC4               @ ((unsigned)&LATC*8)+4;
volatile bit LATC5               @ ((unsigned)&LATC*8)+5;
volatile bit LATC6               @ ((unsigned)&LATC*8)+6;
volatile bit LATC7               @ ((unsigned)&LATC*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned LATC0               : 1;
        volatile unsigned LATC1               : 1;
        volatile unsigned LATC2               : 1;
        volatile unsigned LATC3               : 1;
        volatile unsigned LATC4               : 1;
        volatile unsigned LATC5               : 1;
        volatile unsigned LATC6               : 1;
        volatile unsigned LATC7               : 1;
    };
} LATCbits @ 0x10E;
#endif

// Register: LATD
volatile unsigned char           LATD                @ 0x10F;
// bit and bitfield definitions
volatile bit LATD0               @ ((unsigned)&LATD*8)+0;
volatile bit LATD1               @ ((unsigned)&LATD*8)+1;
volatile bit LATD2               @ ((unsigned)&LATD*8)+2;
volatile bit LATD3               @ ((unsigned)&LATD*8)+3;
volatile bit LATD4               @ ((unsigned)&LATD*8)+4;
volatile bit LATD5               @ ((unsigned)&LATD*8)+5;
volatile bit LATD6               @ ((unsigned)&LATD*8)+6;
volatile bit LATD7               @ ((unsigned)&LATD*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned LATD0               : 1;
        volatile unsigned LATD1               : 1;
        volatile unsigned LATD2               : 1;
        volatile unsigned LATD3               : 1;
        volatile unsigned LATD4               : 1;
        volatile unsigned LATD5               : 1;
        volatile unsigned LATD6               : 1;
        volatile unsigned LATD7               : 1;
    };
} LATDbits @ 0x10F;
#endif

// Register: LATE
volatile unsigned char           LATE                @ 0x110;
// bit and bitfield definitions
volatile bit LATE0               @ ((unsigned)&LATE*8)+0;
volatile bit LATE1               @ ((unsigned)&LATE*8)+1;
volatile bit LATE2               @ ((unsigned)&LATE*8)+2;
volatile bit LATE3               @ ((unsigned)&LATE*8)+3;
volatile bit LATE4               @ ((unsigned)&LATE*8)+4;
volatile bit LATE5               @ ((unsigned)&LATE*8)+5;
volatile bit LATE6               @ ((unsigned)&LATE*8)+6;
volatile bit LATE7               @ ((unsigned)&LATE*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned LATE0               : 1;
        volatile unsigned LATE1               : 1;
        volatile unsigned LATE2               : 1;
        volatile unsigned LATE3               : 1;
        volatile unsigned LATE4               : 1;
        volatile unsigned LATE5               : 1;
        volatile unsigned LATE6               : 1;
        volatile unsigned LATE7               : 1;
    };
} LATEbits @ 0x110;
#endif

// Register: CM1CON0
volatile unsigned char           CM1CON0             @ 0x111;
// bit and bitfield definitions
// Comparator Output Synchronous Mode bit
volatile bit C1SYNC              @ ((unsigned)&CM1CON0*8)+0;
// Comparator Hysteresis Enable bit
volatile bit C1HYS               @ ((unsigned)&CM1CON0*8)+1;
// Comparator Speed/Power Select bit
volatile bit C1SP                @ ((unsigned)&CM1CON0*8)+2;
// Comparator Output Polarity Select bit
volatile bit C1POL               @ ((unsigned)&CM1CON0*8)+4;
// Comparator Output Enable bit
volatile bit C1OE                @ ((unsigned)&CM1CON0*8)+5;
// Comparator Output bit