cas12rf675.h

picc

; HI-TECH Software PICC Assembler header file.
; Definitions based on C header file: pic12rf675.h.

; NOTE: PICC assembler option -P is required to preprocess assembler sources. 

; Special Function Register definitions
INDF		equ	000h
TMR0		equ	001h
PCL		equ	002h
STATUS		equ	003h
FSR		equ	004h
GPIO		equ	005h
PCLATH		equ	00Ah
INTCON		equ	00Bh
PIR1		equ	00Ch
TMR1L		equ	00Eh
TMR1H		equ	00Fh
T1CON		equ	010h
CMCON		equ	019h
ADRESH		equ	01Eh
ADCON0		equ	01Fh
OPTION_REG		equ	081h
TRIS_REGIO		equ	085h
PIE1		equ	08Ch
PCON		equ	08Eh
OSCCAL		equ	090h
WPU		equ	095h
IOC		equ	096h
VRCON		equ	099h
EEDATA		equ	09Ah
EEADR		equ	09Bh
EECON1		equ	09Ch
EECON2		equ	09Dh
ADRESL		equ	09Eh
ANSEL		equ	09Fh

; Bit variables associates within SFRs
#define CARRY_bit	STATUS,0
#define DC_bit	STATUS,1
#define ZERO_bit	STATUS,2
#define PD_bit	STATUS,3
#define TO_bit	STATUS,4
#define RP0_bit	STATUS,5
#define RP1_bit	STATUS,6
#define IRP_bit	STATUS,7
#define GPIO0_bit	GPIO,0
#define GPIO1_bit	GPIO,1
#define GPIO2_bit	GPIO,2
#define GPIO3_bit	GPIO,3
#define GPIO4_bit	GPIO,4
#define GPIO5_bit	GPIO,5
#define GPIF_bit	INTCON,0
#define INTF_bit	INTCON,1
#define T0IF_bit	INTCON,2
#define GPIE_bit	INTCON,3
#define INTE_bit	INTCON,4
#define T0IE_bit	INTCON,5
#define PEIE_bit	INTCON,6
#define GIE_bit	INTCON,7
#define TMR1IF_bit	PIR1,0
#define CMIF_bit	PIR1,3
#define ADIF_bit	PIR1,6
#define EEIF_bit	PIR1,7
#define TMR1ON_bit	T1CON,0
#define TMR1CS_bit	T1CON,1
#define T1SYNC_bit	T1CON,2
#define T1OSCEN_bit	T1CON,3
#define T1CKPS0_bit	T1CON,4
#define T1CKPS1_bit	T1CON,5
#define TMR1GE_bit	T1CON,6
#define CM0_bit	CMCON,0
#define CM1_bit	CMCON,1
#define CM2_bit	CMCON,2
#define CIS_bit	CMCON,3
#define CINV_bit	CMCON,4
#define COUT_bit	CMCON,6
#define ADON_bit	ADCON0,0
#define GODONE_bit	ADCON0,1
#define CHS0_bit	ADCON0,2
#define CHS1_bit	ADCON0,3
#define VCFG_bit	ADCON0,6
#define ADFM_bit	ADCON0,7
#define PS0_bit	OPTION_REG,0
#define PS1_bit	OPTION_REG,1
#define PS2_bit	OPTION_REG,2
#define PSA_bit	OPTION_REG,3
#define T0SE_bit	OPTION_REG,4
#define T0CS_bit	OPTION_REG,5
#define INTEDG_bit	OPTION_REG,6
#define GPPU_bit	OPTION_REG,7
#define TRIS_REGIO0_bit	TRIS_REGIO,0
#define TRIS_REGIO1_bit	TRIS_REGIO,1
#define TRIS_REGIO2_bit	TRIS_REGIO,2
#define TRIS_REGIO3_bit	TRIS_REGIO,3
#define TRIS_REGIO4_bit	TRIS_REGIO,4
#define TRIS_REGIO5_bit	TRIS_REGIO,5
#define TMR1IE_bit	PIE1,0
#define CMIE_bit	PIE1,3
#define ADIE_bit	PIE1,6
#define EEIE_bit	PIE1,7
#define BOD_bit	PCON,0
#define POR_bit	PCON,1
#define CAL0_bit	OSCCAL,2
#define CAL1_bit	OSCCAL,3
#define CAL2_bit	OSCCAL,4
#define CAL3_bit	OSCCAL,5
#define CAL4_bit	OSCCAL,6
#define CAL5_bit	OSCCAL,7
#define WPU0_bit	WPU,0
#define WPU1_bit	WPU,1
#define WPU2_bit	WPU,2
#define WPU4_bit	WPU,4
#define WPU5_bit	WPU,5
#define IOC0_bit	IOC,0
#define IOC1_bit	IOC,1
#define IOC2_bit	IOC,2
#define IOC3_bit	IOC,3
#define IOC4_bit	IOC,4
#define IOC5_bit	IOC,5
#define VR0_bit	VRCON,0
#define VR1_bit	VRCON,1
#define VR2_bit	VRCON,2
#define VR3_bit	VRCON,3
#define VRR_bit	VRCON,5
#define VREN_bit	VRCON,7
#define RD_bit	EECON1,0
#define WR_bit	EECON1,1
#define WREN_bit	EECON1,2
#define WRERR_bit	EECON1,3
#define ANS0_bit	ANSEL,0
#define ANS1_bit	ANSEL,1
#define ANS2_bit	ANSEL,2
#define ANS3_bit	ANSEL,3
#define ADCS0_bit	ANSEL,4
#define ADCS1_bit	ANSEL,5
#define ADCS2_bit	ANSEL,6