📄 pic16f91x.h
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bit ADIE @ ((unsigned)&PIE1*8)+6;
bit EEIE @ ((unsigned)&PIE1*8)+7;
/* Definitions for PIE2 register */
bit CCP2IE @ ((unsigned)&PIE2*8)+0;
bit LVDIE @ ((unsigned)&PIE2*8)+2;
bit LCDIE @ ((unsigned)&PIE2*8)+4;
bit C1IE @ ((unsigned)&PIE2*8)+5;
bit C2IE @ ((unsigned)&PIE2*8)+6;
bit OSFIE @ ((unsigned)&PIE2*8)+7;
/* Definitions for PCON register */
volatile bit BOR @ ((unsigned)&PCON*8)+0;
volatile bit POR @ ((unsigned)&PCON*8)+1;
bit SBOREN @ ((unsigned)&PCON*8)+4;
/* Definitions for OSCCON register */
bit SCS @ ((unsigned)&OSCCON*8)+0;
volatile bit LTS @ ((unsigned)&OSCCON*8)+1;
volatile bit HTS @ ((unsigned)&OSCCON*8)+2;
volatile bit OSTS @ ((unsigned)&OSCCON*8)+3;
bit IRCF0 @ ((unsigned)&OSCCON*8)+4;
bit IRCF1 @ ((unsigned)&OSCCON*8)+5;
bit IRCF2 @ ((unsigned)&OSCCON*8)+6;
/* Definitions for OSCTUNE register */
bit TUN0 @ ((unsigned)&OSCTUNE*8)+0;
bit TUN1 @ ((unsigned)&OSCTUNE*8)+1;
bit TUN2 @ ((unsigned)&OSCTUNE*8)+2;
bit TUN3 @ ((unsigned)&OSCTUNE*8)+3;
bit TUN4 @ ((unsigned)&OSCTUNE*8)+4;
/* Definitions for ANSEL register */
bit ANS0 @ ((unsigned)&ANSEL*8)+0;
bit ANS1 @ ((unsigned)&ANSEL*8)+1;
bit ANS2 @ ((unsigned)&ANSEL*8)+2;
bit ANS3 @ ((unsigned)&ANSEL*8)+3;
bit ANS4 @ ((unsigned)&ANSEL*8)+4;
bit ANS5 @ ((unsigned)&ANSEL*8)+5;
bit ANS6 @ ((unsigned)&ANSEL*8)+6;
bit ANS7 @ ((unsigned)&ANSEL*8)+7;
/* Definitions for SSPSTAT register */
volatile bit BF @ ((unsigned)&SSPSTAT*8)+0;
volatile bit UA @ ((unsigned)&SSPSTAT*8)+1;
volatile bit RW @ ((unsigned)&SSPSTAT*8)+2;
volatile bit START @ ((unsigned)&SSPSTAT*8)+3;
volatile bit STOP @ ((unsigned)&SSPSTAT*8)+4;
volatile bit DA @ ((unsigned)&SSPSTAT*8)+5;
bit CKE @ ((unsigned)&SSPSTAT*8)+6;
bit SMP @ ((unsigned)&SSPSTAT*8)+7;
/* Definitions for IOCB register */
bit IOCB4 @ ((unsigned)&IOCB*8)+4;
bit IOCB5 @ ((unsigned)&IOCB*8)+5;
bit IOCB6 @ ((unsigned)&IOCB*8)+6;
bit IOCB7 @ ((unsigned)&IOCB*8)+7;
/* Definitions for CMCON1 register */
bit C2SYNC @ ((unsigned)&CMCON1*8)+0;
bit T1GSS @ ((unsigned)&CMCON1*8)+1;
/* Definitions for TXSTA register */
volatile bit TX9D @ ((unsigned)&TXSTA*8)+0;
volatile bit TRMT @ ((unsigned)&TXSTA*8)+1;
bit BRGH @ ((unsigned)&TXSTA*8)+2;
bit SYNC @ ((unsigned)&TXSTA*8)+4;
bit TXEN @ ((unsigned)&TXSTA*8)+5;
bit TX9 @ ((unsigned)&TXSTA*8)+6;
bit CSRC @ ((unsigned)&TXSTA*8)+7;
/* Definitions for CMCON0 register */
bit CM0 @ ((unsigned)&CMCON0*8)+0;
bit CM1 @ ((unsigned)&CMCON0*8)+1;
bit CM2 @ ((unsigned)&CMCON0*8)+2;
bit CIS @ ((unsigned)&CMCON0*8)+3;
bit C1INV @ ((unsigned)&CMCON0*8)+4;
bit C2INV @ ((unsigned)&CMCON0*8)+5;
volatile bit C1OUT @ ((unsigned)&CMCON0*8)+6;
volatile bit C2OUT @ ((unsigned)&CMCON0*8)+7;
/* Definitions for VRCON register */
bit VR0 @ ((unsigned)&VRCON*8)+0;
bit VR1 @ ((unsigned)&VRCON*8)+1;
bit VR2 @ ((unsigned)&VRCON*8)+2;
bit VR3 @ ((unsigned)&VRCON*8)+3;
bit VRR @ ((unsigned)&VRCON*8)+5;
bit VREN @ ((unsigned)&VRCON*8)+7;
/* Definitions for ADCON1 register */
bit ADCS0 @ ((unsigned)&ADCON1*8)+4;
bit ADCS1 @ ((unsigned)&ADCON1*8)+5;
bit ADCS2 @ ((unsigned)&ADCON1*8)+6;
/* Definitions for WDTCON register */
bit SWDTEN @ ((unsigned)&WDTCON*8)+0;
bit WDTPS0 @ ((unsigned)&WDTCON*8)+1;
bit WDTPS1 @ ((unsigned)&WDTCON*8)+2;
bit WDTPS2 @ ((unsigned)&WDTCON*8)+3;
bit WDTPS3 @ ((unsigned)&WDTCON*8)+4;
/* Definitions for LCDCON register */
bit LMUX0 @ ((unsigned)&LCDCON*8)+0;
bit LMUX1 @ ((unsigned)&LCDCON*8)+1;
bit CS0 @ ((unsigned)&LCDCON*8)+2;
bit CS1 @ ((unsigned)&LCDCON*8)+3;
bit VLCDEN @ ((unsigned)&LCDCON*8)+4;
volatile bit WERR @ ((unsigned)&LCDCON*8)+5;
bit SLPEN @ ((unsigned)&LCDCON*8)+6;
bit LCDEN @ ((unsigned)&LCDCON*8)+7;
/* Definitions for LCDPS register */
bit LP0 @ ((unsigned)&LCDPS*8)+0;
bit LP1 @ ((unsigned)&LCDPS*8)+1;
bit LP2 @ ((unsigned)&LCDPS*8)+2;
bit LP3 @ ((unsigned)&LCDPS*8)+3;
volatile bit WA @ ((unsigned)&LCDPS*8)+4;
volatile bit LCDA @ ((unsigned)&LCDPS*8)+5;
bit BIASMD @ ((unsigned)&LCDPS*8)+6;
bit WFT @ ((unsigned)&LCDPS*8)+7;
/* Definitions for LVDCON register */
bit LVDL0 @ ((unsigned)&LVDCON*8)+0;
bit LVDL1 @ ((unsigned)&LVDCON*8)+1;
bit LVDL2 @ ((unsigned)&LVDCON*8)+2;
bit LVDEN @ ((unsigned)&LVDCON*8)+4;
volatile bit IRVST @ ((unsigned)&LVDCON*8)+5;
/* Definitions for LCDDATA0 register */
bit SEG0COM0 @ ((unsigned)&LCDDATA0*8)+0;
bit SEG1COM0 @ ((unsigned)&LCDDATA0*8)+1;
bit SEG2COM0 @ ((unsigned)&LCDDATA0*8)+2;
bit SEG3COM0 @ ((unsigned)&LCDDATA0*8)+3;
bit SEG4COM0 @ ((unsigned)&LCDDATA0*8)+4;
bit SEG5COM0 @ ((unsigned)&LCDDATA0*8)+5;
bit SEG6COM0 @ ((unsigned)&LCDDATA0*8)+6;
bit SEG7COM0 @ ((unsigned)&LCDDATA0*8)+7;
/* Definitions for LCDDATA1 register */
bit SEG8COM0 @ ((unsigned)&LCDDATA1*8)+0;
bit SEG9COM0 @ ((unsigned)&LCDDATA1*8)+1;
bit SEG10COM0 @ ((unsigned)&LCDDATA1*8)+2;
bit SEG11COM0 @ ((unsigned)&LCDDATA1*8)+3;
bit SEG12COM0 @ ((unsigned)&LCDDATA1*8)+4;
bit SEG13COM0 @ ((unsigned)&LCDDATA1*8)+5;
bit SEG14COM0 @ ((unsigned)&LCDDATA1*8)+6;
bit SEG15COM0 @ ((unsigned)&LCDDATA1*8)+7;
#if defined(_16F914) || defined(_16F917)
/* Definitions for LCDDATA2 register */
bit SEG16COM0 @ ((unsigned)&LCDDATA2*8)+0;
bit SEG17COM0 @ ((unsigned)&LCDDATA2*8)+1;
bit SEG18COM0 @ ((unsigned)&LCDDATA2*8)+2;
bit SEG19COM0 @ ((unsigned)&LCDDATA2*8)+3;
bit SEG20COM0 @ ((unsigned)&LCDDATA2*8)+4;
bit SEG21COM0 @ ((unsigned)&LCDDATA2*8)+5;
bit SEG22COM0 @ ((unsigned)&LCDDATA2*8)+6;
bit SEG23COM0 @ ((unsigned)&LCDDATA2*8)+7;
#endif
/* Definitions for LCDDATA3 register */
bit SEG0COM1 @ ((unsigned)&LCDDATA3*8)+0;
bit SEG1COM1 @ ((unsigned)&LCDDATA3*8)+1;
bit SEG2COM1 @ ((unsigned)&LCDDATA3*8)+2;
bit SEG3COM1 @ ((unsigned)&LCDDATA3*8)+3;
bit SEG4COM1 @ ((unsigned)&LCDDATA3*8)+4;
bit SEG5COM1 @ ((unsigned)&LCDDATA3*8)+5;
bit SEG6COM1 @ ((unsigned)&LCDDATA3*8)+6;
bit SEG7COM1 @ ((unsigned)&LCDDATA3*8)+7;
/* Definitions for LCDDATA4 register */
bit SEG8COM1 @ ((unsigned)&LCDDATA4*8)+0;
bit SEG9COM1 @ ((unsigned)&LCDDATA4*8)+1;
bit SEG10COM1 @ ((unsigned)&LCDDATA4*8)+2;
bit SEG11COM1 @ ((unsigned)&LCDDATA4*8)+3;
bit SEG12COM1 @ ((unsigned)&LCDDATA4*8)+4;
bit SEG13COM1 @ ((unsigned)&LCDDATA4*8)+5;
bit SEG14COM1 @ ((unsigned)&LCDDATA4*8)+6;
bit SEG15COM1 @ ((unsigned)&LCDDATA4*8)+7;
#if defined(_16F914) || defined(_16F917)
/* Definitions for LCDDATA5 register */
bit SEG16COM1 @ ((unsigned)&LCDDATA5*8)+0;
bit SEG17COM1 @ ((unsigned)&LCDDATA5*8)+1;
bit SEG18COM1 @ ((unsigned)&LCDDATA5*8)+2;
bit SEG19COM1 @ ((unsigned)&LCDDATA5*8)+3;
bit SEG20COM1 @ ((unsigned)&LCDDATA5*8)+4;
bit SEG21COM1 @ ((unsigned)&LCDDATA5*8)+5;
bit SEG22COM1 @ ((unsigned)&LCDDATA5*8)+6;
bit SEG23COM1 @ ((unsigned)&LCDDATA5*8)+7;
#endif
/* Definitions for LCDDATA6 register */
bit SEG0COM2 @ ((unsigned)&LCDDATA6*8)+0;
bit SEG1COM2 @ ((unsigned)&LCDDATA6*8)+1;
bit SEG2COM2 @ ((unsigned)&LCDDATA6*8)+2;
bit SEG3COM2 @ ((unsigned)&LCDDATA6*8)+3;
bit SEG4COM2 @ ((unsigned)&LCDDATA6*8)+4;
bit SEG5COM2 @ ((unsigned)&LCDDATA6*8)+5;
bit SEG6COM2 @ ((unsigned)&LCDDATA6*8)+6;
bit SEG7COM2 @ ((unsigned)&LCDDATA6*8)+7;
/* Definitions for LCDDATA7 register */
bit SEG8COM2 @ ((unsigned)&LCDDATA7*8)+0;
bit SEG9COM2 @ ((unsigned)&LCDDATA7*8)+1;
bit SEG10COM2 @ ((unsigned)&LCDDATA7*8)+2;
bit SEG11COM2 @ ((unsigned)&LCDDATA7*8)+3;
bit SEG12COM2 @ ((unsigned)&LCDDATA7*8)+4;
bit SEG13COM2 @ ((unsigned)&LCDDATA7*8)+5;
bit SEG14COM2 @ ((unsigned)&LCDDATA7*8)+6;
bit SEG15COM2 @ ((unsigned)&LCDDATA7*8)+7;
#if defined(_16F914) || defined(_16F917)
/* Definitions for LCDDATA8 register */
bit SEG16COM2 @ ((unsigned)&LCDDATA8*8)+0;
bit SEG17COM2 @ ((unsigned)&LCDDATA8*8)+1;
bit SEG18COM2 @ ((unsigned)&LCDDATA8*8)+2;
bit SEG19COM2 @ ((unsigned)&LCDDATA8*8)+3;
bit SEG20COM2 @ ((unsigned)&LCDDATA8*8)+4;
bit SEG21COM2 @ ((unsigned)&LCDDATA8*8)+5;
bit SEG22COM2 @ ((unsigned)&LCDDATA8*8)+6;
bit SEG23COM2 @ ((unsigned)&LCDDATA8*8)+7;
#endif
/* Definitions for LCDDATA9 register */
bit SEG0COM3 @ ((unsigned)&LCDDATA9*8)+0;
bit SEG1COM3 @ ((unsigned)&LCDDATA9*8)+1;
bit SEG2COM3 @ ((unsigned)&LCDDATA9*8)+2;
bit SEG3COM3 @ ((unsigned)&LCDDATA9*8)+3;
bit SEG4COM3 @ ((unsigned)&LCDDATA9*8)+4;
bit SEG5COM3 @ ((unsigned)&LCDDATA9*8)+5;
bit SEG6COM3 @ ((unsigned)&LCDDATA9*8)+6;
bit SEG7COM3 @ ((unsigned)&LCDDATA9*8)+7;
/* Definitions for LCDDATA10 register */
bit SEG8COM3 @ ((unsigned)&LCDDATA10*8)+0;
bit SEG9COM3 @ ((unsigned)&LCDDATA10*8)+1;
bit SEG10COM3 @ ((unsigned)&LCDDATA10*8)+2;
bit SEG11COM3 @ ((unsigned)&LCDDATA10*8)+3;
bit SEG12COM3 @ ((unsigned)&LCDDATA10*8)+4;
bit SEG13COM3 @ ((unsigned)&LCDDATA10*8)+5;
bit SEG14COM3 @ ((unsigned)&LCDDATA10*8)+6;
bit SEG15COM3 @ ((unsigned)&LCDDATA10*8)+7;
#if defined(_16F914) || defined(_16F917)
/* Definitions for LCDDATA11 register */
bit SEG16COM3 @ ((unsigned)&LCDDATA11*8)+0;
bit SEG17COM3 @ ((unsigned)&LCDDATA11*8)+1;
bit SEG18COM3 @ ((unsigned)&LCDDATA11*8)+2;
bit SEG19COM3 @ ((unsigned)&LCDDATA11*8)+3;
bit SEG20COM3 @ ((unsigned)&LCDDATA11*8)+4;
bit SEG21COM3 @ ((unsigned)&LCDDATA11*8)+5;
bit SEG22COM3 @ ((unsigned)&LCDDATA11*8)+6;
bit SEG23COM3 @ ((unsigned)&LCDDATA11*8)+7;
#endif
/* Definitions for LCDSE0 register */
bit SE0 @ ((unsigned)&LCDSE0*8)+0;
bit SE1 @ ((unsigned)&LCDSE0*8)+1;
bit SE2 @ ((unsigned)&LCDSE0*8)+2;
bit SE3 @ ((unsigned)&LCDSE0*8)+3;
bit SE4 @ ((unsigned)&LCDSE0*8)+4;
bit SE5 @ ((unsigned)&LCDSE0*8)+5;
bit SE6 @ ((unsigned)&LCDSE0*8)+6;
bit SE7 @ ((unsigned)&LCDSE0*8)+7;
/* Definitions for LCDSE1 register */
bit SE8 @ ((unsigned)&LCDSE1*8)+0;
bit SE9 @ ((unsigned)&LCDSE1*8)+1;
bit SE10 @ ((unsigned)&LCDSE1*8)+2;
bit SE11 @ ((unsigned)&LCDSE1*8)+3;
bit SE12 @ ((unsigned)&LCDSE1*8)+4;
bit SE13 @ ((unsigned)&LCDSE1*8)+5;
bit SE14 @ ((unsigned)&LCDSE1*8)+6;
bit SE15 @ ((unsigned)&LCDSE1*8)+7;
/* Definitions for LCDSE2 register */
bit SE16 @ ((unsigned)&LCDSE2*8)+0;
bit SE17 @ ((unsigned)&LCDSE2*8)+1;
bit SE18 @ ((unsigned)&LCDSE2*8)+2;
bit SE19 @ ((unsigned)&LCDSE2*8)+3;
bit SE20 @ ((unsigned)&LCDSE2*8)+4;
bit SE21 @ ((unsigned)&LCDSE2*8)+5;
bit SE22 @ ((unsigned)&LCDSE2*8)+6;
bit SE23 @ ((unsigned)&LCDSE2*8)+7;
/* Definitions for EECON1 register */
volatile bit RD @ ((unsigned)&EECON1*8)+0;
volatile bit WR @ ((unsigned)&EECON1*8)+1;
volatile bit WREN @ ((unsigned)&EECON1*8)+2;
volatile bit WRERR @ ((unsigned)&EECON1*8)+3;
volatile bit EEPGD @ ((unsigned)&EECON1*8)+7;
// Configuration Mask Definitions
#define CONFIG_ADDR 0x2007
// Oscillator
#define EXTCLK 0x3FFF // External RC Clockout
#define EXTIO 0x3FFE // External RC No Clock
#define INTCLK 0x3FFD // Internal RC Clockout
#define INTIO 0x3FFC // Internal RC No Clock
#define EC 0x3FFB // EC
#define HS 0x3FFA // HS
#define XT 0x3FF9 // XT
#define LP 0x3FF8 // LP
// Watchdog Timer
#define WDTEN 0x3FFF // On
#define WDTDIS 0x3FF7 // Disabled / SWDTEN control
// Power Up Timer
#define PWRTDIS 0x3FFF // Off
#define PWRTEN 0x3FEF // On
// Master Clear Enable
#define MCLREN 0x3FFF // MCLR function is enabled
#define MCLRDIS 0x3FDF // MCLR functions as IO
// Code Protect
#define UNPROTECT 0x3FFF // Code is not protected
#define CP 0x3FBF // Code is protected
#define PROTECT CP //alternate
// Data EE Read Protect
#define UNPROTECT 0x3FFF // Do not read protect EEPROM data
#define CPD 0x3F7F // Read protect EEPROM data
// Brown Out Detect
#define BORDIS 0x3CFF // BOD and SBOREN disabled
#define SWBOREN 0x3DFF // SBOREN controls BOR function (Software control)
#define BORXSLP 0x3EFF // BOD enabled in run, disabled in sleep, SBOREN disabled
#define BOREN 0x3FFF // BOD Enabled, SBOREN Disabled
// Internal External Switch Over Mode
#define IESOEN 0x3FFF // Enabled
#define IESODIS 0x3BFF // Disabled
// Monitor Clock Fail-safe
#define FCMEN 0x3FFF // Enabled
#define FCMDIS 0x37FF // Disabled
// In-Circuit Debugger Mode
#define DEBUGEN 0x2FFF // Enable ICD2 debugging
#define DEBUGDIS 0x3FFF // Disable ICD2 debugging
#endif
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