📄 pic24gs128j128-icd.h
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unsigned : 1;
volatile unsigned T5GATE : 1;
volatile unsigned TCKPS : 2;
unsigned : 1;
unsigned : 1;
volatile unsigned T5CS : 1;
unsigned : 1;
} T5CONbits @ 0x120;
static volatile unsigned int IC1BUF @ 0x140;
static volatile unsigned int IC1CON @ 0x142;
static volatile bit IC1_ICM0 @ ((unsigned)&IC1CON*8)+0;
static volatile bit IC1_ICM1 @ ((unsigned)&IC1CON*8)+1;
static volatile bit IC1_ICM2 @ ((unsigned)&IC1CON*8)+2;
static volatile bit IC1_ICBNE @ ((unsigned)&IC1CON*8)+3;
static volatile bit IC1_ICOV @ ((unsigned)&IC1CON*8)+4;
static volatile bit IC1_ICI0 @ ((unsigned)&IC1CON*8)+5;
static volatile bit IC1_ICI1 @ ((unsigned)&IC1CON*8)+6;
static volatile bit IC1_ICTMR @ ((unsigned)&IC1CON*8)+7;
static volatile bit IC1_ICSIDL @ ((unsigned)&IC1CON*8)+13;
static volatile bit IC1_ICFRZ @ ((unsigned)&IC1CON*8)+14;
/* Microchip compatible bit field */
static volatile struct {
unsigned : 1;
volatile unsigned ICFRZ : 1;
volatile unsigned ICSIDL : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
volatile unsigned ICTMR : 1;
volatile unsigned ICI : 2;
volatile unsigned ICOV : 1;
volatile unsigned ICBNE : 1;
volatile unsigned ICM : 3;
} IC1CONbits @ 0x142;
static volatile unsigned int IC2BUF @ 0x144;
static volatile unsigned int IC2CON @ 0x146;
static volatile bit IC2_ICM0 @ ((unsigned)&IC2CON*8)+0;
static volatile bit IC2_ICM1 @ ((unsigned)&IC2CON*8)+1;
static volatile bit IC2_ICM2 @ ((unsigned)&IC2CON*8)+2;
static volatile bit IC2_ICBNE @ ((unsigned)&IC2CON*8)+3;
static volatile bit IC2_ICOV @ ((unsigned)&IC2CON*8)+4;
static volatile bit IC2_ICI0 @ ((unsigned)&IC2CON*8)+5;
static volatile bit IC2_ICI1 @ ((unsigned)&IC2CON*8)+6;
static volatile bit IC2_ICTMR @ ((unsigned)&IC2CON*8)+7;
static volatile bit IC2_ICSIDL @ ((unsigned)&IC2CON*8)+13;
static volatile bit IC2_ICFRZ @ ((unsigned)&IC2CON*8)+14;
/* Microchip compatible bit field */
static volatile struct {
unsigned : 1;
volatile unsigned ICFRZ : 1;
volatile unsigned ICSIDL : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
volatile unsigned ICTMR : 1;
volatile unsigned ICI : 2;
volatile unsigned ICOV : 1;
volatile unsigned ICBNE : 1;
volatile unsigned ICM : 3;
} IC2CONbits @ 0x146;
static volatile unsigned int IC3BUF @ 0x148;
static volatile unsigned int IC3CON @ 0x14A;
static volatile bit IC3_ICM0 @ ((unsigned)&IC3CON*8)+0;
static volatile bit IC3_ICM1 @ ((unsigned)&IC3CON*8)+1;
static volatile bit IC3_ICM2 @ ((unsigned)&IC3CON*8)+2;
static volatile bit IC3_ICBNE @ ((unsigned)&IC3CON*8)+3;
static volatile bit IC3_ICOV @ ((unsigned)&IC3CON*8)+4;
static volatile bit IC3_ICI0 @ ((unsigned)&IC3CON*8)+5;
static volatile bit IC3_ICI1 @ ((unsigned)&IC3CON*8)+6;
static volatile bit IC3_ICTMR @ ((unsigned)&IC3CON*8)+7;
static volatile bit IC3_ICSIDL @ ((unsigned)&IC3CON*8)+13;
static volatile bit IC3_ICFRZ @ ((unsigned)&IC3CON*8)+14;
/* Microchip compatible bit field */
static volatile struct {
unsigned : 1;
volatile unsigned ICFRZ : 1;
volatile unsigned ICSIDL : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
volatile unsigned ICTMR : 1;
volatile unsigned ICI : 2;
volatile unsigned ICOV : 1;
volatile unsigned ICBNE : 1;
volatile unsigned ICM : 3;
} IC3CONbits @ 0x14A;
static volatile unsigned int IC4BUF @ 0x14C;
static volatile unsigned int IC4CON @ 0x14E;
static volatile bit IC4_ICM0 @ ((unsigned)&IC4CON*8)+0;
static volatile bit IC4_ICM1 @ ((unsigned)&IC4CON*8)+1;
static volatile bit IC4_ICM2 @ ((unsigned)&IC4CON*8)+2;
static volatile bit IC4_ICBNE @ ((unsigned)&IC4CON*8)+3;
static volatile bit IC4_ICOV @ ((unsigned)&IC4CON*8)+4;
static volatile bit IC4_ICI0 @ ((unsigned)&IC4CON*8)+5;
static volatile bit IC4_ICI1 @ ((unsigned)&IC4CON*8)+6;
static volatile bit IC4_ICTMR @ ((unsigned)&IC4CON*8)+7;
static volatile bit IC4_ICSIDL @ ((unsigned)&IC4CON*8)+13;
static volatile bit IC4_ICFRZ @ ((unsigned)&IC4CON*8)+14;
/* Microchip compatible bit field */
static volatile struct {
unsigned : 1;
volatile unsigned ICFRZ : 1;
volatile unsigned ICSIDL : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
volatile unsigned ICTMR : 1;
volatile unsigned ICI : 2;
volatile unsigned ICOV : 1;
volatile unsigned ICBNE : 1;
volatile unsigned ICM : 3;
} IC4CONbits @ 0x14E;
static volatile unsigned int IC5BUF @ 0x150;
static volatile unsigned int IC5CON @ 0x152;
static volatile bit IC5_ICM0 @ ((unsigned)&IC5CON*8)+0;
static volatile bit IC5_ICM1 @ ((unsigned)&IC5CON*8)+1;
static volatile bit IC5_ICM2 @ ((unsigned)&IC5CON*8)+2;
static volatile bit IC5_ICBNE @ ((unsigned)&IC5CON*8)+3;
static volatile bit IC5_ICOV @ ((unsigned)&IC5CON*8)+4;
static volatile bit IC5_ICI0 @ ((unsigned)&IC5CON*8)+5;
static volatile bit IC5_ICI1 @ ((unsigned)&IC5CON*8)+6;
static volatile bit IC5_ICTMR @ ((unsigned)&IC5CON*8)+7;
static volatile bit IC5_ICSIDL @ ((unsigned)&IC5CON*8)+13;
static volatile bit IC5_ICFRZ @ ((unsigned)&IC5CON*8)+14;
/* Microchip compatible bit field */
static volatile struct {
unsigned : 1;
volatile unsigned ICFRZ : 1;
volatile unsigned ICSIDL : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
volatile unsigned ICTMR : 1;
volatile unsigned ICI : 2;
volatile unsigned ICOV : 1;
volatile unsigned ICBNE : 1;
volatile unsigned ICM : 3;
} IC5CONbits @ 0x152;
static volatile unsigned int OC1RS @ 0x180;
static volatile unsigned int OC1R @ 0x182;
static volatile unsigned int OC1CON @ 0x184;
static volatile bit OC1_OCM0 @ ((unsigned)&OC1CON*8)+0;
static volatile bit OC1_OCM1 @ ((unsigned)&OC1CON*8)+1;
static volatile bit OC1_OCM2 @ ((unsigned)&OC1CON*8)+2;
static volatile bit OC1_OCTSEL1 @ ((unsigned)&OC1CON*8)+3;
static volatile bit OC1_OCFLT1 @ ((unsigned)&OC1CON*8)+4;
static volatile bit OC1_OCSIDL @ ((unsigned)&OC1CON*8)+13;
static volatile bit OC1_OCFRZ @ ((unsigned)&OC1CON*8)+14;
/* Microchip compatible bit field */
static volatile struct {
unsigned : 1;
volatile unsigned OCFRZ : 1;
volatile unsigned OCSIDL : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
volatile unsigned OCFLT1 : 1;
volatile unsigned OCTSEL1 : 1;
volatile unsigned OCM : 3;
} OC1CONbits @ 0x184;
static volatile unsigned int OC2RS @ 0x186;
static volatile unsigned int OC2R @ 0x188;
static volatile unsigned int OC2CON @ 0x18A;
static volatile bit OC2_OCM0 @ ((unsigned)&OC2CON*8)+0;
static volatile bit OC2_OCM1 @ ((unsigned)&OC2CON*8)+1;
static volatile bit OC2_OCM2 @ ((unsigned)&OC2CON*8)+2;
static volatile bit OC2_OCTSEL2 @ ((unsigned)&OC2CON*8)+3;
static volatile bit OC2_OCFLT2 @ ((unsigned)&OC2CON*8)+4;
static volatile bit OC2_OCSIDL @ ((unsigned)&OC2CON*8)+13;
static volatile bit OC2_OCFRZ @ ((unsigned)&OC2CON*8)+14;
/* Microchip compatible bit field */
static volatile struct {
unsigned : 1;
volatile unsigned OCFRZ : 1;
volatile unsigned OCSIDL : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
volatile unsigned OCFLT2 : 1;
volatile unsigned OCTSEL2 : 1;
volatile unsigned OCM : 3;
} OC2CONbits @ 0x18A;
static volatile unsigned int OC3RS @ 0x18C;
static volatile unsigned int OC3R @ 0x18E;
static volatile unsigned int OC3CON @ 0x190;
static volatile bit OC3_OCM0 @ ((unsigned)&OC3CON*8)+0;
static volatile bit OC3_OCM1 @ ((unsigned)&OC3CON*8)+1;
static volatile bit OC3_OCM2 @ ((unsigned)&OC3CON*8)+2;
static volatile bit OC3_OCTSEL3 @ ((unsigned)&OC3CON*8)+3;
static volatile bit OC3_OCFLT3 @ ((unsigned)&OC3CON*8)+4;
static volatile bit OC3_OCSIDL @ ((unsigned)&OC3CON*8)+13;
static volatile bit OC3_OCFRZ @ ((unsigned)&OC3CON*8)+14;
/* Microchip compatible bit field */
static volatile struct {
unsigned : 1;
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