📄 pic174x.h
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#ifndef _HTC_H_
#warning Header file pic174x.h included directly. Use #include <htc.h> instead.
#endif
/*
* Header file for the Microchip :
* PIC 17C42 Chip
* PIC 17CR42 chip
* PIC 17C42A chip
* PIC 17C43 chip
* PIC 17CR43 chip
* PIC 17C44 chip
* High-end Microcontroller
*/
static unsigned char FSR0 @ 0x01;
static volatile unsigned char PCL @ 0x02;
static unsigned char PCLATH @ 0x03;
static volatile unsigned char ALUSTA @ 0x04;
static volatile unsigned char T0STA @ 0x05;
static volatile unsigned char CPUSTA @ 0x06;
static volatile unsigned char INTSTA @ 0x07;
static volatile unsigned char INDF1 @ 0x08;
static unsigned char FSR1 @ 0x09;
static volatile unsigned char WREG @ 0x0A;
static volatile unsigned char TMR0L @ 0x0B;
static volatile unsigned char TMR0H @ 0x0C;
static volatile unsigned short TMR0 @ 0x0B;
static unsigned char TBLPTRL @ 0x0D;
static unsigned char TBLPTRH @ 0x0E;
static unsigned char BSR @ 0x0F;
#ifndef _17C42
static volatile unsigned char PRODL @ 0x18;
static volatile unsigned char PRODH @ 0x19;
#endif
/* Bank 0 */
static volatile unsigned char PORTA @ 0x10;
static volatile unsigned char DDRB @ 0x11;
static volatile unsigned char PORTB @ 0x12;
static volatile unsigned char RCSTA @ 0x13;
static volatile unsigned char RCREG @ 0x14;
static volatile unsigned char TXSTA @ 0x15;
static unsigned char TXREG @ 0x16;
static unsigned char SPBRG @ 0x17;
/* Bank 1 */
static volatile unsigned char DDRC @ 0x110;
static volatile unsigned char PORTC @ 0x111;
static volatile unsigned char DDRD @ 0x112;
static volatile unsigned char PORTD @ 0x113;
static volatile unsigned char DDRE @ 0x114;
static volatile unsigned char PORTE @ 0x115;
static volatile unsigned char PIR @ 0x116;
static unsigned char PIE @ 0x117;
/* Bank 2 */
static volatile unsigned char TMR1 @ 0x210;
static volatile unsigned char TMR2 @ 0x211;
static volatile unsigned char TMR3L @ 0x212;
static volatile unsigned char TMR3H @ 0x213;
static unsigned char PR1 @ 0x214;
static unsigned char PR2 @ 0x215;
static unsigned char PR3L @ 0x216;
static unsigned char PR3H @ 0x217;
/* Bank 3 */
static unsigned char PW1DCL @ 0x310;
static unsigned char PW2DCL @ 0x311;
static unsigned char PW1DCH @ 0x312;
static unsigned char PW2DCH @ 0x313;
static volatile unsigned char CA2L @ 0x314;
static volatile unsigned char CA2H @ 0x315;
static unsigned char TCON1 @ 0x316;
static unsigned char TCON2 @ 0x317;
/* ALUSTA bits */
static bit FS3 @ (unsigned)&ALUSTA*8+7;
static bit FS2 @ (unsigned)&ALUSTA*8+6;
static bit FS1 @ (unsigned)&ALUSTA*8+5;
static bit FS0 @ (unsigned)&ALUSTA*8+4;
static bit OV @ (unsigned)&ALUSTA*8+3;
static bit ZERO @ (unsigned)&ALUSTA*8+2;
static bit DC @ (unsigned)&ALUSTA*8+1;
static bit CARRY @ (unsigned)&ALUSTA*8+0;
/* T0STA bits */
static bit INTEDG @ (unsigned)&T0STA*8+7;
static bit T0SE @ (unsigned)&T0STA*8+6;
static bit T0CS @ (unsigned)&T0STA*8+5;
static bit PS3 @ (unsigned)&T0STA*8+4;
static bit PS2 @ (unsigned)&T0STA*8+3;
static bit PS1 @ (unsigned)&T0STA*8+2;
static bit PS0 @ (unsigned)&T0STA*8+1;
/* CPUSTA bits */
static volatile bit STKAV @ (unsigned)&CPUSTA*8+5;
static volatile bit GLINTD @ (unsigned)&CPUSTA*8+4;
static volatile bit TO @ (unsigned)&CPUSTA*8+3;
static volatile bit PD @ (unsigned)&CPUSTA*8+2;
/* INTSTA bits */
static volatile bit PEIF @ (unsigned)&INTSTA*8+7;
static volatile bit T0CKIF @ (unsigned)&INTSTA*8+6;
static volatile bit T0IF @ (unsigned)&INTSTA*8+5;
static volatile bit INTF @ (unsigned)&INTSTA*8+4;
static bit PEIE @ (unsigned)&INTSTA*8+3;
static bit T0CKIE @ (unsigned)&INTSTA*8+2;
static bit T0IE @ (unsigned)&INTSTA*8+1;
static bit INTE @ (unsigned)&INTSTA*8+0;
/* PORTA bits */
static volatile bit RBPU @ (unsigned)&PORTA*8+7;
static volatile bit RA5 @ (unsigned)&PORTA*8+5;
static volatile bit RA4 @ (unsigned)&PORTA*8+4;
static volatile bit RA3 @ (unsigned)&PORTA*8+3;
static volatile bit RA2 @ (unsigned)&PORTA*8+2;
static volatile bit RA1 @ (unsigned)&PORTA*8+1;
static volatile bit TOCKI @ (unsigned)&PORTA*8+1;
static volatile bit RA0 @ (unsigned)&PORTA*8+0;
static volatile bit INT @ (unsigned)&PORTA*8+0;
/* PORTB bits */
static volatile bit RB7 @ (unsigned)&PORTB*8+7;
static volatile bit RB6 @ (unsigned)&PORTB*8+6;
static volatile bit RB5 @ (unsigned)&PORTB*8+5;
static volatile bit RB4 @ (unsigned)&PORTB*8+4;
static volatile bit RB3 @ (unsigned)&PORTB*8+3;
static volatile bit RB2 @ (unsigned)&PORTB*8+2;
static volatile bit RB1 @ (unsigned)&PORTB*8+1;
static volatile bit RB0 @ (unsigned)&PORTB*8+0;
/* RCSTA bits */
static bit SPEN @ (unsigned)&RCSTA*8+7;
static volatile bit RX9 @ (unsigned)&RCSTA*8+6;
static bit SREN @ (unsigned)&RCSTA*8+5;
static bit CREN @ (unsigned)&RCSTA*8+4;
static volatile bit FERR @ (unsigned)&RCSTA*8+2;
static volatile bit OERR @ (unsigned)&RCSTA*8+1;
static bit RX9D @ (unsigned)&RCSTA*8+0;
/* TXSTA bits */
static bit CSRC @ (unsigned)&TXSTA*8+7;
static bit TX9 @ (unsigned)&TXSTA*8+6;
static bit TXEN @ (unsigned)&TXSTA*8+5;
static bit SYNC @ (unsigned)&TXSTA*8+4;
static bit TRMT @ (unsigned)&TXSTA*8+1;
static bit TX9D @ (unsigned)&TXSTA*8+0;
/* PORTC bits */
static volatile bit RC7 @ (unsigned)&PORTC*8+7;
static volatile bit RC6 @ (unsigned)&PORTC*8+6;
static volatile bit RC5 @ (unsigned)&PORTC*8+5;
static volatile bit RC4 @ (unsigned)&PORTC*8+4;
static volatile bit RC3 @ (unsigned)&PORTC*8+3;
static volatile bit RC2 @ (unsigned)&PORTC*8+2;
static volatile bit RC1 @ (unsigned)&PORTC*8+1;
static volatile bit RC0 @ (unsigned)&PORTC*8+0;
/* PORTD bits */
static volatile bit RD7 @ (unsigned)&PORTD*8+7;
static volatile bit RD6 @ (unsigned)&PORTD*8+6;
static volatile bit RD5 @ (unsigned)&PORTD*8+5;
static volatile bit RD4 @ (unsigned)&PORTD*8+4;
static volatile bit RD3 @ (unsigned)&PORTD*8+3;
static volatile bit RD2 @ (unsigned)&PORTD*8+2;
static volatile bit RD1 @ (unsigned)&PORTD*8+1;
static volatile bit RD0 @ (unsigned)&PORTD*8+0;
/* PORTE bits */
static volatile bit RE2 @ (unsigned)&PORTE*8+2;
static volatile bit RE1 @ (unsigned)&PORTE*8+1;
static volatile bit RE0 @ (unsigned)&PORTE*8+0;
/* PIR bits */
static volatile bit RBIF @ (unsigned)&PIR*8+7;
static volatile bit TMR3IF @ (unsigned)&PIR*8+6;
static volatile bit TMR2IF @ (unsigned)&PIR*8+5;
static volatile bit TMR1IF @ (unsigned)&PIR*8+4;
static volatile bit CA2IF @ (unsigned)&PIR*8+3;
static volatile bit CA1IF @ (unsigned)&PIR*8+2;
static volatile bit TXIF @ (unsigned)&PIR*8+1;
static volatile bit RCIF @ (unsigned)&PIR*8+0;
/* PIE bits */
static bit RBIE @ (unsigned)&PIE*8+7;
static bit TMR3IE @ (unsigned)&PIE*8+6;
static bit TMR2IE @ (unsigned)&PIE*8+5;
static bit TMR1IE @ (unsigned)&PIE*8+4;
static bit CA2IE @ (unsigned)&PIE*8+3;
static bit CA1IE @ (unsigned)&PIE*8+2;
static bit TXIE @ (unsigned)&PIE*8+1;
static bit RCIE @ (unsigned)&PIE*8+0;
/* PW1DCL bits */
static bit DC1PW1 @ (unsigned)&PW1DCL*8+7;
static bit DC0PW1 @ (unsigned)&PW1DCL*8+6;
/* PW2DCL bits */
static bit DC1PW2 @ (unsigned)&PW2DCL*8+7;
static bit DC0PW2 @ (unsigned)&PW2DCL*8+6;
static bit TM2PW2 @ (unsigned)&PW2DCL*8+5;
/* PW1DCH bits */
static bit DC9PW1 @ (unsigned)&PW1DCH*8+7;
static bit DC8PW1 @ (unsigned)&PW1DCH*8+6;
static bit DC7PW1 @ (unsigned)&PW1DCH*8+5;
static bit DC6PW1 @ (unsigned)&PW1DCH*8+4;
static bit DC5PW1 @ (unsigned)&PW1DCH*8+3;
static bit DC4PW1 @ (unsigned)&PW1DCH*8+2;
static bit DC3PW1 @ (unsigned)&PW1DCH*8+1;
static bit DC2PW1 @ (unsigned)&PW1DCH*8+0;
/* PW2DCH bits */
static bit DC9PW2 @ (unsigned)&PW2DCH*8+7;
static bit DC8PW2 @ (unsigned)&PW2DCH*8+6;
static bit DC7PW2 @ (unsigned)&PW2DCH*8+5;
static bit DC6PW2 @ (unsigned)&PW2DCH*8+4;
static bit DC5PW2 @ (unsigned)&PW2DCH*8+3;
static bit DC4PW2 @ (unsigned)&PW2DCH*8+2;
static bit DC3PW2 @ (unsigned)&PW2DCH*8+1;
static bit DC2PW2 @ (unsigned)&PW2DCH*8+0;
/* TCON1 bits */
static volatile bit CA2ED1 @ (unsigned)&TCON1*8+7;
static volatile bit CA2ED0 @ (unsigned)&TCON1*8+6;
static volatile bit CA1ED1 @ (unsigned)&TCON1*8+5;
static volatile bit CA1ED0 @ (unsigned)&TCON1*8+4;
static bit T16 @ (unsigned)&TCON1*8+3;
static bit TMR3CS @ (unsigned)&TCON1*8+2;
static bit TMR2CS @ (unsigned)&TCON1*8+1;
static bit TMR1CS @ (unsigned)&TCON1*8+0;
/* TCON2 bits */
static volatile bank3 bit CA2OVF @ (unsigned)&TCON2*8+7;
static volatile bank3 bit CA1OVF @ (unsigned)&TCON2*8+6;
static volatile bank3 bit PWM2ON @ (unsigned)&TCON2*8+5;
static volatile bank3 bit PWM1ON @ (unsigned)&TCON2*8+4;
static bank3 bit CA1 @ (unsigned)&TCON2*8+3;
static bank3 bit PR3 @ (unsigned)&TCON2*8+3;
static bank3 bit TMR3ON @ (unsigned)&TCON2*8+2;
static bank3 bit TMR2ON @ (unsigned)&TCON2*8+1;
static bank3 bit TMR1ON @ (unsigned)&TCON2*8+0;
#define CONFIG_ADDR 0xFE00
/*watchdog postscaler select*/
#define WDTPS1 0xFFFF
#define WDTPS256 0xFFFB
#define WDTPS64 0xFFF7
#define WDTDIS 0xFFF3
/* Processor mode select */
#ifdef _17C42
#define PROTECT 0xFF5F /* code protected microcontroller mode */
#else
#define PROTECT 0x7F5F /* code protected microcontroller mode */
#endif
#define MICROPROCESSOR 0xFFFF /* microprocessor mode */
#define MICROCONTROLLER 0xFFEF /* microcontroller mode */
#define EXT_MICROCTRL 0xFFBF /* extended microcontroller mode */
/*osc configurations*/
#define EC 0xFFFF
#define XT 0xFFFE
#define RC 0xFFFD
#define LF 0xFFFC
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