📄 pic16lf1823.h
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// Comparator Negative Input Channel Select bits
volatile bit C1NCH1 @ ((unsigned)&CM1CON1*8)+1;
// Comparator Positive Input Channel Select bits
volatile bit C1PCH0 @ ((unsigned)&CM1CON1*8)+4;
// Comparator Positive Input Channel Select bits
volatile bit C1PCH1 @ ((unsigned)&CM1CON1*8)+5;
// Comparator Interrupt on Negative going edge Enable bits
volatile bit C1INTN @ ((unsigned)&CM1CON1*8)+6;
// Comparator Interrupt on Positive going edge Enable bits
volatile bit C1INTP @ ((unsigned)&CM1CON1*8)+7;
#ifndef _LIB_BUILD
union {
struct {
volatile unsigned C1NCH0 : 1;
volatile unsigned C1NCH1 : 1;
volatile unsigned : 2;
volatile unsigned C1PCH0 : 1;
volatile unsigned C1PCH1 : 1;
volatile unsigned C1INTN : 1;
volatile unsigned C1INTP : 1;
};
struct {
volatile unsigned C1NCH : 2;
volatile unsigned : 2;
volatile unsigned C1PCH : 2;
};
} CM1CON1bits @ 0x112;
#endif
// Register: CM2CON0
volatile unsigned char CM2CON0 @ 0x113;
// bit and bitfield definitions
volatile bit C2SYNC @ ((unsigned)&CM2CON0*8)+0;
volatile bit C2HYS @ ((unsigned)&CM2CON0*8)+1;
volatile bit C2SP @ ((unsigned)&CM2CON0*8)+2;
volatile bit C2POL @ ((unsigned)&CM2CON0*8)+4;
volatile bit C2OE @ ((unsigned)&CM2CON0*8)+5;
volatile bit C2OUT @ ((unsigned)&CM2CON0*8)+6;
volatile bit C2ON @ ((unsigned)&CM2CON0*8)+7;
#ifndef _LIB_BUILD
union {
struct {
volatile unsigned C2SYNC : 1;
volatile unsigned C2HYS : 1;
volatile unsigned C2SP : 1;
volatile unsigned : 1;
volatile unsigned C2POL : 1;
volatile unsigned C2OE : 1;
volatile unsigned C2OUT : 1;
volatile unsigned C2ON : 1;
};
} CM2CON0bits @ 0x113;
#endif
// Register: CM2CON1
volatile unsigned char CM2CON1 @ 0x114;
// bit and bitfield definitions
// Comparator Negative Input Channel Select bits
volatile bit C2NCH0 @ ((unsigned)&CM2CON1*8)+0;
// Comparator Negative Input Channel Select bits
volatile bit C2NCH1 @ ((unsigned)&CM2CON1*8)+1;
// Comparator Positive Input Channel Select bits
volatile bit C2PCH0 @ ((unsigned)&CM2CON1*8)+4;
// Comparator Positive Input Channel Select bits
volatile bit C2PCH1 @ ((unsigned)&CM2CON1*8)+5;
// Comparator Interrupt on Negative going edge Enable bits
volatile bit C2INTN @ ((unsigned)&CM2CON1*8)+6;
// Comparator Interrupt on Positive going edge Enable bits
volatile bit C2INTP @ ((unsigned)&CM2CON1*8)+7;
#ifndef _LIB_BUILD
union {
struct {
volatile unsigned C2NCH0 : 1;
volatile unsigned C2NCH1 : 1;
volatile unsigned : 2;
volatile unsigned C2PCH0 : 1;
volatile unsigned C2PCH1 : 1;
volatile unsigned C2INTN : 1;
volatile unsigned C2INTP : 1;
};
struct {
volatile unsigned C2NCH : 2;
volatile unsigned : 2;
volatile unsigned C2PCH : 2;
};
} CM2CON1bits @ 0x114;
#endif
// Register: CMOUT
// Comparator Output Register
volatile unsigned char CMOUT @ 0x115;
// bit and bitfield definitions
volatile bit MC1OUT @ ((unsigned)&CMOUT*8)+0;
volatile bit MC2OUT @ ((unsigned)&CMOUT*8)+1;
#ifndef _LIB_BUILD
union {
struct {
volatile unsigned MC1OUT : 1;
volatile unsigned MC2OUT : 1;
};
} CMOUTbits @ 0x115;
#endif
// Register: BORCON
// Brown-out Reset Control Register
volatile unsigned char BORCON @ 0x116;
// bit and bitfield definitions
// Brown-out Reset Circuit Ready Status bit
volatile bit BORRDY @ ((unsigned)&BORCON*8)+0;
// Software Brown Out Reset Enable bit
volatile bit SBOREN @ ((unsigned)&BORCON*8)+7;
#ifndef _LIB_BUILD
union {
struct {
volatile unsigned BORRDY : 1;
volatile unsigned : 6;
volatile unsigned SBOREN : 1;
};
} BORCONbits @ 0x116;
#endif
// Register: FVRCON
// Fixed Voltage Reference Control Register
volatile unsigned char FVRCON @ 0x117;
// bit and bitfield definitions
// A/D Converter Fixed Voltage Reference Selection
volatile bit ADFVR0 @ ((unsigned)&FVRCON*8)+0;
// A/D Converter Fixed Voltage Reference Selection
volatile bit ADFVR1 @ ((unsigned)&FVRCON*8)+1;
// Comparator and D/A Converter Fixed Voltage Reference Selection
volatile bit CDAFVR0 @ ((unsigned)&FVRCON*8)+2;
// Comparator and D/A Converter Fixed Voltage Reference Selection
volatile bit CDAFVR1 @ ((unsigned)&FVRCON*8)+3;
volatile bit TSRNG @ ((unsigned)&FVRCON*8)+4;
volatile bit TSEN @ ((unsigned)&FVRCON*8)+5;
// Fixed Voltage Reference Ready Flag
volatile bit FVRRDY @ ((unsigned)&FVRCON*8)+6;
// Fixed Voltage Reference Enable
volatile bit FVREN @ ((unsigned)&FVRCON*8)+7;
#ifndef _LIB_BUILD
union {
struct {
volatile unsigned ADFVR0 : 1;
volatile unsigned ADFVR1 : 1;
volatile unsigned CDAFVR0 : 1;
volatile unsigned CDAFVR1 : 1;
volatile unsigned TSRNG : 1;
volatile unsigned TSEN : 1;
volatile unsigned FVRRDY : 1;
volatile unsigned FVREN : 1;
};
struct {
volatile unsigned ADFVR : 2;
volatile unsigned CDAFVR : 2;
};
} FVRCONbits @ 0x117;
#endif
// Register: DACCON0
// Voltage Reference Control Register 0
volatile unsigned char DACCON0 @ 0x118;
// bit and bitfield definitions
// DAC1 Negative Source Select bits
volatile bit DACNSS @ ((unsigned)&DACCON0*8)+0;
// DAC1 Positive Source Select bits
volatile bit DACPSS0 @ ((unsigned)&DACCON0*8)+2;
// DAC1 Positive Source Select bits
volatile bit DACPSS1 @ ((unsigned)&DACCON0*8)+3;
// DAC1 Voltage Output Enable bit
volatile bit DACOE @ ((unsigned)&DACCON0*8)+5;
// DAC 1 Low Power Voltage State Select bit
volatile bit DACLPS @ ((unsigned)&DACCON0*8)+6;
// DAC 1 Enable bit
volatile bit DACEN @ ((unsigned)&DACCON0*8)+7;
#ifndef _LIB_BUILD
union {
struct {
volatile unsigned DACNSS : 1;
volatile unsigned : 1;
volatile unsigned DACPSS0 : 1;
volatile unsigned DACPSS1 : 1;
volatile unsigned : 1;
volatile unsigned DACOE : 1;
volatile unsigned DACLPS : 1;
volatile unsigned DACEN : 1;
};
struct {
volatile unsigned : 2;
volatile unsigned DACPSS : 2;
};
} DACCON0bits @ 0x118;
#endif
// Register: DACCON1
// Voltage Reference Control Register 1
volatile unsigned char DACCON1 @ 0x119;
// bit and bitfield definitions
// DAC1 Voltage Output Select bits
volatile bit DACR0 @ ((unsigned)&DACCON1*8)+0;
// DAC1 Voltage Output Select bits
volatile bit DACR1 @ ((unsigned)&DACCON1*8)+1;
// DAC1 Voltage Output Select bits
volatile bit DACR2 @ ((unsigned)&DACCON1*8)+2;
// DAC1 Voltage Output Select bits
volatile bit DACR3 @ ((unsigned)&DACCON1*8)+3;
// DAC1 Voltage Output Select bits
volatile bit DACR4 @ ((unsigned)&DACCON1*8)+4;
#ifndef _LIB_BUILD
union {
struct {
volatile unsigned DACR0 : 1;
volatile unsigned DACR1 : 1;
volatile unsigned DACR2 : 1;
volatile unsigned DACR3 : 1;
volatile unsigned DACR4 : 1;
volatile unsigned : 1;
};
struct {
volatile unsigned DACR : 5;
};
} DACCON1bits @ 0x119;
#endif
// Register: SRCON0
// SR Latch Control Register 0
volatile unsigned char SRCON0 @ 0x11A;
// bit and bitfield definitions
// Pulse Reset Input of the SR Latch
volatile bit SRPR @ ((unsigned)&SRCON0*8)+0;
// Pulse Set Input of the SR Latch
volatile bit SRPS @ ((unsigned)&SRCON0*8)+1;
// SR Latch Q Output Enable bit
volatile bit SRNQEN @ ((unsigned)&SRCON0*8)+2;
// SR Latch Q Output Enable bit
volatile bit SRQEN @ ((unsigned)&SRCON0*8)+3;
// SR Latch Clock divider bits
volatile bit SRCLK0 @ ((unsigned)&SRCON0*8)+4;
// SR Latch Clock divider bits
volatile bit SRCLK1 @ ((unsigned)&SRCON0*8)+5;
// SR Latch Clock divider bits
volatile bit SRCLK2 @ ((unsigned)&SRCON0*8)+6;
// SR Latch Enable bit
volatile bit SRLEN @ ((unsigned)&SRCON0*8)+7;
#ifndef _LIB_BUILD
union {
struct {
volatile unsigned SRPR : 1;
volatile unsigned SRPS : 1;
volatile unsigned SRNQEN : 1;
volatile unsigned SRQEN : 1;
volatile unsigned SRCLK0 : 1;
volatile unsigned SRCLK1 : 1;
volatile unsigned SRCLK2 : 1;
volatile unsigned SRLEN : 1;
};
struct {
volatile unsigned : 4;
volatile unsigned SRCLK : 3;
};
} SRCON0bits @ 0x11A;
#endif
// Register: SRCON1
// SR Latch Control Register 1
volatile unsigned char SRCON1 @ 0x11B;
// bit and bitfield definitions
// SR Latch C1 Reset Enable bit
volatile bit SRRC1E @ ((unsigned)&SRCON1*8)+0;
// SR Latch C2 Reset Enable bit
volatile bit SRRC2E @ ((unsigned)&SRCON1*8)+1;
// SR Latch Reset Clock Enable bit
volatile bit SRRCKE @ ((unsigned)&SRCON1*8)+2;
// SR Latch Peripheral Reset Enable bit
volatile bit SRRPE @ ((unsigned)&SRCON1*8)+3;
// SR Latch C1 Set Enable bit
volatile bit SRSC1E @ ((unsigned)&SRCON1*8)+4;
// SR Latch C2 Set Enable bit
volatile bit SRSC2E @ ((unsigned)&SRCON1*8)+5;
// SR Latch Set Clock Enable bit
volatile bit SRSCKE @ ((unsigned)&SRCON1*8)+6;
// SR Latch Peripheral Set Enable bit
volatile bit SRSPE @ ((unsigned)&SRCON1*8)+7;
#ifndef _LIB_BUILD
union {
struct {
volatile unsigned SRRC1E : 1;
volatile unsigned SRRC2E : 1;
volatile unsigned SRRCKE : 1;
volatile unsigned SRRPE : 1;
volatile unsigned SRSC1E : 1;
volatile unsigned SRSC2E : 1;
volatile unsigned SRSCKE : 1;
volatile unsigned SRSPE : 1;
};
} SRCON1bits @ 0x11B;
#endif
// Register: APFCON0
// Alternate Pin Function Control Register
volatile unsigned char APFCON0 @ 0x11D;
// bit and bitfield definitions
// Timer1 Gate Input Pin Selection
volatile bit SS1SEL @ ((unsigned)&APFCON0*8)+5;
// CCP3 Input/Output Pin Selection
volatile bit SDO1SEL @ ((unsigned)&APFCON0*8)+6;
volatile bit RXDTSEL @ ((unsigned)&APFCON0*8)+7;
#ifndef _LIB_BUILD
union {
struct {
volatile unsigned : 1;
volatile unsigned : 1;
volatile unsigned : 1;
volatile unsigned : 1;
volatile unsigned : 1;
volatile unsigned SS1SEL : 1;
volatile unsigned SDO1SEL : 1;
volatile unsigned RXDTSEL : 1;
};
} APFCON0bits @ 0x11D;
#endif
// Register: APFCON1
volatile unsigned char APFCON1 @ 0x11E;
// bit and bitfield definitions
volatile bit TXCKSEL @ ((unsigned)&APFCON1*8)+0;
#ifndef _LIB_BUILD
union {
struct {
volatile unsigned TXCKSEL : 1;
};
} APFCON1bits @ 0x11E;
#endif
//
// Special function register definitions: Bank 3
//
// Register: ANSELA
volatile unsigned char ANSELA @ 0x18C;
// bit and bitfield definitions
volatile bit ANSA0 @ ((unsigned)&ANSELA*8)+0;
volatile bit ANSA1 @ ((unsigned)&ANSELA*8)+1;
volatile bit ANSA2 @ ((unsigned)&ANSELA*8)+2;
volatile bit ANSA4 @ ((unsigned)&ANSELA*8)+4;
#ifndef _LIB_BUILD
union {
struct {
volatile unsigned ANSA0 : 1;
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