pic16lf1823.h

picc

#ifndef	_HTC_H_
#warning Header file pic16lf1823.h included directly. Use #include <htc.h> instead.
#endif

 /* header file for the MICROCHIP PIC microcontroller
    16LF1823
 */

#ifndef __PIC16LF1823_H
#define __PIC16LF1823_H

//
// Configuration mask definitions
//

// Config Register: CONFIG1
#define CONFIG1              0x8007 
// Oscillator
// LP Oscillator, Low-power crystal on RA4/OSC2/CLKOUT pin and RA5/OSC1/CLKIN
#define FOSC_LP              0xFFF8 
// XT Oscillator, Crystal/resonator on RA4/OSC2/CLKOUT pin and RA5/OSC1/CLKIN
#define FOSC_XT              0xFFF9 
// HS Oscillator, High speed crystal/resonator on RA4/OSC2/CLKOUT pin and RA5/OSC1/CLKIN
#define FOSC_HS              0xFFFA 
// EXTRC Oscillator, RC on RA5/OSC1/CLKIN
#define FOSC_EXTRC           0xFFFB 
// INTOSC Oscillator, I/O function on RA5/OSC1/CLKIN
#define FOSC_INTOSC          0xFFFC 
// ECL, External Clock, Low Power Mode: CLKIN on RA5/OSC1/CLKIN
#define FOSC_ECL             0xFFFD 
// ECM, External Clock, Medium Power Mode: CLKIN on RA5/OSC1/CLKIN
#define FOSC_ECM             0xFFFE 
// ECH, External Clock, High Power Mode: CLKIN on RA5/OSC1/CLKIN
#define FOSC_ECH             0xFFFF 
// Watchdog Timer Enable bit
// WDT enabled
#define WDTE_ON              0xFFFF 
// WDT enabled while running and disabled in Sleep
#define WDTE_NSLEEP          0xFFF7 
// WDT controlled by the SWDTEN bit in the WDTCON register
#define WDTE_SWDTEN          0xFFEF 
// WDT disabled
#define WDTE_OFF             0xFFE7 
// Power-up Timer Enable bit
// PWRT disabled
#define PWRTE_OFF            0xFFFF 
// PWRT enabled
#define PWRTE_ON             0xFFDF 
// MCLR Pin Function Select
// RA3/MCLR/VPP pin function is MCLR
#define MCLRE_ON             0xFFFF 
// RA3/MCLR/VPP pin function is digital input
#define MCLRE_OFF            0xFFBF 
// Flash Program Memory Code Protection bit
// Program memory code protection is disabled
#define CP_OFF               0xFFFF 
// Program memory code protection is enabled
#define CP_ON                0xFF7F 
// Data EE Read Protect
// Data memory code protection is disabled
#define CPD_OFF              0xFFFF 
// Data memory code protection is enabled
#define CPD_ON               0xFEFF 
// Brown-out Reset Enable bits
// Brown-out Reset enabled
#define BOREN_ON             0xFFFF 
// Brown-out Reset enabled while running and disabled in Sleep
#define BOREN_NSLEEP         0xFDFF 
// Brown-out Reset controlled by the SBOREN bit in the PCON register
#define BOREN_SBODEN         0xFBFF 
// Brown-out Reset disabled
#define BOREN_OFF            0xF9FF 
// Clock Out Enable bit
// CLKOUT function is disabled. I/O or oscillator function on RA4/CLKOUT
#define CLKOUTEN_OFF         0xFFFF 
// CLKOUT function is enabled on RA4/CLKOUT pin
#define CLKOUTEN_ON          0xF7FF 
// Internal-External Switch Over
// Internal/External Switchover mode is enabled
#define IESO_ON              0xFFFF 
// Internal/External Switchover mode is disabled
#define IESO_OFF             0xEFFF 
// Fail Clock Monitor Enable
// Fail-Safe Clock Monitor is enabled
#define FCMEN_ON             0xFFFF 
// Fail-Safe Clock Monitor is disabled
#define FCMEN_OFF            0xDFFF 


// Config Register: CONFIG2
#define CONFIG2              0x8009 
// Flash memory self-write protection bits
// Write protection off
#define WRT_OFF              0xFFFF 
// 000h to 1FFh write protected, 200h to 7FFh may be modified by EECON control
#define WRT_BOOT             0xFFFE 
// 000h to 3FFh write protected, 400h to 7FFh may be modified by EECON control
#define WRT_HALF             0xFFFD 
// 000h to 7FFh write protected, no addresses may be modified by EECON control
#define WRT_ALL              0xFFFC 
// VCAP P
// 4x PLL enabled
#define PLLEN_ON             0xFFFF 
// 4x PLL disabled
#define PLLEN_OFF            0xFEFF 
// Stack Overflow/Underflow Reset Enable bit
// Stack Overflow or underflow will cause a Reset
#define STVREN_ON            0xFFFF 
// Stack Overflow or underflow will not cause a Reset
#define STVREN_OFF           0xFDFF 
// Brown-out Reset Voltage selection
// Brown-out Reset Voltage (VBOR) set to 1.9 V
#define BORV_19              0xFFFF 
// Brown-out Reset Voltage (VBOR) set to 2.7 V
#define BORV_27              0xFBFF 
// Debugger Mode
// Background debugger is disabled
#define DEBUG_OFF            0xFFFF 
// Background debugger is enabled
#define DEBUG_ON             0xEFFF 
// Low Voltage Programming Enable bit
// Low voltage programming enabled
#define LVP_ON               0xFFFF 
// High voltage on MCLR/VPP must be used for programming
#define LVP_OFF              0xDFFF 


//
// Special function register definitions: Bank 0
//

// Register: INDF0
volatile unsigned char           INDF0               @ 0x000;
// bit and bitfield definitions

// Register: INDF1
volatile unsigned char           INDF1               @ 0x001;
// bit and bitfield definitions

// Register: PCL
volatile unsigned char           PCL                 @ 0x002;
// bit and bitfield definitions

// Register: STATUS
volatile unsigned char           STATUS              @ 0x003;
// bit and bitfield definitions
volatile bit CARRY               @ ((unsigned)&STATUS*8)+0;
volatile bit DC                  @ ((unsigned)&STATUS*8)+1;
volatile bit ZERO                @ ((unsigned)&STATUS*8)+2;
volatile bit nPD                 @ ((unsigned)&STATUS*8)+3;
volatile bit nTO                 @ ((unsigned)&STATUS*8)+4;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned C                   : 1;
        volatile unsigned DC                  : 1;
        volatile unsigned Z                   : 1;
        volatile unsigned nPD                 : 1;
        volatile unsigned nTO                 : 1;
        volatile unsigned                     : 2;
        volatile unsigned : 1;
    };
} STATUSbits @ 0x003;
#endif
// bit and bitfield definitions

// Register: FSR0L
volatile unsigned char           FSR0L               @ 0x004;
// bit and bitfield definitions

// Register: FSR0H
volatile unsigned char           FSR0H               @ 0x005;
// bit and bitfield definitions

// Register: FSR0
volatile unsigned int            FSR0                @ 0x004;
// bit and bitfield definitions

// Register: FSR1L
volatile unsigned char           FSR1L               @ 0x006;
// bit and bitfield definitions

// Register: FSR1H
volatile unsigned char           FSR1H               @ 0x007;
// bit and bitfield definitions

// Register: FSR1
volatile unsigned int            FSR1                @ 0x006;

// Register: BSR
volatile unsigned char           BSR                 @ 0x008;
// bit and bitfield definitions
volatile bit BSR0                @ ((unsigned)&BSR*8)+0;
volatile bit BSR1                @ ((unsigned)&BSR*8)+1;
volatile bit BSR2                @ ((unsigned)&BSR*8)+2;
volatile bit BSR3                @ ((unsigned)&BSR*8)+3;
volatile bit BSR4                @ ((unsigned)&BSR*8)+4;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned BSR0                : 1;
        volatile unsigned BSR1                : 1;
        volatile unsigned BSR2                : 1;
        volatile unsigned BSR3                : 1;
        volatile unsigned BSR4                : 1;
    };
    struct {
        volatile unsigned BSR                 : 5;
    };
} BSRbits @ 0x008;
#endif

// Register: WREG
volatile unsigned char           WREG                @ 0x009;
// bit and bitfield definitions

// Register: PCLATH
volatile unsigned char           PCLATH              @ 0x00A;
// bit and bitfield definitions
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned PCLATH              : 7;
    };
} PCLATHbits @ 0x00A;
#endif

// Register: INTCON
volatile unsigned char           INTCON              @ 0x00B;
// bit and bitfield definitions
volatile bit IOCIF               @ ((unsigned)&INTCON*8)+0;
volatile bit INTF                @ ((unsigned)&INTCON*8)+1;
volatile bit TMR0IF              @ ((unsigned)&INTCON*8)+2;
volatile bit IOCIE               @ ((unsigned)&INTCON*8)+3;
volatile bit INTE                @ ((unsigned)&INTCON*8)+4;
volatile bit TMR0IE              @ ((unsigned)&INTCON*8)+5;
volatile bit PEIE                @ ((unsigned)&INTCON*8)+6;
volatile bit GIE                 @ ((unsigned)&INTCON*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned IOCIF               : 1;
        volatile unsigned INTF                : 1;
        volatile unsigned TMR0IF              : 1;
        volatile unsigned IOCIE               : 1;
        volatile unsigned INTE                : 1;
        volatile unsigned TMR0IE              : 1;
        volatile unsigned PEIE                : 1;
        volatile unsigned GIE                 : 1;
    };
} INTCONbits @ 0x00B;
#endif

// Register: PORTA
volatile unsigned char           PORTA               @ 0x00C;
// bit and bitfield definitions
volatile bit RA0                 @ ((unsigned)&PORTA*8)+0;
volatile bit RA1                 @ ((unsigned)&PORTA*8)+1;
volatile bit RA2                 @ ((unsigned)&PORTA*8)+2;
volatile bit RA3                 @ ((unsigned)&PORTA*8)+3;
volatile bit RA4                 @ ((unsigned)&PORTA*8)+4;
volatile bit RA5                 @ ((unsigned)&PORTA*8)+5;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned RA0                 : 1;
        volatile unsigned RA1                 : 1;
        volatile unsigned RA2                 : 1;
        volatile unsigned RA3                 : 1;
        volatile unsigned RA4                 : 1;
        volatile unsigned RA5                 : 1;
        volatile unsigned                     : 1;
        volatile unsigned : 1;
    };
    struct {
        volatile unsigned RA                  : 6;
        volatile unsigned : 2;
    };
} PORTAbits @ 0x00C;
#endif

// Register: PORTC
volatile unsigned char           PORTC               @ 0x00E;
// bit and bitfield definitions
volatile bit RC0                 @ ((unsigned)&PORTC*8)+0;
volatile bit RC1                 @ ((unsigned)&PORTC*8)+1;
volatile bit RC2                 @ ((unsigned)&PORTC*8)+2;
volatile bit RC3                 @ ((unsigned)&PORTC*8)+3;
volatile bit RC4                 @ ((unsigned)&PORTC*8)+4;
volatile bit RC5                 @ ((unsigned)&PORTC*8)+5;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned RC0                 : 1;
        volatile unsigned RC1                 : 1;
        volatile unsigned RC2                 : 1;
        volatile unsigned RC3                 : 1;
        volatile unsigned RC4                 : 1;
        volatile unsigned RC5                 : 1;
        volatile unsigned                     : 1;
        volatile unsigned : 1;
    };
    struct {
        volatile unsigned RC                  : 6;
    };
} PORTCbits @ 0x00E;
#endif

// Register: PIR1
volatile unsigned char           PIR1                @ 0x011;
// bit and bitfield definitions
// TMR1 Overflow Interrupt Flag bit
volatile bit TMR1IF              @ ((unsigned)&PIR1*8)+0;
// TMR2 to PR2 Match Interrupt Flag bit
volatile bit TMR2IF              @ ((unsigned)&PIR1*8)+1;
// CCP1 Interrupt Flag bit
volatile bit CCP1IF              @ ((unsigned)&PIR1*8)+2;
// Master Synchronous Serial Port (MSSP) Interrupt Flag bit
volatile bit SSP1IF              @ ((unsigned)&PIR1*8)+3;
// EUSART Transmit Interrupt Flag bit
volatile bit TXIF                @ ((unsigned)&PIR1*8)+4;
// EUSART Receive Interrupt Flag bit
volatile bit RCIF                @ ((unsigned)&PIR1*8)+5;
// A/D Converter Interrupt Flag bit
volatile bit ADIF                @ ((unsigned)&PIR1*8)+6;
// Timer1 Gate Interrupt Flag bit
volatile bit TMR1GIF             @ ((unsigned)&PIR1*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned TMR1IF              : 1;
        volatile unsigned TMR2IF              : 1;
        volatile unsigned CCP1IF              : 1;
        volatile unsigned SSP1IF              : 1;
        volatile unsigned TXIF                : 1;
        volatile unsigned RCIF                : 1;
        volatile unsigned ADIF                : 1;
        volatile unsigned TMR1GIF             : 1;
    };
} PIR1bits @ 0x011;
#endif

// Register: PIR2
volatile unsigned char           PIR2                @ 0x012;
// bit and bitfield definitions
volatile bit BCL1IF              @ ((unsigned)&PIR2*8)+3;
volatile bit EEIF                @ ((unsigned)&PIR2*8)+4;
volatile bit C1IF                @ ((unsigned)&PIR2*8)+5;