pic16f1934.h

picc

        volatile unsigned TRISB7              : 1;
    };
} TRISBbits @ 0x08D;
#endif

// Register: TRISC
// PORTC Data Direction Control Register
volatile unsigned char           TRISC               @ 0x08E;
// bit and bitfield definitions
volatile bit TRISC0              @ ((unsigned)&TRISC*8)+0;
volatile bit TRISC1              @ ((unsigned)&TRISC*8)+1;
volatile bit TRISC2              @ ((unsigned)&TRISC*8)+2;
volatile bit TRISC3              @ ((unsigned)&TRISC*8)+3;
volatile bit TRISC4              @ ((unsigned)&TRISC*8)+4;
volatile bit TRISC5              @ ((unsigned)&TRISC*8)+5;
volatile bit TRISC6              @ ((unsigned)&TRISC*8)+6;
volatile bit TRISC7              @ ((unsigned)&TRISC*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned TRISC0              : 1;
        volatile unsigned TRISC1              : 1;
        volatile unsigned TRISC2              : 1;
        volatile unsigned TRISC3              : 1;
        volatile unsigned TRISC4              : 1;
        volatile unsigned TRISC5              : 1;
        volatile unsigned TRISC6              : 1;
        volatile unsigned TRISC7              : 1;
    };
} TRISCbits @ 0x08E;
#endif

// Register: TRISD
// PORTD Data Direction Control Register
volatile unsigned char           TRISD               @ 0x08F;
// bit and bitfield definitions
volatile bit TRISD0              @ ((unsigned)&TRISD*8)+0;
volatile bit TRISD1              @ ((unsigned)&TRISD*8)+1;
volatile bit TRISD2              @ ((unsigned)&TRISD*8)+2;
volatile bit TRISD3              @ ((unsigned)&TRISD*8)+3;
volatile bit TRISD4              @ ((unsigned)&TRISD*8)+4;
volatile bit TRISD5              @ ((unsigned)&TRISD*8)+5;
volatile bit TRISD6              @ ((unsigned)&TRISD*8)+6;
volatile bit TRISD7              @ ((unsigned)&TRISD*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned TRISD0              : 1;
        volatile unsigned TRISD1              : 1;
        volatile unsigned TRISD2              : 1;
        volatile unsigned TRISD3              : 1;
        volatile unsigned TRISD4              : 1;
        volatile unsigned TRISD5              : 1;
        volatile unsigned TRISD6              : 1;
        volatile unsigned TRISD7              : 1;
    };
} TRISDbits @ 0x08F;
#endif

// Register: TRISE
volatile unsigned char           TRISE               @ 0x090;
// bit and bitfield definitions
volatile bit TRISE0              @ ((unsigned)&TRISE*8)+0;
volatile bit TRISE1              @ ((unsigned)&TRISE*8)+1;
volatile bit TRISE2              @ ((unsigned)&TRISE*8)+2;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned TRISE0              : 1;
        volatile unsigned TRISE1              : 1;
        volatile unsigned TRISE2              : 1;
        volatile unsigned                     : 1;
    };
} TRISEbits @ 0x090;
#endif

// Register: PIE1
// Peripheral Interrupt Enable Register 1
volatile unsigned char           PIE1                @ 0x091;
// bit and bitfield definitions
// TMR1 Overflow Interrupt Enable bit
volatile bit TMR1IE              @ ((unsigned)&PIE1*8)+0;
// TMR2 to PR2 Match Interrupt Enable bit
volatile bit TMR2IE              @ ((unsigned)&PIE1*8)+1;
// CCP1 Interrupt Enable bit
volatile bit CCP1IE              @ ((unsigned)&PIE1*8)+2;
// Master Synchronous Serial Port (MSSP) Interrupt Enable bit
volatile bit SSPIE               @ ((unsigned)&PIE1*8)+3;
// EUSART Transmit Interrupt Enable bit
volatile bit TXIE                @ ((unsigned)&PIE1*8)+4;
// EUSART Receive Interrupt Enable bit
volatile bit RCIE                @ ((unsigned)&PIE1*8)+5;
// A/D Converter Interrupt Enable bit
volatile bit ADIE                @ ((unsigned)&PIE1*8)+6;
// Timer1 Gate Interrupt Enable bit
volatile bit TMR1GIE             @ ((unsigned)&PIE1*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned TMR1IE              : 1;
        volatile unsigned TMR2IE              : 1;
        volatile unsigned CCP1IE              : 1;
        volatile unsigned SSPIE               : 1;
        volatile unsigned TXIE                : 1;
        volatile unsigned RCIE                : 1;
        volatile unsigned ADIE                : 1;
        volatile unsigned TMR1GIE             : 1;
    };
} PIE1bits @ 0x091;
#endif

// Register: PIE2
// Peripheral Interrupt Enable Register 2
volatile unsigned char           PIE2                @ 0x092;
// bit and bitfield definitions
// CCP2 Interrupt Enable bit
volatile bit CCP2IE              @ ((unsigned)&PIE2*8)+0;
// LCD Module Interrupt Enable bit
volatile bit LCDIE               @ ((unsigned)&PIE2*8)+2;
// MSSP Bus Collision Interrupt Interrupt Enable bit
volatile bit BCLIE               @ ((unsigned)&PIE2*8)+3;
// EEPROM Write Completion Interrupt Enable bit
volatile bit EEIE                @ ((unsigned)&PIE2*8)+4;
// Comparator C1 Interrupt Enable bit
volatile bit C1IE                @ ((unsigned)&PIE2*8)+5;
// Comparator C2 Interrupt Enable bit
volatile bit C2IE                @ ((unsigned)&PIE2*8)+6;
// CCP2 Interrupt Enable bit
volatile bit OSFIE               @ ((unsigned)&PIE2*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned CCP2IE              : 1;
        volatile unsigned                     : 1;
        volatile unsigned LCDIE               : 1;
        volatile unsigned BCLIE               : 1;
        volatile unsigned EEIE                : 1;
        volatile unsigned C1IE                : 1;
        volatile unsigned C2IE                : 1;
        volatile unsigned OSFIE               : 1;
    };
} PIE2bits @ 0x092;
#endif

// Register: PIE3
// Peripheral Interrupt Enable Register 3
volatile unsigned char           PIE3                @ 0x093;
// bit and bitfield definitions
// TMR4 to PR4 Match Interrupt Enable bit
volatile bit TMR4IE              @ ((unsigned)&PIE3*8)+1;
// TMR6 to PR6 Match Interrupt Enable bit
volatile bit TMR6IE              @ ((unsigned)&PIE3*8)+3;
// CCP3 Interrupt Enable bit
volatile bit CCP3IE              @ ((unsigned)&PIE3*8)+4;
// CCP4 Interrupt Enable bit
volatile bit CCP4IE              @ ((unsigned)&PIE3*8)+5;
// CCP5 Interrupt Enable bit
volatile bit CCP5IE              @ ((unsigned)&PIE3*8)+6;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned                     : 1;
        volatile unsigned TMR4IE              : 1;
        volatile unsigned : 1;
        volatile unsigned TMR6IE              : 1;
        volatile unsigned CCP3IE              : 1;
        volatile unsigned CCP4IE              : 1;
        volatile unsigned CCP5IE              : 1;
    };
} PIE3bits @ 0x093;
#endif

// Register: OPTION_REG
// Option Register
volatile unsigned char           OPTION_REG          @ 0x095;
// bit and bitfield definitions
// Prescaler Rate Select bits
volatile bit PS0                 @ ((unsigned)&OPTION_REG*8)+0;
// Prescaler Rate Select bits
volatile bit PS1                 @ ((unsigned)&OPTION_REG*8)+1;
// Prescaler Rate Select bits
volatile bit PS2                 @ ((unsigned)&OPTION_REG*8)+2;
// Prescaler Active bit
volatile bit PSA                 @ ((unsigned)&OPTION_REG*8)+3;
// TMR0 Source Edge Select bit
volatile bit T0SE                @ ((unsigned)&OPTION_REG*8)+4;
// TMR0 Clock Source Select bit
volatile bit T0CS                @ ((unsigned)&OPTION_REG*8)+5;
// Interrupt Edge Select bit
volatile bit INTEDG              @ ((unsigned)&OPTION_REG*8)+6;
// Weak Pull-up Enable bit
volatile bit nWPUEN              @ ((unsigned)&OPTION_REG*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned PS0                 : 1;
        volatile unsigned PS1                 : 1;
        volatile unsigned PS2                 : 1;
        volatile unsigned PSA                 : 1;
        volatile unsigned T0SE                : 1;
        volatile unsigned T0CS                : 1;
        volatile unsigned INTEDG              : 1;
        volatile unsigned nWPUEN              : 1;
    };
    struct {
        volatile unsigned PS                  : 3;
    };
} OPTION_REGbits @ 0x095;
#endif

// Register: PCON
// Power Control Register
volatile unsigned char           PCON                @ 0x096;
// bit and bitfield definitions
// Brown-out Reset Status bit
volatile bit nBOR                @ ((unsigned)&PCON*8)+0;
// Power-on Reset Status bit
volatile bit nPOR                @ ((unsigned)&PCON*8)+1;
// RESET Instruction Flag bit
volatile bit nRI                 @ ((unsigned)&PCON*8)+2;
// MCLR Reset Flag bit
volatile bit nRMCLR              @ ((unsigned)&PCON*8)+3;
// Stack Underflow Flag bit
volatile bit STKUNF              @ ((unsigned)&PCON*8)+6;
// Stack Overflow Flag bit
volatile bit STKOVF              @ ((unsigned)&PCON*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned nBOR                : 1;
        volatile unsigned nPOR                : 1;
        volatile unsigned nRI                 : 1;
        volatile unsigned nRMCLR              : 1;
        volatile unsigned                     : 1;
        volatile unsigned : 1;
        volatile unsigned STKUNF              : 1;
        volatile unsigned STKOVF              : 1;
    };
} PCONbits @ 0x096;
#endif

// Register: WDTCON
// Watchdog Timer Control Register
volatile unsigned char           WDTCON              @ 0x097;
// bit and bitfield definitions
// Software Enable/Disable for Watch Dog Timer bit
volatile bit SWDTEN              @ ((unsigned)&WDTCON*8)+0;
// Watchdog Timer Period Select bits
volatile bit WDTPS0              @ ((unsigned)&WDTCON*8)+1;
// Watchdog Timer Period Select bits
volatile bit WDTPS1              @ ((unsigned)&WDTCON*8)+2;
// Watchdog Timer Period Select bits
volatile bit WDTPS2              @ ((unsigned)&WDTCON*8)+3;
// Watchdog Timer Period Select bits
volatile bit WDTPS3              @ ((unsigned)&WDTCON*8)+4;
// Watchdog Timer Period Select bits
volatile bit WDTPS4              @ ((unsigned)&WDTCON*8)+5;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned SWDTEN              : 1;
        volatile unsigned WDTPS0              : 1;
        volatile unsigned WDTPS1              : 1;
        volatile unsigned WDTPS2              : 1;
        volatile unsigned WDTPS3              : 1;
        volatile unsigned WDTPS4              : 1;
    };
    struct {
        volatile unsigned                     : 1;
        volatile unsigned WDTPS               : 5;
    };
} WDTCONbits @ 0x097;
#endif

// Register: OSCTUNE
// Oscillator Tuning Register
volatile unsigned char           OSCTUNE             @ 0x098;
// bit and bitfield definitions
// Frequency Tuning bits
volatile bit TUN0                @ ((unsigned)&OSCTUNE*8)+0;
// Frequency Tuning bits
volatile bit TUN1                @ ((unsigned)&OSCTUNE*8)+1;
// Frequency Tuning bits
volatile bit TUN2                @ ((unsigned)&OSCTUNE*8)+2;
// Frequency Tuning bits
volatile bit TUN3                @ ((unsigned)&OSCTUNE*8)+3;
// Frequency Tuning bits
volatile bit TUN4                @ ((unsigned)&OSCTUNE*8)+4;
// Frequency Tuning bits
volatile bit TUN5                @ ((unsigned)&OSCTUNE*8)+5;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned TUN0                : 1;
        volatile unsigned TUN1                : 1;
        volatile unsigned TUN2                : 1;
        volatile unsigned TUN3                : 1;
        volatile unsigned TUN4                : 1;
        volatile unsigned TUN5                : 1;
    };
    struct {
        volatile unsigned TUN                 : 6;
    };
} OSCTUNEbits @ 0x098;
#endif

// Register: OSCCON
// Oscillator Control Register
volatile unsigned char           OSCCON              @ 0x099;
// bit and bitfield definitions
// System clock select bit
volatile bit SCS0                @ ((unsigned)&OSCCON*8)+0;
// System clock select bit
volatile bit SCS1                @ ((unsigned)&OSCCON*8)+1;
// Internal Oscillator Frequency Select bits
volatile bit IRCF0               @ ((unsigned)&OSCCON*8)+3;
// Internal Oscillator Frequency Select bits
volatile bit IRCF1               @ ((unsigned)&OSCCON*8)+4;
// Internal Oscillator Frequency Select bits
volatile bit IRCF2               @ ((unsigned)&OSCCON*8)+5;
// Internal Oscillator Frequency Select bits
volatile bit IRCF3               @ ((unsigned)&OSCCON*8)+6;
// Software PLL Enable bit
volatile bit SPLLEN              @ ((unsigned)&OSCCON*8)+7;
#ifndef _LIB_BUILD
union {
    struct {
        volatile unsigned SCS0                : 1;
        volatile unsigned SCS1                : 1;
        volatile unsigned                     : 1;
        volatile unsigned IRCF0               : 1;
        volatile unsigned IRCF1               : 1;
        volatile unsigned IRCF2               : 1;
        volatile unsigned IRCF3               : 1;
        volatile unsigned SPLLEN              : 1;
    };
    struct {
        volatile unsigned SCS                 : 2;