📄 pic24hj256gp210.h
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static volatile bit ILR2 @ ((unsigned)&INTREG*8)+10;
static volatile bit ILR3 @ ((unsigned)&INTREG*8)+11;
static volatile bit TMODE @ ((unsigned)&INTREG*8)+14;
static volatile bit IRQtoCPU @ ((unsigned)&INTREG*8)+15;
/* Microchip compatible bit field */
static volatile struct {
volatile unsigned IRQtoCPU : 1;
volatile unsigned TMODE : 1;
unsigned : 1;
unsigned : 1;
volatile unsigned ILR : 4;
unsigned : 1;
unsigned : 1;
volatile unsigned VECNUM : 6;
} INTREGbits @ 0xE0;
static volatile unsigned int IFS3 @ 0x8A;
static volatile bit I2C2IF @ ((unsigned)&IFS3*8)+1;
static volatile bit BCL2IF @ ((unsigned)&IFS3*8)+2;
static volatile bit INT3IF @ ((unsigned)&IFS3*8)+5;
static volatile bit INT4IF @ ((unsigned)&IFS3*8)+6;
static volatile bit DMA5IF @ ((unsigned)&IFS3*8)+13;
static volatile bit RTCCIF @ ((unsigned)&IFS3*8)+14;
/* Microchip compatible bit field */
static volatile struct {
unsigned : 1;
volatile unsigned RTCCIF : 1;
volatile unsigned DMA5IF : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
volatile unsigned INT4IF : 1;
volatile unsigned INT3IF : 1;
unsigned : 1;
unsigned : 1;
volatile unsigned BCL2IF : 1;
volatile unsigned I2C2IF : 1;
unsigned : 1;
} IFS3bits @ 0x8A;
static volatile unsigned int IEC3 @ 0x9A;
static volatile bit I2C2IE @ ((unsigned)&IEC3*8)+1;
static volatile bit BCL2IE @ ((unsigned)&IEC3*8)+2;
static volatile bit INT3IE @ ((unsigned)&IEC3*8)+5;
static volatile bit INT4IE @ ((unsigned)&IEC3*8)+6;
static volatile bit DMA5IE @ ((unsigned)&IEC3*8)+13;
static volatile bit RTCCIE @ ((unsigned)&IEC3*8)+14;
/* Microchip compatible bit field */
static volatile struct {
unsigned : 1;
volatile unsigned RTCCIE : 1;
volatile unsigned DMA5IE : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
volatile unsigned INT4IE : 1;
volatile unsigned INT3IE : 1;
unsigned : 1;
unsigned : 1;
volatile unsigned BCL2IE : 1;
volatile unsigned I2C2IE : 1;
unsigned : 1;
} IEC3bits @ 0x9A;
static volatile unsigned int IPC12 @ 0xBC;
static volatile bit I2C2IP0 @ ((unsigned)&IPC12*8)+4;
static volatile bit I2C2IP1 @ ((unsigned)&IPC12*8)+5;
static volatile bit I2C2IP2 @ ((unsigned)&IPC12*8)+6;
static volatile bit BCL2IP0 @ ((unsigned)&IPC12*8)+8;
static volatile bit BCL2IP1 @ ((unsigned)&IPC12*8)+9;
static volatile bit BCL2IP2 @ ((unsigned)&IPC12*8)+10;
/* Microchip compatible bit field */
static volatile struct {
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
volatile unsigned BCL2IP : 3;
unsigned : 1;
volatile unsigned I2C2IP : 3;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
} IPC12bits @ 0xBC;
static volatile unsigned int TMR1 @ 0x100;
static volatile unsigned int PR1 @ 0x102;
static volatile unsigned int T1CON @ 0x104;
static volatile bit T1CS @ ((unsigned)&T1CON*8)+1;
static volatile bit T1SYNC @ ((unsigned)&T1CON*8)+2;
static volatile bit T1CKPS0 @ ((unsigned)&T1CON*8)+4;
static volatile bit T1CKPS1 @ ((unsigned)&T1CON*8)+5;
static volatile bit T1GATE @ ((unsigned)&T1CON*8)+6;
static volatile bit T1SIDL @ ((unsigned)&T1CON*8)+13;
static volatile bit T1ON @ ((unsigned)&T1CON*8)+15;
/* Microchip compatible bit field */
static volatile struct {
volatile unsigned T1ON : 1;
unsigned : 1;
volatile unsigned T1SIDL : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
volatile unsigned T1GATE : 1;
volatile unsigned T1CKPS : 2;
unsigned : 1;
volatile unsigned T1SYNC : 1;
volatile unsigned T1CS : 1;
unsigned : 1;
} T1CONbits @ 0x104;
static volatile unsigned int TMR2 @ 0x106;
static volatile unsigned int TMR3HLD @ 0x108;
static volatile unsigned int TMR3 @ 0x10A;
static volatile unsigned int PR2 @ 0x10C;
static volatile unsigned int PR3 @ 0x10E;
static volatile unsigned int T2CON @ 0x110;
static volatile bit T2CS @ ((unsigned)&T2CON*8)+1;
static volatile bit T2T32 @ ((unsigned)&T2CON*8)+3;
static volatile bit T2CKPS0 @ ((unsigned)&T2CON*8)+4;
static volatile bit T2CKPS1 @ ((unsigned)&T2CON*8)+5;
static volatile bit T2GATE @ ((unsigned)&T2CON*8)+6;
static volatile bit T2SIDL @ ((unsigned)&T2CON*8)+13;
static volatile bit T2ON @ ((unsigned)&T2CON*8)+15;
/* Microchip compatible bit field */
static volatile struct {
volatile unsigned T2ON : 1;
unsigned : 1;
volatile unsigned T2SIDL : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
volatile unsigned T2GATE : 1;
volatile unsigned T2CKPS : 2;
volatile unsigned T32 : 1;
unsigned : 1;
volatile unsigned T2CS : 1;
unsigned : 1;
} T2CONbits @ 0x110;
static volatile unsigned int T3CON @ 0x112;
static volatile bit T3CS @ ((unsigned)&T3CON*8)+1;
static volatile bit T3CKPS0 @ ((unsigned)&T3CON*8)+4;
static volatile bit T3CKPS1 @ ((unsigned)&T3CON*8)+5;
static volatile bit T3GATE @ ((unsigned)&T3CON*8)+6;
static volatile bit T3SIDL @ ((unsigned)&T3CON*8)+13;
static volatile bit T3ON @ ((unsigned)&T3CON*8)+15;
/* Microchip compatible bit field */
static volatile struct {
volatile unsigned T3ON : 1;
unsigned : 1;
volatile unsigned T3SIDL : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
volatile unsigned T3GATE : 1;
volatile unsigned T3CKPS : 2;
unsigned : 1;
unsigned : 1;
volatile unsigned T3CS : 1;
unsigned : 1;
} T3CONbits @ 0x112;
static volatile unsigned int TMR4 @ 0x114;
static volatile unsigned int TMR5HLD @ 0x116;
static volatile unsigned int TMR5 @ 0x118;
static volatile unsigned int PR4 @ 0x11A;
static volatile unsigned int PR5 @ 0x11C;
static volatile unsigned int T4CON @ 0x11E;
static volatile bit T4CS @ ((unsigned)&T4CON*8)+1;
static volatile bit T4T45 @ ((unsigned)&T4CON*8)+3;
static volatile bit T4CKPS0 @ ((unsigned)&T4CON*8)+4;
static volatile bit T4CKPS1 @ ((unsigned)&T4CON*8)+5;
static volatile bit T4GATE @ ((unsigned)&T4CON*8)+6;
static volatile bit T4SIDL @ ((unsigned)&T4CON*8)+13;
static volatile bit T4ON @ ((unsigned)&T4CON*8)+15;
/* Microchip compatible bit field */
static volatile struct {
volatile unsigned T4ON : 1;
unsigned : 1;
volatile unsigned T4SIDL : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
volatile unsigned T4GATE : 1;
volatile unsigned T4CKPS : 2;
volatile unsigned T45 : 1;
unsigned : 1;
volatile unsigned T4CS : 1;
unsigned : 1;
} T4CONbits @ 0x11E;
static volatile unsigned int T5CON @ 0x120;
static volatile bit T5CS @ ((unsigned)&T5CON*8)+1;
static volatile bit T5CKPS0 @ ((unsigned)&T5CON*8)+4;
static volatile bit T5CKPS1 @ ((unsigned)&T5CON*8)+5;
static volatile bit T5GATE @ ((unsigned)&T5CON*8)+6;
static volatile bit T5SIDL @ ((unsigned)&T5CON*8)+13;
static volatile bit T5ON @ ((unsigned)&T5CON*8)+15;
/* Microchip compatible bit field */
static volatile struct {
volatile unsigned T5ON : 1;
unsigned : 1;
volatile unsigned T5SIDL : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
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