📄 pic24hj256gp210.h
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unsigned : 1;
volatile unsigned INT1IE : 1;
volatile unsigned CNIE : 1;
volatile unsigned CMPIE : 1;
volatile unsigned BCL1IE : 1;
volatile unsigned I2C1IE : 1;
} IEC1bits @ 0x96;
static volatile unsigned int IEC2 @ 0x98;
static volatile bit SPF2IE @ ((unsigned)&IEC2*8)+0;
static volatile bit SPI2IE @ ((unsigned)&IEC2*8)+1;
static volatile bit DMA3IE @ ((unsigned)&IEC2*8)+4;
static volatile bit IC3IE @ ((unsigned)&IEC2*8)+5;
static volatile bit IC4IE @ ((unsigned)&IEC2*8)+6;
static volatile bit IC5IE @ ((unsigned)&IEC2*8)+7;
static volatile bit OC5IE @ ((unsigned)&IEC2*8)+9;
static volatile bit PMPIE @ ((unsigned)&IEC2*8)+13;
static volatile bit DMA4IE @ ((unsigned)&IEC2*8)+14;
/* Microchip compatible bit field */
static volatile struct {
unsigned : 1;
volatile unsigned DMA4IE : 1;
volatile unsigned PMPIE : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
volatile unsigned OC5IE : 1;
unsigned : 1;
volatile unsigned IC5IE : 1;
volatile unsigned IC4IE : 1;
volatile unsigned IC3IE : 1;
volatile unsigned DMA3IE : 1;
unsigned : 1;
unsigned : 1;
volatile unsigned SPI2IE : 1;
volatile unsigned SPI2FLTIE : 1;
} IEC2bits @ 0x98;
static volatile unsigned int IEC4 @ 0x9C;
static volatile bit U1ERRIE @ ((unsigned)&IEC4*8)+1;
static volatile bit U2ERRIE @ ((unsigned)&IEC4*8)+2;
static volatile bit CRCIE @ ((unsigned)&IEC4*8)+3;
static volatile bit DMA6IE @ ((unsigned)&IEC4*8)+4;
static volatile bit DMA7IE @ ((unsigned)&IEC4*8)+5;
/* Microchip compatible bit field */
static volatile struct {
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
volatile unsigned DMA7IE : 1;
volatile unsigned DMA6IE : 1;
volatile unsigned CRCIE : 1;
volatile unsigned U2ERRIE : 1;
volatile unsigned U1ERRIE : 1;
unsigned : 1;
} IEC4bits @ 0x9C;
static volatile unsigned int IPC0 @ 0xA4;
static volatile bit INT0IP0 @ ((unsigned)&IPC0*8)+0;
static volatile bit INT0IP1 @ ((unsigned)&IPC0*8)+1;
static volatile bit INT0IP2 @ ((unsigned)&IPC0*8)+2;
static volatile bit IC1IP0 @ ((unsigned)&IPC0*8)+4;
static volatile bit IC1IP1 @ ((unsigned)&IPC0*8)+5;
static volatile bit IC1IP2 @ ((unsigned)&IPC0*8)+6;
static volatile bit OC1IP0 @ ((unsigned)&IPC0*8)+8;
static volatile bit OC1IP1 @ ((unsigned)&IPC0*8)+9;
static volatile bit OC1IP2 @ ((unsigned)&IPC0*8)+10;
static volatile bit T1IP0 @ ((unsigned)&IPC0*8)+12;
static volatile bit T1IP1 @ ((unsigned)&IPC0*8)+13;
static volatile bit T1IP2 @ ((unsigned)&IPC0*8)+14;
/* Microchip compatible bit field */
static volatile struct {
unsigned : 1;
volatile unsigned T1IP : 3;
unsigned : 1;
volatile unsigned OC1IP : 3;
unsigned : 1;
volatile unsigned IC1IP : 3;
unsigned : 1;
volatile unsigned INT0IP : 3;
} IPC0bits @ 0xA4;
static volatile unsigned int IPC1 @ 0xA6;
static volatile bit DMA0IP0 @ ((unsigned)&IPC1*8)+0;
static volatile bit DMA0IP1 @ ((unsigned)&IPC1*8)+1;
static volatile bit DMA0IP2 @ ((unsigned)&IPC1*8)+2;
static volatile bit IC2IP0 @ ((unsigned)&IPC1*8)+4;
static volatile bit IC2IP1 @ ((unsigned)&IPC1*8)+5;
static volatile bit IC2IP2 @ ((unsigned)&IPC1*8)+6;
static volatile bit OC2IP0 @ ((unsigned)&IPC1*8)+8;
static volatile bit OC2IP1 @ ((unsigned)&IPC1*8)+9;
static volatile bit OC2IP2 @ ((unsigned)&IPC1*8)+10;
static volatile bit T2IP0 @ ((unsigned)&IPC1*8)+12;
static volatile bit T2IP1 @ ((unsigned)&IPC1*8)+13;
static volatile bit T2IP2 @ ((unsigned)&IPC1*8)+14;
/* Microchip compatible bit field */
static volatile struct {
unsigned : 1;
volatile unsigned T2IP : 3;
unsigned : 1;
volatile unsigned OC2IP : 3;
unsigned : 1;
volatile unsigned IC2IP : 3;
unsigned : 1;
volatile unsigned DMA0IP : 3;
} IPC1bits @ 0xA6;
static volatile unsigned int IPC2 @ 0xA8;
static volatile bit T3IP0 @ ((unsigned)&IPC2*8)+0;
static volatile bit T3IP1 @ ((unsigned)&IPC2*8)+1;
static volatile bit T3IP2 @ ((unsigned)&IPC2*8)+2;
static volatile bit SPF1IP0 @ ((unsigned)&IPC2*8)+4;
static volatile bit SPF1IP1 @ ((unsigned)&IPC2*8)+5;
static volatile bit SPF1IP2 @ ((unsigned)&IPC2*8)+6;
static volatile bit SP1IP0 @ ((unsigned)&IPC2*8)+8;
static volatile bit SP1IP1 @ ((unsigned)&IPC2*8)+9;
static volatile bit SP1IP2 @ ((unsigned)&IPC2*8)+10;
static volatile bit U1RXIP0 @ ((unsigned)&IPC2*8)+12;
static volatile bit U1RXIP1 @ ((unsigned)&IPC2*8)+13;
static volatile bit U1RXIP2 @ ((unsigned)&IPC2*8)+14;
/* Microchip compatible bit field */
static volatile struct {
unsigned : 1;
volatile unsigned U1RXIP : 3;
unsigned : 1;
volatile unsigned SP1IP : 3;
unsigned : 1;
volatile unsigned SPI1FLTIP : 3;
unsigned : 1;
volatile unsigned T3IP : 3;
} IPC2bits @ 0xA8;
static volatile unsigned int IPC3 @ 0xAA;
static volatile bit U1TXIP0 @ ((unsigned)&IPC3*8)+0;
static volatile bit U1TXIP1 @ ((unsigned)&IPC3*8)+1;
static volatile bit U1TXIP2 @ ((unsigned)&IPC3*8)+2;
static volatile bit ADIP0 @ ((unsigned)&IPC3*8)+4;
static volatile bit ADIP1 @ ((unsigned)&IPC3*8)+5;
static volatile bit ADIP2 @ ((unsigned)&IPC3*8)+6;
static volatile bit DMA1IP0 @ ((unsigned)&IPC3*8)+8;
static volatile bit DMA1IP1 @ ((unsigned)&IPC3*8)+9;
static volatile bit DMA1IP2 @ ((unsigned)&IPC3*8)+10;
/* Microchip compatible bit field */
static volatile struct {
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
volatile unsigned DMA1IP : 3;
unsigned : 1;
volatile unsigned ADIP : 3;
unsigned : 1;
volatile unsigned U1TXIP : 3;
} IPC3bits @ 0xAA;
static volatile unsigned int IPC4 @ 0xAC;
static volatile bit I2C1IP0 @ ((unsigned)&IPC4*8)+0;
static volatile bit I2C1IP1 @ ((unsigned)&IPC4*8)+1;
static volatile bit I2C1IP2 @ ((unsigned)&IPC4*8)+2;
static volatile bit BCL1IP0 @ ((unsigned)&IPC4*8)+4;
static volatile bit BCL1IP1 @ ((unsigned)&IPC4*8)+5;
static volatile bit BCL1IP2 @ ((unsigned)&IPC4*8)+6;
static volatile bit CMPIP0 @ ((unsigned)&IPC4*8)+8;
static volatile bit CMPIP1 @ ((unsigned)&IPC4*8)+9;
static volatile bit CMPIP2 @ ((unsigned)&IPC4*8)+10;
static volatile bit CNIP0 @ ((unsigned)&IPC4*8)+12;
static volatile bit CNIP1 @ ((unsigned)&IPC4*8)+13;
static volatile bit CNIP2 @ ((unsigned)&IPC4*8)+14;
/* Microchip compatible bit field */
static volatile struct {
unsigned : 1;
volatile unsigned CNIP : 3;
unsigned : 1;
volatile unsigned CMPIP : 3;
unsigned : 1;
volatile unsigned BCL1IP : 3;
unsigned : 1;
volatile unsigned I2C1IP : 3;
} IPC4bits @ 0xAC;
static volatile unsigned int IPC5 @ 0xAE;
static volatile bit INT1IP0 @ ((unsigned)&IPC5*8)+0;
static volatile bit INT1IP1 @ ((unsigned)&IPC5*8)+1;
static volatile bit INT1IP2 @ ((unsigned)&IPC5*8)+2;
/* Microchip compatible bit field */
static volatile struct {
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
volatile unsigned INT1IP : 3;
} IPC5bits @ 0xAE;
static volatile unsigned int IPC6 @ 0xB0;
static volatile bit DMA2IP0 @ ((unsigned)&IPC6*8)+0;
static volatile bit DMA2IP1 @ ((unsigned)&IPC6*8)+1;
static volatile bit DMA2IP2 @ ((unsigned)&IPC6*8)+2;
static volatile bit OC3IP0 @ ((unsigned)&IPC6*8)+4;
static volatile bit OC3IP1 @ ((unsigned)&IPC6*8)+5;
static volatile bit OC3IP2 @ ((unsigned)&IPC6*8)+6;
static volatile bit OC4IP0 @ ((unsigned)&IPC6*8)+8;
static volatile bit OC4IP1 @ ((unsigned)&IPC6*8)+9;
static volatile bit OC4IP2 @ ((unsigned)&IPC6*8)+10;
static volatile bit T4IP0 @ ((unsigned)&IPC6*8)+12;
static volatile bit T4IP1 @ ((unsigned)&IPC6*8)+13;
static volatile bit T4IP2 @ ((unsigned)&IPC6*8)+14;
/* Microchip compatible bit field */
static volatile struct {
unsigned : 1;
volatile unsigned T4IP : 3;
unsigned : 1;
volatile unsigned OC4IP : 3;
unsigned : 1;
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