📄 pic16c782.h
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//
// Register Declarations for Microchip 16C782 Processor
//
//
// This header file was automatically generated by:
//
// inc2h.pl V1.6
//
// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
//
// SDCC is licensed under the GNU Public license (GPL) v2. Note that
// this license covers the code to the compiler and other executables,
// but explicitly does not cover any code or objects generated by sdcc.
// We have not yet decided on a license for the run time libraries, but
// it will not put any requirements on code linked against it. See:
//
// http://www.gnu.org/copyleft/gpl/html
//
// See http://sdcc.sourceforge.net/ for the latest information on sdcc.
//
//
#ifndef P16C782_H
#define P16C782_H
//
// Register addresses.
//
#define INDF_ADDR 0x0000
#define TMR0_ADDR 0x0001
#define PCL_ADDR 0x0002
#define STATUS_ADDR 0x0003
#define FSR_ADDR 0x0004
#define PORTA_ADDR 0x0005
#define PORTB_ADDR 0x0006
#define PCLATH_ADDR 0x000A
#define INTCON_ADDR 0x000B
#define PIR1_ADDR 0x000C
#define TMR1L_ADDR 0x000E
#define TMR1H_ADDR 0x000F
#define T1CON_ADDR 0x0010
#define ADRES_ADDR 0x001E
#define ADCON0_ADDR 0x001F
#define OPTION_REG_ADDR 0x0081
#define TRISA_ADDR 0x0085
#define TRISB_ADDR 0x0086
#define PIE1_ADDR 0x008C
#define PCON_ADDR 0x008E
#define WPUB_ADDR 0x0095
#define IOCB_ADDR 0x0096
#define REFCON_ADDR 0x009B
#define LVDCON_ADDR 0x009C
#define ANSEL_ADDR 0x009D
#define ADCON1_ADDR 0x009F
#define PMDATL_ADDR 0x010C
#define PMADRL_ADDR 0x010D
#define PMDATH_ADDR 0x010E
#define PMADRH_ADDR 0x010F
#define CALCON_ADDR 0x0110
#define PSMCCON0_ADDR 0x0111
#define PSMCCON1_ADDR 0x0112
#define CM1CON0_ADDR 0x0119
#define CM2CON0_ADDR 0x011A
#define CM2CON1_ADDR 0x011B
#define OPACON_ADDR 0x011C
#define DAC_ADDR 0x011E
#define DACON0_ADDR 0x011F
#define PMCON1_ADDR 0x018C
//
// Memory organization.
//
#pragma memmap INDF_ADDR INDF_ADDR SFR 0x000 // INDF
#pragma memmap TMR0_ADDR TMR0_ADDR SFR 0x000 // TMR0
#pragma memmap PCL_ADDR PCL_ADDR SFR 0x000 // PCL
#pragma memmap STATUS_ADDR STATUS_ADDR SFR 0x000 // STATUS
#pragma memmap FSR_ADDR FSR_ADDR SFR 0x000 // FSR
#pragma memmap PORTA_ADDR PORTA_ADDR SFR 0x000 // PORTA
#pragma memmap PORTB_ADDR PORTB_ADDR SFR 0x000 // PORTB
#pragma memmap PCLATH_ADDR PCLATH_ADDR SFR 0x000 // PCLATH
#pragma memmap INTCON_ADDR INTCON_ADDR SFR 0x000 // INTCON
#pragma memmap PIR1_ADDR PIR1_ADDR SFR 0x000 // PIR1
#pragma memmap TMR1L_ADDR TMR1L_ADDR SFR 0x000 // TMR1L
#pragma memmap TMR1H_ADDR TMR1H_ADDR SFR 0x000 // TMR1H
#pragma memmap T1CON_ADDR T1CON_ADDR SFR 0x000 // T1CON
#pragma memmap ADRES_ADDR ADRES_ADDR SFR 0x000 // ADRES
#pragma memmap ADCON0_ADDR ADCON0_ADDR SFR 0x000 // ADCON0
#pragma memmap OPTION_REG_ADDR OPTION_REG_ADDR SFR 0x000 // OPTION_REG
#pragma memmap TRISA_ADDR TRISA_ADDR SFR 0x000 // TRISA
#pragma memmap TRISB_ADDR TRISB_ADDR SFR 0x000 // TRISB
#pragma memmap PIE1_ADDR PIE1_ADDR SFR 0x000 // PIE1
#pragma memmap PCON_ADDR PCON_ADDR SFR 0x000 // PCON
#pragma memmap WPUB_ADDR WPUB_ADDR SFR 0x000 // WPUB
#pragma memmap IOCB_ADDR IOCB_ADDR SFR 0x000 // IOCB
#pragma memmap REFCON_ADDR REFCON_ADDR SFR 0x000 // REFCON
#pragma memmap LVDCON_ADDR LVDCON_ADDR SFR 0x000 // LVDCON
#pragma memmap ANSEL_ADDR ANSEL_ADDR SFR 0x000 // ANSEL
#pragma memmap ADCON1_ADDR ADCON1_ADDR SFR 0x000 // ADCON1
#pragma memmap PMDATL_ADDR PMDATL_ADDR SFR 0x000 // PMDATL
#pragma memmap PMADRL_ADDR PMADRL_ADDR SFR 0x000 // PMADRL
#pragma memmap PMDATH_ADDR PMDATH_ADDR SFR 0x000 // PMDATH
#pragma memmap PMADRH_ADDR PMADRH_ADDR SFR 0x000 // PMADRH
#pragma memmap CALCON_ADDR CALCON_ADDR SFR 0x000 // CALCON
#pragma memmap PSMCCON0_ADDR PSMCCON0_ADDR SFR 0x000 // PSMCCON0
#pragma memmap PSMCCON1_ADDR PSMCCON1_ADDR SFR 0x000 // PSMCCON1
#pragma memmap CM1CON0_ADDR CM1CON0_ADDR SFR 0x000 // CM1CON0
#pragma memmap CM2CON0_ADDR CM2CON0_ADDR SFR 0x000 // CM2CON0
#pragma memmap CM2CON1_ADDR CM2CON1_ADDR SFR 0x000 // CM2CON1
#pragma memmap OPACON_ADDR OPACON_ADDR SFR 0x000 // OPACON
#pragma memmap DAC_ADDR DAC_ADDR SFR 0x000 // DAC
#pragma memmap DACON0_ADDR DACON0_ADDR SFR 0x000 // DACON0
#pragma memmap PMCON1_ADDR PMCON1_ADDR SFR 0x000 // PMCON1
// LIST
// P16C782.INC Standard Header File, Version 1.00 Microchip Technology, Inc.
// NOLIST
// This header file defines configurations, registers, and other useful bits of
// information for the PIC16C782 microcontroller. These names are taken to match
// the data sheets as closely as possible.
// Note that the processor must be selected before this file is
// included. The processor may be selected the following ways:
// 1. Command line switch:
// C:\ MPASM MYFILE.ASM /PIC16C782
// 2. LIST directive in the source file
// LIST P=PIC16C782
// 3. Processor Type entry in the MPASM full-screen interface
//==========================================================================
//
// Revision History
//
//==========================================================================
//Rev: Date: Reason:
//1.00 16May2001 Initial Release
//==========================================================================
//
// Verify Processor
//
//==========================================================================
// IFNDEF __16C782
// MESSG "Processor-header file mismatch. Verify selected processor."
// ENDIF
//==========================================================================
//
// Register Definitions
//
//==========================================================================
#define W 0x0000
#define F 0x0001
//----- Register Files------------------------------------------------------
extern __data __at (INDF_ADDR) volatile char INDF;
extern __sfr __at (TMR0_ADDR) TMR0;
extern __data __at (PCL_ADDR) volatile char PCL;
extern __sfr __at (STATUS_ADDR) STATUS;
extern __sfr __at (FSR_ADDR) FSR;
extern __sfr __at (PORTA_ADDR) PORTA;
extern __sfr __at (PORTB_ADDR) PORTB;
extern __sfr __at (PCLATH_ADDR) PCLATH;
extern __sfr __at (INTCON_ADDR) INTCON;
extern __sfr __at (PIR1_ADDR) PIR1;
extern __sfr __at (TMR1L_ADDR) TMR1L;
extern __sfr __at (TMR1H_ADDR) TMR1H;
extern __sfr __at (T1CON_ADDR) T1CON;
extern __sfr __at (ADRES_ADDR) ADRES;
extern __sfr __at (ADCON0_ADDR) ADCON0;
extern __sfr __at (OPTION_REG_ADDR) OPTION_REG;
extern __sfr __at (TRISA_ADDR) TRISA;
extern __sfr __at (TRISB_ADDR) TRISB;
extern __sfr __at (PIE1_ADDR) PIE1;
extern __sfr __at (PCON_ADDR) PCON;
extern __sfr __at (WPUB_ADDR) WPUB;
extern __sfr __at (IOCB_ADDR) IOCB;
extern __sfr __at (REFCON_ADDR) REFCON;
extern __sfr __at (LVDCON_ADDR) LVDCON;
extern __sfr __at (ANSEL_ADDR) ANSEL;
extern __sfr __at (ADCON1_ADDR) ADCON1;
extern __sfr __at (PMDATL_ADDR) PMDATL;
extern __sfr __at (PMADRL_ADDR) PMADRL;
extern __sfr __at (PMDATH_ADDR) PMDATH;
extern __sfr __at (PMADRH_ADDR) PMADRH;
extern __sfr __at (CALCON_ADDR) CALCON;
extern __sfr __at (PSMCCON0_ADDR) PSMCCON0;
extern __sfr __at (PSMCCON1_ADDR) PSMCCON1;
extern __sfr __at (CM1CON0_ADDR) CM1CON0;
extern __sfr __at (CM2CON0_ADDR) CM2CON0;
extern __sfr __at (CM2CON1_ADDR) CM2CON1;
extern __sfr __at (OPACON_ADDR) OPACON;
extern __sfr __at (DAC_ADDR) DAC;
extern __sfr __at (DACON0_ADDR) DACON0;
extern __sfr __at (PMCON1_ADDR) PMCON1;
//----- STATUS Bits --------------------------------------------------------
//----- INTCON Bits --------------------------------------------------------
//----- PIR1 Bits ----------------------------------------------------------
//----- T1CON Bits ---------------------------------------------------------
//----- ADCON0 Bits --------------------------------------------------------
//----- OPTION Bits ----------------------------------------------------
//----- PIE1 Bits ----------------------------------------------------------
//----- PCON Bits ----------------------------------------------------------
//----- REFCON Bits --------------------------------------------------------
//----- LVDCON Bits --------------------------------------------------------
//----- ADCON1 Bits --------------------------------------------------------
//----- CALCON Bits --------------------------------------------------------
//----- PSMCCON0 Bits ------------------------------------------------------
//----- PSMCCON1 Bits ------------------------------------------------------
//----- CM1CON0 Bits ------------------------------------------------------
//----- CM2CON0 Bits ------------------------------------------------------
//----- CM2CON1 Bits ------------------------------------------------------
//----- OPACON Bits -------------------------------------------------------
//----- DACON0 Bits --------------------------------------------------------
//----- PMCON1 Bits -------------------------------------------------------
//==========================================================================
//
// RAM Definition
//
//==========================================================================
// __MAXRAM H'1FF'
// __BADRAM H'07'-H'09', H'0D', H'11'-H'1D'
// __BADRAM H'87'-H'89', H'8D'
// __BADRAM H'8F'-H'94', H'97'-H'9A', H'9E', H'C0'-H'EF'
// __BADRAM H'105', H'107'-H'109', H'113'-H'118'
// __BADRAM H'11D', H'120'-H'16F'
// __BADRAM H'185', H'187'-H'189', H'18D'-H'1EF'
//==========================================================================
//
// Configuration Bits
//
//==========================================================================
#define _BODEN_ON 0x3FFF
#define _BODEN_OFF 0x3FBF
#define _CP_ALL 0x0CFF
#define _CP_OFF 0x3FFF
#define _VBOR_25 0x3FFF
#define _VBOR_27 0x3BFF
#define _VBOR_42 0x37FF
#define _VBOR_45 0x33FF
#define _PWRTE_OFF 0x3FFF
#define _PWRTE_ON 0x3FEF
#define _MCLRE_OFF 0x3FDF
#define _MCLRE_ON 0x3FFF
#define _WDT_ON 0x3FFF
#define _WDT_OFF 0x3FF7
#define _ER_OSC_CLKOUT 0x3FFF
#define _ER_OSC_NOCLKOUT 0x3FFE
#define _INTRC_OSC_CLKOUT 0x3FFD
#define _INTRC_OSC_NOCLKOUT 0x3FFC
#define _EXTCLK_OSC 0x3FFB
#define _HS_OSC 0x3FFA
#define _XT_OSC 0x3FF9
#define _LP_OSC 0x3FF8
// LIST
// ----- ADCON0 bits --------------------
typedef union {
struct {
unsigned char ADON:1;
unsigned char CHS3:1;
unsigned char GO:1;
unsigned char CHS0:1;
unsigned char CHS1:1;
unsigned char CHS2:1;
unsigned char ADCS0:1;
unsigned char ADCS1:1;
};
struct {
unsigned char :1;
unsigned char :1;
unsigned char NOT_DONE:1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
};
struct {
unsigned char :1;
unsigned char :1;
unsigned char GO_DONE:1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
};
} __ADCON0_bits_t;
extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
#define ADON ADCON0_bits.ADON
#define CHS3 ADCON0_bits.CHS3
#define GO ADCON0_bits.GO
#define NOT_DONE ADCON0_bits.NOT_DONE
#define GO_DONE ADCON0_bits.GO_DONE
#define CHS0 ADCON0_bits.CHS0
#define CHS1 ADCON0_bits.CHS1
#define CHS2 ADCON0_bits.CHS2
#define ADCS0 ADCON0_bits.ADCS0
#define ADCS1 ADCON0_bits.ADCS1
// ----- ADCON1 bits --------------------
typedef union {
struct {
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char VCFG0:1;
unsigned char VCFG1:1;
unsigned char :1;
unsigned char :1;
};
} __ADCON1_bits_t;
extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
#define VCFG0 ADCON1_bits.VCFG0
#define VCFG1 ADCON1_bits.VCFG1
// ----- CALCON bits --------------------
typedef union {
struct {
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char CALREF:1;
unsigned char CALERR:1;
unsigned char CAL:1;
};
} __CALCON_bits_t;
extern volatile __CALCON_bits_t __at(CALCON_ADDR) CALCON_bits;
#define CALREF CALCON_bits.CALREF
#define CALERR CALCON_bits.CALERR
#define CAL CALCON_bits.CAL
// ----- CM1CON0 bits --------------------
typedef union {
struct {
unsigned char C1CH0:1;
unsigned char C1CH1:1;
unsigned char C1R:1;
unsigned char C1SP:1;
unsigned char C1POL:1;
unsigned char C1OE:1;
unsigned char C1OUT:1;
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