📄 prpmc600.h
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# define DEC2155X_MIN_GNT_VAL 0xff
# define DEC2155X_CHP_CTRL0_VAL 0x0000
# define DEC2155X_CHP_CTRL1_VAL 0x0000
# define DEC2155X_PRI_SERR_VAL (DEC2155X_SERR_DIS_DLYD_TRNS_MSTR_ABRT | \
DEC2155X_SERR_DIS_DLYD_RD_TRNS_TO | \
DEC2155X_SERR_DIS_DLYD_WRT_TRNS_DISC | \
DEC2155X_SERR_DIS_PSTD_WRT_DATA_DISC | \
DEC2155X_SERR_DIS_PSTD_WRT_TRGT_ABRT | \
DEC2155X_SERR_DIS_PSTD_WRT_MSTR_ABRT | \
DEC2155X_SERR_DIS_PSTD_WRT_PAR_ERROR)
# define DEC2155X_SEC_SERR_VAL (DEC2155X_SERR_DIS_DLYD_TRNS_MSTR_ABRT | \
DEC2155X_SERR_DIS_DLYD_RD_TRNS_TO | \
DEC2155X_SERR_DIS_DLYD_WRT_TRNS_DISC | \
DEC2155X_SERR_DIS_PSTD_WRT_DATA_DISC | \
DEC2155X_SERR_DIS_PSTD_WRT_TRGT_ABRT | \
DEC2155X_SERR_DIS_PSTD_WRT_MSTR_ABRT | \
DEC2155X_SERR_DIS_PSTD_WRT_PAR_ERROR)
#endif /* INCLUDE_DEC2155X */
/* INTERRUPT DEFINES */
#define INT_VEC_IRQ0 0x00 /* vector for IRQ0 */
#define INT_NUM_IRQ0 INT_VEC_IRQ0
#define TIMER_INTERRUPT_BASE 0x00
#define EXTERNAL_INTERRUPT_BASE 0x10
#define INTERNAL_INTERRUPT_BASE 0x20
#define SERIAL_INTERRUPT_BASE 0x30
#define DUART_INTERRUPT_BASE 0x40
/*#define USER1_INTERRUPT_BASE 0x40*/
#define USER2_INTERRUPT_BASE 0x50
#define DEC2155X_INTERRUPT_BASE 0x60
#define USER3_INTERRUPT_BASE 0x70
#define WBPIC_INTERRUPT_BASE 0x80 /*add for WinBond, xdg*/
/* interrupt Level definitions */
/* EPIC Timers */
/* EPIC timer 0 interrupt level */
#define TIMER0_INT_LVL ( 0x0 + TIMER_INTERRUPT_BASE )
/* EPIC timer 1 interrupt level */
#define TIMER1_INT_LVL ( 0x1 + TIMER_INTERRUPT_BASE )
/* EPIC timer 2 interrupt level */
#define TIMER2_INT_LVL ( 0x2 + TIMER_INTERRUPT_BASE )
/* EPIC timer 3 interrupt level */
#define TIMER3_INT_LVL ( 0x3 + TIMER_INTERRUPT_BASE )
#if(0)
/* External interrupt sources */
/* PCI expansion INTA */
#define PMC_INTA_LVL ( 0x07 + SERIAL_INTERRUPT_BASE )
/* PCI expansion INTB */
#define PMC_INTB_LVL ( 0x08 + SERIAL_INTERRUPT_BASE )
/* ethernet interrupt level */
#define LN_INT_LVL ( 0x08 + SERIAL_INTERRUPT_BASE )
/* PCI expansion INTC */
#define PMC_INTC_LVL ( 0x09 + SERIAL_INTERRUPT_BASE )
/* PCI expansion INTD */
#define PMC_INTD_LVL ( 0x0a + SERIAL_INTERRUPT_BASE )
/* 16550 UART interrupt level (COM port 1) */
#define COM1_INT_LVL ( 0x0d + SERIAL_INTERRUPT_BASE )
/* front panel abort switch */
#define ABORT_INT_LVL ( 0x0e + SERIAL_INTERRUPT_BASE )
#endif
#define EPIC_IRQ0_LVL ( 0x0 + EXTERNAL_INTERRUPT_BASE)
#define EPIC_IRQ1_LVL ( 0x1 + EXTERNAL_INTERRUPT_BASE)
#define EPIC_IRQ2_LVL ( 0x2 + EXTERNAL_INTERRUPT_BASE)
#define EPIC_IRQ3_LVL ( 0x3 + EXTERNAL_INTERRUPT_BASE)
#define EPIC_IRQ4_LVL ( 0x4 + EXTERNAL_INTERRUPT_BASE)
#define PMC_INTA_LVL EPIC_IRQ0_LVL
#define PMC_INTB_LVL EPIC_IRQ1_LVL
#define PMC_INTC_LVL EPIC_IRQ2_LVL
#define PMC_INTD_LVL EPIC_IRQ3_LVL
/* 16550 UART interrupt level (COM port 1) */
/*#define COM1_INT_LVL EPIC_IRQ4_LVL*/
/* EPIC internal interrupts */
/* Mpc8240 I2C interrupt */
#define I2C_INT_LVL (0x00 + INTERNAL_INTERRUPT_BASE )
/* EPIC DMA #0 */
#define DMA0_INT_LVL (0x01 + INTERNAL_INTERRUPT_BASE )
/* EPIC DMA #1 */
#define DMA1_INT_LVL (0x02 + INTERNAL_INTERRUPT_BASE )
/* Message Unit interrupt*/
#define MSGUNIT_INT_LVL (0x03 + INTERNAL_INTERRUPT_BASE )
#define DUART1_INT_LVL (0x00 + DUART_INTERRUPT_BASE)
#define DUART2_INT_LVL (0x01 + DUART_INTERRUPT_BASE)
/* 16550 UART interrupt level (COM port 1) */
#define COM1_INT_LVL DUART1_INT_LVL
#define COM2_INT_LVL DUART2_INT_LVL /* add by zoutl for use two UART 2003-3-28 17:27 */
#define DEC2155X_DOORBELL0_INT_LVL ( 0x00 + DEC2155X_INTERRUPT_BASE )
#define DEC2155X_DOORBELL1_INT_LVL ( 0x01 + DEC2155X_INTERRUPT_BASE )
#define DEC2155X_DOORBELL2_INT_LVL ( 0x02 + DEC2155X_INTERRUPT_BASE )
#define DEC2155X_DOORBELL3_INT_LVL ( 0x03 + DEC2155X_INTERRUPT_BASE )
#define DEC2155X_DOORBELL4_INT_LVL ( 0x04 + DEC2155X_INTERRUPT_BASE )
#define DEC2155X_DOORBELL5_INT_LVL ( 0x05 + DEC2155X_INTERRUPT_BASE )
#define DEC2155X_DOORBELL6_INT_LVL ( 0x06 + DEC2155X_INTERRUPT_BASE )
#define DEC2155X_DOORBELL7_INT_LVL ( 0x07 + DEC2155X_INTERRUPT_BASE )
#define DEC2155X_DOORBELL8_INT_LVL ( 0x08 + DEC2155X_INTERRUPT_BASE )
#define DEC2155X_DOORBELL9_INT_LVL ( 0x09 + DEC2155X_INTERRUPT_BASE )
#define DEC2155X_DOORBELL10_INT_LVL ( 0x0a + DEC2155X_INTERRUPT_BASE )
#define DEC2155X_DOORBELL11_INT_LVL ( 0x0b + DEC2155X_INTERRUPT_BASE )
#define DEC2155X_DOORBELL12_INT_LVL ( 0x0c + DEC2155X_INTERRUPT_BASE )
#define DEC2155X_DOORBELL13_INT_LVL ( 0x0d + DEC2155X_INTERRUPT_BASE )
#define DEC2155X_DOORBELL14_INT_LVL ( 0x0e + DEC2155X_INTERRUPT_BASE )
#define DEC2155X_DOORBELL15_INT_LVL ( 0x0f + DEC2155X_INTERRUPT_BASE )
#define DEC2155X_PWR_MGMT_INT_LVL ( 0x10 + DEC2155X_INTERRUPT_BASE )
#define DEC2155X_I2O_INT_LVL ( 0x11 + DEC2155X_INTERRUPT_BASE )
#define DEC2155X_PG_CRSSNG_INT_LVL ( 0x12 + DEC2155X_INTERRUPT_BASE )
/* Winbond 83c553 PIC interrupt level define. added by xdg 00.10.12*/
#define WBPIC_IRQ0_INT_LVL ( 0x00 + WBPIC_INTERRUPT_BASE )
#define WBPIC_IRQ1_INT_LVL ( 0x01 + WBPIC_INTERRUPT_BASE )
#define WBPIC_IRQ2_INT_LVL ( 0x02 + WBPIC_INTERRUPT_BASE )
#define WBPIC_IRQ3_INT_LVL ( 0x03 + WBPIC_INTERRUPT_BASE )
#define WBPIC_IRQ4_INT_LVL ( 0x04 + WBPIC_INTERRUPT_BASE )
#define WBPIC_IRQ5_INT_LVL ( 0x05 + WBPIC_INTERRUPT_BASE )
#define WBPIC_IRQ6_INT_LVL ( 0x06 + WBPIC_INTERRUPT_BASE )
#define WBPIC_IRQ7_INT_LVL ( 0x07 + WBPIC_INTERRUPT_BASE )
#define WBPIC_IRQ8_INT_LVL ( 0x08 + WBPIC_INTERRUPT_BASE )
#define WBPIC_IRQ9_INT_LVL ( 0x09 + WBPIC_INTERRUPT_BASE )
#define WBPIC_IRQ10_INT_LVL ( 0x0a + WBPIC_INTERRUPT_BASE )
#define WBPIC_IRQ11_INT_LVL ( 0x0b + WBPIC_INTERRUPT_BASE )
#define WBPIC_IRQ12_INT_LVL ( 0x0c + WBPIC_INTERRUPT_BASE )
#define WBPIC_IRQ13_INT_LVL ( 0x0d + WBPIC_INTERRUPT_BASE )
#define WBPIC_IRQ14_INT_LVL ( 0x0e + WBPIC_INTERRUPT_BASE )
#define WBPIC_IRQ15_INT_LVL ( 0x0f + WBPIC_INTERRUPT_BASE )
/* interrupt vector definitions */
/* PRPMC600 interrupt vector definitions */
#define LN_INT_VEC INT_VEC_IRQ0 + LN_INT_LVL
#define EPIC_IRQ0_VEC INT_VEC_IRQ0 + EPIC_IRQ0_LVL
#define EPIC_IRQ1_VEC INT_VEC_IRQ0 + EPIC_IRQ1_LVL
#define EPIC_IRQ2_VEC INT_VEC_IRQ0 + EPIC_IRQ2_LVL
#define EPIC_IRQ3_VEC INT_VEC_IRQ0 + EPIC_IRQ3_LVL
#define EPIC_IRQ4_VEC INT_VEC_IRQ0 + EPIC_IRQ4_LVL
#define PMC_INTA_VEC INT_VEC_IRQ0 + PMC_INTA_LVL
#define PMC_INTB_VEC INT_VEC_IRQ0 + PMC_INTB_LVL
#define PMC_INTC_VEC INT_VEC_IRQ0 + PMC_INTC_LVL
#define PMC_INTD_VEC INT_VEC_IRQ0 + PMC_INTD_LVL
/*for pmc 16552 uart*/
#define COM1_INT_VEC COM1_INT_LVL/*EPIC_IRQ4_VEC*/
#define COM2_INT_VEC COM2_INT_LVL /* add by zoutl for use two UART 2003-3-28 17:27 */
#define ABORT_INT_VEC INT_VEC_IRQ0 + ABORT_INT_LVL
#define TIMER0_INT_VEC INT_VEC_IRQ0 + TIMER0_INT_LVL
#define TIMER1_INT_VEC INT_VEC_IRQ0 + TIMER1_INT_LVL
#define TIMER2_INT_VEC INT_VEC_IRQ0 + TIMER2_INT_LVL
#define TIMER3_INT_VEC INT_VEC_IRQ0 + TIMER3_INT_LVL
#define DEC2155X_DOORBELL0_INT_VEC (INT_VEC_IRQ0 + DEC2155X_DOORBELL0_INT_LVL)
#define DEC2155X_DOORBELL1_INT_VEC (INT_VEC_IRQ0 + DEC2155X_DOORBELL1_INT_LVL)
#define DEC2155X_DOORBELL2_INT_VEC (INT_VEC_IRQ0 + DEC2155X_DOORBELL2_INT_LVL)
#define DEC2155X_DOORBELL3_INT_VEC (INT_VEC_IRQ0 + DEC2155X_DOORBELL3_INT_LVL)
#define DEC2155X_DOORBELL4_INT_VEC (INT_VEC_IRQ0 + DEC2155X_DOORBELL4_INT_LVL)
#define DEC2155X_DOORBELL5_INT_VEC (INT_VEC_IRQ0 + DEC2155X_DOORBELL5_INT_LVL)
#define DEC2155X_DOORBELL6_INT_VEC (INT_VEC_IRQ0 + DEC2155X_DOORBELL6_INT_LVL)
#define DEC2155X_DOORBELL7_INT_VEC (INT_VEC_IRQ0 + DEC2155X_DOORBELL7_INT_LVL)
#define DEC2155X_DOORBELL8_INT_VEC (INT_VEC_IRQ0 + DEC2155X_DOORBELL8_INT_LVL)
#define DEC2155X_DOORBELL9_INT_VEC (INT_VEC_IRQ0 + DEC2155X_DOORBELL9_INT_LVL)
#define DEC2155X_DOORBELL10_INT_VEC (INT_VEC_IRQ0 + DEC2155X_DOORBELL10_INT_LVL)
#define DEC2155X_DOORBELL11_INT_VEC (INT_VEC_IRQ0 + DEC2155X_DOORBELL11_INT_LVL)
#define DEC2155X_DOORBELL12_INT_VEC (INT_VEC_IRQ0 + DEC2155X_DOORBELL12_INT_LVL)
#define DEC2155X_DOORBELL13_INT_VEC (INT_VEC_IRQ0 + DEC2155X_DOORBELL13_INT_LVL)
#define DEC2155X_DOORBELL14_INT_VEC (INT_VEC_IRQ0 + DEC2155X_DOORBELL14_INT_LVL)
#define DEC2155X_DOORBELL15_INT_VEC (INT_VEC_IRQ0 + DEC2155X_DOORBELL15_INT_LVL)
#define DEC2155X_PWR_MGMT_INT_VEC (INT_VEC_IRQ0 + DEC2155X_PWR_MGMT_INT_LVL)
#define DEC2155X_I2O_INT_VEC (INT_VEC_IRQ0 + DEC2155X_I2O_INT_LVL)
#define DEC2155X_PG_CRSSNG_INT_VEC (INT_VEC_IRQ0 + DEC2155X_PG_CRSSNG_INT_LVL)
/* Winbond 83C553 PIC interrupt vector define. added by xdg,00.10.12 */
#define WBPIC_IRQ0_INT_VEC (INT_VEC_IRQ0 + WBPIC_IRQ0_INT_LVL)
#define WBPIC_IRQ1_INT_VEC (INT_VEC_IRQ0 + WBPIC_IRQ1_INT_LVL)
#define WBPIC_IRQ2_INT_VEC (INT_VEC_IRQ0 + WBPIC_IRQ2_INT_LVL)
#define WBPIC_IRQ3_INT_VEC (INT_VEC_IRQ0 + WBPIC_IRQ3_INT_LVL)
#define WBPIC_IRQ4_INT_VEC (INT_VEC_IRQ0 + WBPIC_IRQ4_INT_LVL)
#define WBPIC_IRQ5_INT_VEC (INT_VEC_IRQ0 + WBPIC_IRQ5_INT_LVL)
#define WBPIC_IRQ6_INT_VEC (INT_VEC_IRQ0 + WBPIC_IRQ6_INT_LVL)
#define WBPIC_IRQ7_INT_VEC (INT_VEC_IRQ0 + WBPIC_IRQ7_INT_LVL)
#define WBPIC_IRQ8_INT_VEC (INT_VEC_IRQ0 + WBPIC_IRQ8_INT_LVL)
#define WBPIC_IRQ9_INT_VEC (INT_VEC_IRQ0 + WBPIC_IRQ9_INT_LVL)
#define WBPIC_IRQ10_INT_VEC (INT_VEC_IRQ0 + WBPIC_IRQ10_INT_LVL)
#define WBPIC_IRQ11_INT_VEC (INT_VEC_IRQ0 + WBPIC_IRQ11_INT_LVL)
#define WBPIC_IRQ12_INT_VEC (INT_VEC_IRQ0 + WBPIC_IRQ12_INT_LVL)
#define WBPIC_IRQ13_INT_VEC (INT_VEC_IRQ0 + WBPIC_IRQ13_INT_LVL)
#define WBPIC_IRQ14_INT_VEC (INT_VEC_IRQ0 + WBPIC_IRQ14_INT_LVL)
#define WBPIC_IRQ15_INT_VEC (INT_VEC_IRQ0 + WBPIC_IRQ15_INT_LVL)
#define WBPIC_IRQ PMC_INTC_LVL
/* PC97307 serial interrupt define, xdg */
#define NS_COM1_INT_LVL WBPIC_IRQ4_INT_LVL /* com1 interrupt level of PC97307 */
#define NS_COM2_INT_LVL WBPIC_IRQ3_INT_LVL /* com2 interrupt level of PC97307 */
#define NS_COM1_INT_VEC WBPIC_IRQ4_INT_VEC
#define NS_COM2_INT_VEC WBPIC_IRQ3_INT_VEC
/* #define COM2_INT_LVL NS_COM1_INT_LVL */ /* mask by zoutl 2003-4-1 14:37 */
#define COM3_INT_LVL NS_COM2_INT_LVL
/* #define COM2_INT_VEC NS_COM1_INT_VEC */ /* mask by zoutl 2003-4-1 14:37 */
#define COM3_INT_VEC NS_COM2_INT_VEC
#define PCI_8139_INT_VEC PMC_INTD_LVL
/*
* Address range definitions for PCI bus.
*
* Used with vxMemProbe() hook sysBusProbe().
*/
#define IS_PCI_ADDRESS(adrs) \
((((UINT32)(adrs) >= (UINT32)PCI_MSTR_MEM_LO_ADRS) && \
((UINT32)(adrs) < (UINT32)PCI_MSTR_MEM_HI_ADRS)) || \
(((UINT32)(adrs) >= (UINT32)PCI_MSTR_IO_LO_ADRS) && \
((UINT32)(adrs) < (UINT32)PCI_MSTR_IO_HI_ADRS)))
/* PCI bus number for primary PCI bus */
#define PCI_PRIMARY_BUS 0
#ifndef _ASMLANGUAGE
# ifdef SYS_SM_ANCHOR_POLL_LIST
/* Shared memory anchor polling list */
typedef struct sysSmAnchorPollingList
{
UINT devVend;
UINT subIdVend;
} SYS_SM_ANCHOR_POLLING_LIST;
# endif
/*
* Shared memory device list
*/
typedef struct sysSmDevList
{
UINT devVend;
UINT subIdVend;
} SYS_SM_DEV_LIST;
#endif /* ifndef _ASMLANGUAGE */
/*
* Support for determining if we're ROM based or not. _sysInit
* saves the startType parameter at location ROM_BASED_FLAG.
*/
#define PCI_AUTOCONFIG_FLAG_OFFSET ( 0x4c00 )
#define PCI_AUTOCONFIG_FLAG ( *(UCHAR *)(LOCAL_MEM_LOCAL_ADRS + \
PCI_AUTOCONFIG_FLAG_OFFSET) )
#define PCI_AUTOCONFIG_DONE ( PCI_AUTOCONFIG_FLAG != 0 )
#ifdef __cplusplus
}
#endif
#endif /* INCprpmc600h */
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