📄 sysalib.s
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* operations on either the supplied address or the retrieved data.
*
* RETURNS: 16-bit word from read from address
*
* UINT16 sysInWord (UINT16 * dataPtr)
*/
sysInWord:
/* Read word from address */
lhzx r3,r0,r3
/* Return to caller */
bclr 20,0
/*****************************************************************************
*
* sysInWordRev - reads a word (16-bit byte reversed) from an io address.
*
* This function reads a word from a specified io address, or memory
* and reverses the bytes.
*
* RETURNS: 16 bit word (byte swapped) read from address
*
* UINT16 sysInWordRev (UINT16 * dataPtr)
*/
sysInWordRev:
/* Read word from address */
lhbrx r3,r0,r3
/* Return to caller */
bclr 20,0
/******************************************************************************
*
* sysOutWord - writes a word (16-bit big-endian) to an io address.
*
* This function writes a word to a specified io address or to local memory.
* It operates in big-endian mode and does not perform any translation
* operations on either the supplied address or data.
*
* RETURNS: N/A
*
* void sysOutWord (UINT16 * dataPtr, UINT16 data)
*/
sysOutWord:
/* Write a word to address */
sthx r4,r0,r3
/* Sync I/O operation */
sync
/* Return to caller */
bclr 20,0
/******************************************************************************
*
* sysOutWordRev - writes a word (16-bit little-endian) to an io address.
*
* This function writes a word to a specified io address or to local memory.
* It operates in little-endian mode and swap byte in data.
*
* RETURNS: N/A
*
* void sysOutWord (UINT16 * dataPtr, UINT16 data)
*/
sysOutWordRev:
/* Write a word to address */
sthbrx r4,r0,r3
/* Sync I/O operation */
sync
/* Return to caller */
bclr 20,0
/*****************************************************************************
*
* sysPciInWord - reads a word from PCI I/O or Memory space
*
* This function reads a word from a specified PCI I/O or Memory address
* via the PCI bridge chip. This function should be used for access
* to the I/O or Memory mapped registers of a PCI device. These
* registers are mapped as little-endian, so we byte swap the data in order
* to make the value returned look the same as it would in PCI space.
*
* RETURNS: word from address.
*
* UINT16 sysPciInWord (UINT16 * dataPtr)
*/
sysPciInWord:
/* Read word from address */
lhbrx r3,r0,r3
/* Return to caller */
bclr 20,0
/*****************************************************************************
*
* sysPciOutWord - writes a word to PCI I/O or Memory space
*
* This function writes a word to a specified PCI I/O or Memory address
* via the PCI bridge chip. This function should be used for access
* to the I/O or Memory mapped registers of a PCI device. These
* registers are mapped as little-endian, so we byte swap the data in order
* to make the value written correct for the registers in PCI space.
*
* RETURNS: N/A
*
* void sysPciOutWord (UINT16 * dataPtr, UINT16 data)
*/
sysPciOutWord:
/* Write a word to the address */
sthbrx r4,r0,r3
/* Sync I/O operation */
sync
/* Return to caller */
bclr 20,0
/*****************************************************************************
*
* sysPciConfigInWord - reads a word from a PCI configuration space address.
*
* This function reads a word from a specified PCI configuration space
* address. This function uses the indirect PCI configuration space access
* method. It writes the input configuration space address to the CAR and
* then reads the data from the CDR. All reads/writes larger than 8 bits
* use byte swapping.
*
* Register Usage
* r3 - Configuration space address to read from / returned data
* r4 - dummy parameter, used for holding the CAR address
* r5 - dummy parameter, used for holding the CDR address
*
* RETURNS: N/A
*
* UINT16 sysPciConfigInWord (UINT16 * dataPtr, UINT dummy1, UINT dummy2)
*/
sysPciConfigInWord:
andi. r4,r3,3 /* save the 2 LSBs of the PCI addr */
addis r5,r0,HIADJ(PCI_MSTR_PRIMARY_CDR)
ori r5,r5,LO(PCI_MSTR_PRIMARY_CDR)
or r5,r5,r4 /* add the LSBs value to the CDR */
andi. r4,r4,0 /* the config. space address must */
ori r4,r4,3 /* be 4-byte aligned */
andc r3,r3,r4 /* mask off the 2 LSBs */
addis r4,r0,HIADJ(PCI_MSTR_PRIMARY_CAR)
ori r4,r4,LO(PCI_MSTR_PRIMARY_CAR)
stwbrx r3,r0,r4 /* write config. space addr. to CAR */
sync /* ensure memory access is complete */
andi. r3,r3,0
lhbrx r3,r0,r5 /* read data out of the CDR */
bclr 20,0 /* return to caller */
/*****************************************************************************
*
* sysPciConfigOutWord - writes a word to a PCI configuration space address.
*
* This function writes a word to a specified PCI configuration space
* address. This function uses the indirect PCI configuration space access
* method. It writes the input configuration space address to the CAR and
* then writes the data to the CDR. All writes larger than 8 bits use byte
* swapping.
*
* Register Usage
* r3 - Configuration space address to write to
* r4 - data to be written
* r5 - dummy parameter, used for holding the CAR address
* r6 - dummy parameter, used for holding the CDR address
*
* RETURNS: N/A
*
* void sysPciConfigOutWord (UINT16 * dataPtr, UINT16 data,
* UINT dummy1, UINT dummy2)
*/
sysPciConfigOutWord:
andi. r5,r3,3 /* save the 2 LSBs of the PCI addr */
addis r6,r0,HIADJ(PCI_MSTR_PRIMARY_CDR)
ori r6,r6,LO(PCI_MSTR_PRIMARY_CDR)
or r6,r6,r5 /* add the LSBs value to the CDR */
andi. r5,r5,0 /* the config. space address must */
ori r5,r5,3 /* be 4-byte aligned */
andc r3,r3,r5 /* mask off the 2 LSBs */
addis r5,r0,HIADJ(PCI_MSTR_PRIMARY_CAR)
ori r5,r5,LO(PCI_MSTR_PRIMARY_CAR)
stwbrx r3,r0,r5 /* write config. space addr. to CAR */
sync /* ensure memory access is complete */
sthbrx r4,r0,r6 /* write data to CDR */
sync
bclr 20,0 /* return to caller */
/*****************************************************************************
*
* sysInLong - reads a long (32-bit big-endian) from an io address.
*
* This function reads a long from a specified io address or from local memory.
* It operates in big-endian mode and does not perform any translation
* operations on either the supplied address or the retrieved data.
*
* RETURNS: long (32-bit big-endian) from address
*
* UINT32 sysInLong ( UINT32 * dataPtr)
*/
sysInLong:
/* Read long from address */
lwzx r3,r0,r3
/* Return to caller */
bclr 20,0
/*****************************************************************************
*
* sysInLongRev - reads a long (32-bit little-endian) from an io address.
*
* This function reads a long from a specified io address or from local memory.
* It operates in big-endian mode and swap byte order
*
* RETURNS: long (32-bit little-endian) from address
*
* UINT32 sysInLongRev ( UINT32 * dataPtr)
*/
sysInLongRev:
/* Read long from address */
lwbrx r3,r0,r3
/* Return to caller */
bclr 20,0
/******************************************************************************
*
* sysOutLong - writes a long (32-bit big-endian) to an io address.
*
* This function writes a long to a specified io address or to local memory.
* It operates in big-endian mode and does not perform any translation
* operations on either the supplied address or data.
* This function writes a long to a specified io address.
*
* RETURNS: N/A
*
* void sysOutLong (UINT32 * dataPtr, UINT32 data)
*/
sysOutLong:
/* Write a long to address */
stwx r4,r0,r3
/* Sync I/O operation */
sync
/* Return to caller */
bclr 20,0
/******************************************************************************
*
* sysOutLongRev - writes a long (32-bit little-endian) to an io address.
*
* This function writes a long to a specified io address or to local memory.
* It operates in little-endian mode and swap byte order
* This function writes a long to a specified io address.
*
* RETURNS: N/A
*
* void sysOutLongRev (UINT32 * dataPtr, UINT32 data)
*/
sysOutLongRev:
/* Write a long to address */
stwbrx r4,r0,r3
/* Sync I/O operation */
sync
/* Return to caller */
bclr 20,0
/*****************************************************************************
*
* sysPciInLong - reads a longword from PCI I/O or Memory space
*
* This function reads a longword from a specified PCI I/O or Memory address
* via the PCI bridge chip. This function should be used for access
* to the I/O or Memory mapped registers of a PCI device. These
* registers are mapped as little-endian, so we byte reverse the data in order
* to make the value returned look the same as it would in PCI space.
*
* RETURNS: longword from address.
*
* UINT32 sysPciInLong (UINT32 * dataPtr)
*/
sysPciInLong:
/* Read a longword from the address, and reverse the bytes */
lwbrx r3,r0,r3
/* Return to caller */
bclr 20,0
/*****************************************************************************
*
* sysPciOutLong - writes a longword to PCI I/O or Memory space
*
* This function writes a longword to a specified PCI I/O or Memory address
* via the PCI bridge chip. This function should be used for access
* to the I/O or Memory mapped registers of a PCI device. These
* registers are mapped as little-endian, so we byte reverse the data in order
* to make the value written correct for the registers in PCI space.
*
* RETURNS: N/A
*
* void sysPciOutLong (UINT32 * dataPtr, UINT32 data)
*/
sysPciOutLong:
/* Write a long to the address, reversing the bytes */
stwbrx r4,r0,r3
/* Sync I/O operation */
sync
/* Return to caller */
bclr 20,0
/*****************************************************************************
*
* sysPciConfigInLong - reads a longword from a PCI configuration space address.
*
* This function reads a longword from a specified PCI configuration space
* address. This function uses the indirect PCI configuration space access
* method. It writes the input configuration space address to the CAR and
* then reads the data from the CDR. All reads/writes larger than 8 bits
* use byte swapping.
*
* Register Usage
* r3 - Configuration space address to read from / returned data
* r4 - dummy parameter, used for holding the CAR address
* r5 - dummy parameter, used for holding the CDR address
*
* RETURNS: N/A
*
* UINT32 sysPciConfigInLong (UINT32 * dataPtr, UINT dummy1, UINT dummy2)
*/
sysPciConfigInLong:
addis r4,r0,HIADJ(PCI_MSTR_PRIMARY_CAR)
ori r4,r4,LO(PCI_MSTR_PRIMARY_CAR)
addis r5,r0,HIADJ(PCI_MSTR_PRIMARY_CDR)
ori r5,r5,LO(PCI_MSTR_PRIMARY_CDR)
stwbrx r3,r0,r4 /* write config. space addr. to CAR */
sync /* ensure memory access is complete */
andi. r3,r3,0
lwbrx r3,r0,r5 /* read data out of the CDR */
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