📄 sysalib.s
字号:
/* sysALib.s - Motorola PRPMC600 system-dependent assembly routines */
/* Copyright 1984-2000 Wind River Systems, Inc. */
/* Copyright 1996-2000 Motorola, Inc. All Rights Reserved */
.data
.globl copyright_wind_river
.long copyright_wind_river
/*
modification history
--------------------
01a,28feb00,rhk created (from version 01g, MV2100 BSP).
*/
/*
DESCRIPTION
This module contains system-dependent routines written in assembly
language.
This module must be the first specified in the \f3ld\f1 command used to
build the system. The sysInit() routine is the system start-up code.
*/
#define _ASMLANGUAGE
#include "vxWorks.h"
#include "sysLib.h"
#include "config.h"
#include "regs.h"
#include "asm.h"
/* globals */
.globl _sysInit /* start of system code */
.globl sysInByte
.globl sysOutByte
.globl sysPciInByte
.globl sysPciOutByte
.globl sysPciConfigInByte
.globl sysPciConfigOutByte
.globl sysInWord
.globl sysInWordRev
.globl sysOutWord
.globl sysOutWordRev
.globl sysInLong
.globl sysOutLong
.globl sysInLongRev
.globl sysOutLongRev
.globl sysPciInWord
.globl sysPciOutWord
.globl sysPciConfigInWord
.globl sysPciConfigOutWord
.globl sysPciInLong
.globl sysPciOutLong
.globl sysPciConfigInLong
.globl sysPciConfigOutLong
.globl sysMemProbeSup
.globl sysProbeExc
.globl store_runtime_reg
.globl load_runtime_reg
.globl get_eumbbar
.globl get_kahlua_pcsrbar
.globl sysTimeBaseLGet
.globl sysHid0Get
.globl sysHid1Get
.globl sysHid2Set
.globl sysHid2Get
.globl sysMpc8240GetDec
.globl i2cPciInLong
.globl i2cPciInByte
.globl sysLongLongMove
.globl sysFpSet
.globl sysSioRead
.globl sysSioWrite
.globl runled
/* externals */
.extern usrInit
.text
/*******************************************************************************
*
* sysInit - start after boot
*
* This is the system start-up entry point for VxWorks in RAM, the
* first code executed after booting. It disables interrupts, sets up
* the stack, and jumps to the C routine usrInit() in usrConfig.c.
*
* The initial stack is set to grow down from the address of sysInit(). This
* stack is used only by usrInit() and is never used again. Memory for the
* stack must be accounted for when determining the system load address.
*
* NOTE: This routine should not be called by the user.
*
* RETURNS: N/A
* sysInit (void) /@ THIS IS NOT A CALLABLE ROUTINE @/
*/
_sysInit:
/* disable external interrupts */
xor p0, p0, p0
mtmsr p0 /* clear the MSR register */
/* return from decrementer exceptions */
addis p1, r0, 0x4c00
addi p1, p1, 0x0064 /* load rfi (0x4c000064) to p1 */
stw p1, 0x900(r0) /* store rfi at 0x00000900 */
/* initialize the stack pointer */
lis sp, HIADJ(RAM_LOW_ADRS)
addi sp, sp, LO(RAM_LOW_ADRS)
/* invalidate the MPU's data/instruction caches */
lis r3, 0x0
ori r3, r3, 0xC000 /* r3 has enable and bits set */
or r4, r4, r3 /* set bits */
sync
isync
mtspr HID0, r4 /* HID0 = r4 */
andc r4, r4, r3 /* clear bits */
isync
mtspr HID0, r4
isync
/* disable instruction and data translations in the MMU */
sync
mfmsr r3 /* get the value in msr *
/* clear bits IR and DR */
rlwinm r4, r3, 0, _PPC_MSR_BIT_DR+1, _PPC_MSR_BIT_IR - 1
mtmsr r4 /* set the msr */
sync /* SYNC */
/* initialize the BAT register */
li p3,0 /* clear p0 */
isync
mtspr IBAT0U,p3 /* SPR 528 (IBAT0U) */
isync
mtspr IBAT0L,p3 /* SPR 529 (IBAT0L) */
isync
mtspr IBAT1U,p3 /* SPR 530 (IBAT1U) */
isync
mtspr IBAT1L,p3 /* SPR 531 (IBAT1L) */
isync
mtspr IBAT2U,p3 /* SPR 532 (IBAT2U) */
isync
mtspr IBAT2L,p3 /* SPR 533 (IBAT2L) */
isync
mtspr IBAT3U,p3 /* SPR 534 (IBAT3U) */
isync
mtspr IBAT3L,p3 /* SPR 535 (IBAT3L) */
isync
mtspr DBAT0U,p3 /* SPR 536 (DBAT0U) */
isync
mtspr DBAT0L,p3 /* SPR 537 (DBAT0L) */
isync
mtspr DBAT1U,p3 /* SPR 538 (DBAT1U) */
isync
mtspr DBAT1L,p3 /* SPR 539 (DBAT1L) */
isync
mtspr DBAT2U,p3 /* SPR 540 (DBAT2U) */
isync
mtspr DBAT2L,p3 /* SPR 541 (DBAT2L) */
isync
mtspr DBAT3U,p3 /* SPR 542 (DBAT3U) */
isync
mtspr DBAT3L,p3 /* SPR 543 (DBAT3L) */
isync
/* invalidate entries within both TLBs */
li p1,128
xor p0,p0,p0 /* p0 = 0 */
mtctr p1 /* CTR = 32 */
isync /* context sync req'd before tlbie */
sysALoop:
tlbie p0
addi p0,p0,0x1000 /* increment bits 15-19 */
bdnz sysALoop /* decrement CTR, branch if CTR != 0 */
sync /* sync instr req'd after tlbie */
/* initialize Small Data Area (SDA) start address */
#if FALSE /* XXX TPR NO SDA for now */
lis r2, HIADJ(_SDA2_BASE_)
addi r2, r2, LO(_SDA2_BASE_)
lis r13, HIADJ(_SDA_BASE_)
addi r13, r13, LO(_SDA_BASE_)
#endif
addi sp, sp, -FRAMEBASESZ /* get frame stack */
li r3, BOOT_WARM_AUTOBOOT
/* bl runled*/
b usrInit /* never returns - starts up kernel */
/*****************************************************************************
*
* sysInByte - reads a byte from an io address.
*
* This function reads a byte from a specified io address or from local memory.
* It operates in big-endian mode and does not perform any translation
* operations on either the supplied address or the retrieved data.
*
* RETURNS: byte from address.
*
* UINT8 sysInByte (UINT8 * dataPtr)
*/
sysInByte:
/* Read byte from address */
lbzx r3,r0,r3
/* Return to caller */
bclr 20,0
/******************************************************************************
*
* sysOutByte - writes a byte to an io address.
*
* This function writes a byte to a specified io address or to local memory.
* It operates in big-endian mode and does not perform any translation
* operations on either the supplied address or data.
*
* RETURNS: N/A
*
* void sysOutByte (UINT8 * dataPtr, UINT8 data)
*/
sysOutByte:
/* Write a byte to address */
stbx r4,r0,r3
/* Sync I/O operation */
sync
/* Return to caller */
bclr 20,0
/*****************************************************************************
*
* sysPciInByte - reads a byte from PCI I/O or Memory space
*
* This function reads a byte from a specified PCI I/O or Memory address
* via the PCI bridge chip. This function should be used for access
* to the I/O or Memory mapped registers of a PCI device. Since this routine
* accesses only a single byte of data no address or data manipulation is
* required.
*
* RETURNS: byte from address.
*
* UINT8 sysPciInByte (UINT8 * dataPtr)
*/
sysPciInByte:
/* Read byte from address */
lbzx r3,r0,r3
/* Return to caller */
bclr 20,0
/*****************************************************************************
*
* sysPciOutByte - writes a byte to PCI I/O or Memory space
*
* This function writes a byte to a specified PCI I/O or Memory address
* via the QSPAN bridge chip. This function should be used for writing
* to the I/O or Memory mapped registers of a PCI device. Since this routine
* writes only a single byte of data no address or data manipulation is
* required.
*
* RETURNS: N/A
*
* void sysPciOutByte (UINT8 * dataPtr, UINT8 data)
*/
sysPciOutByte:
/* Write a byte to address */
stbx r4,r0,r3
/* Sync I/O operation */
sync
/* Return to caller */
bclr 20,0
/*****************************************************************************
*
* sysPciConfigInByte - reads a byte from a PCI configuration space address.
*
* This function reads a byte from a specified PCI configuration space
* address. This function uses the indirect PCI configuration space access
* method. It writes the input configuration space address to the CAR and
* then reads the data from the CDR. All reads/writes larger than 8 bits
* use byte swapping.
*
* Register Usage
* r3 - Configuration space address to read from / returned data
* r4 - dummy parameter, used for holding the CAR address
* r5 - dummy parameter, used for holding the CDR address
*
* RETURNS: N/A
*
* UINT8 sysPciConfigInByte (UINT8 * dataPtr, UINT dummy1, UINT dummy2)
*/
sysPciConfigInByte:
andi. r4,r3,3 /* save the 2 LSBs of the PCI addr */
addis r5,r0,HIADJ(PCI_MSTR_PRIMARY_CDR)
ori r5,r5,LO(PCI_MSTR_PRIMARY_CDR)
or r5,r5,r4 /* add the LSBs value to the CDR */
andi. r4,r4,0 /* the config. space address must */
ori r4,r4,3 /* be 4-byte aligned */
andc r3,r3,r4 /* mask off the 2 LSBs */
addis r4,r0,HIADJ(PCI_MSTR_PRIMARY_CAR)
ori r4,r4,LO(PCI_MSTR_PRIMARY_CAR)
stwbrx r3,r0,r4 /* write config. space addr. to CAR */
sync /* ensure memory access is complete */
andi. r3,r3,0
lbz r3,r0(r5) /* read data out of the CDR */
bclr 20,0 /* return to caller */
/*****************************************************************************
*
* sysPciConfigOutByte - writes a byte to a PCI configuration space address.
*
* This function writes a byte to a specified PCI configuration space
* address. This function uses the indirect PCI configuration space access
* method. It writes the input configuration space address to the CAR and
* then writes the data to the CDR. All writes larger than 8 bits use byte
* swapping.
*
* Register Usage
* r3 - Configuration space address to write to
* r4 - data to be written
* r5 - dummy parameter, used for holding the CAR address
* r6 - dummy parameter, used for holding the CDR address
*
* RETURNS: N/A
*
* void sysPciConfigOutByte (UINT8 * dataPtr, UINT8 data,
* UINT dummy1, UINT dummy2)
*/
sysPciConfigOutByte:
andi. r5,r3,3 /* save the 2 LSBs of the PCI addr */
addis r6,r0,HIADJ(PCI_MSTR_PRIMARY_CDR)
ori r6,r6,LO(PCI_MSTR_PRIMARY_CDR)
or r6,r6,r5 /* add the LSBs value to the CDR */
andi. r5,r5,0 /* the config. space address must */
ori r5,r5,3 /* be 4-byte aligned */
andc r3,r3,r5 /* mask off the 2 LSBs */
addis r5,r0,HIADJ(PCI_MSTR_PRIMARY_CAR)
ori r5,r5,LO(PCI_MSTR_PRIMARY_CAR)
stwbrx r3,r0,r5 /* write config. space addr. to CAR */
sync /* ensure memory access is complete */
stb r4,r0(r6) /* write data to CDR */
sync
bclr 20,0 /* return to caller */
/*****************************************************************************
*
* sysInWord - reads a word (16-bit big-endian) from an io address.
*
* This function reads a word from a specified io address or local memory.
* It operates in big-endian mode and does not perform any translation
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -